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omap4: control: Add ctrl_pad_base to omap_globals
On omap4 control module is divided in four IP blocks. - CTRL_MODULE_CORE 0x4a002000 - CTRL_MODULE_PAD_CORE 0x4a100000 - CTRL_MODULE_WKUP 0x4a30c000 - CTRL_MODULE_PAD_WKUP 0x4a31e000 Addressing all the modules with single base address is not possible considering 16 bit offsets. The mux code manages the pad core and pad wakeup related base address inside the mux framework. For other usage only control core and control pad bases are necessary. So this patch maps only needed pad control base address which is used by device drivers and infrastructure code The main control core base is still kept same in this patch to keep git-bisect working. This will be fixed in the relevant patch in this series. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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@ -25,6 +25,7 @@
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#include "sdrc.h"
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static void __iomem *omap2_ctrl_base;
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static void __iomem *omap4_ctrl_pad_base;
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#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
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struct omap3_scratchpad {
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@ -145,6 +146,12 @@ void __init omap2_set_globals_control(struct omap_globals *omap2_globals)
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omap2_ctrl_base = ioremap(omap2_globals->ctrl, SZ_4K);
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WARN_ON(!omap2_ctrl_base);
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}
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/* Static mapping, never released */
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if (omap2_globals->ctrl_pad) {
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omap4_ctrl_pad_base = ioremap(omap2_globals->ctrl_pad, SZ_4K);
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WARN_ON(!omap4_ctrl_pad_base);
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}
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}
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void __iomem *omap_ctrl_base_get(void)
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@ -336,7 +336,8 @@ void __init omap3_map_io(void)
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static struct omap_globals omap4_globals = {
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.class = OMAP443X_CLASS,
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.tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
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.ctrl = OMAP443X_CTRL_BASE,
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.ctrl = OMAP443X_CTRL_BASE, /* FIXME: Move this to control core */
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.ctrl_pad = OMAP443X_CTRL_BASE,
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.prm = OMAP4430_PRM_BASE,
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.cm = OMAP4430_CM_BASE,
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.cm2 = OMAP4430_CM2_BASE,
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@ -47,6 +47,7 @@ struct omap_globals {
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unsigned long sdrc; /* SDRAM Controller */
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unsigned long sms; /* SDRAM Memory Scheduler */
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unsigned long ctrl; /* System Control Module */
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unsigned long ctrl_pad; /* PAD Control Module */
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unsigned long prm; /* Power and Reset Management */
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unsigned long cm; /* Clock Management */
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unsigned long cm2;
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