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iommu/arm-smmu: Get associated RMR info and install bypass SMR

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Check if there is any RMR info associated with the devices behind
the SMMU and if any, install bypass SMRs for them. This is to
keep any ongoing traffic associated with these devices alive
when we enable/reset SMMU during probe().

Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Steven Price <steven.price@arm.com>
Tested-by: Steven Price <steven.price@arm.com>
Tested-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Acked-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/20220615101044.1972-10-shameerali.kolothum.thodi@huawei.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
Jon Nettleton 2022-06-15 11:10:44 +01:00 committed by Joerg Roedel
parent 9bdbdaa3c4
commit 0bec05574d
1 changed files with 52 additions and 0 deletions
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52
drivers/iommu/arm/arm-smmu/arm-smmu.c
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@ -2071,6 +2071,54 @@ err_reset_platform_ops: __maybe_unused;
return err;
}
static void arm_smmu_rmr_install_bypass_smr(struct arm_smmu_device *smmu)
{
struct list_head rmr_list;
struct iommu_resv_region *e;
int idx, cnt = 0;
u32 reg;
INIT_LIST_HEAD(&rmr_list);
iort_get_rmr_sids(dev_fwnode(smmu->dev), &rmr_list);
/*
* Rather than trying to look at existing mappings that
* are setup by the firmware and then invalidate the ones
* that do no have matching RMR entries, just disable the
* SMMU until it gets enabled again in the reset routine.
*/
reg = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sCR0);
reg |= ARM_SMMU_sCR0_CLIENTPD;
arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sCR0, reg);
list_for_each_entry(e, &rmr_list, list) {
struct iommu_iort_rmr_data *rmr;
int i;
rmr = container_of(e, struct iommu_iort_rmr_data, rr);
for (i = 0; i < rmr->num_sids; i++) {
idx = arm_smmu_find_sme(smmu, rmr->sids[i], ~0);
if (idx < 0)
continue;
if (smmu->s2crs[idx].count == 0) {
smmu->smrs[idx].id = rmr->sids[i];
smmu->smrs[idx].mask = 0;
smmu->smrs[idx].valid = true;
}
smmu->s2crs[idx].count++;
smmu->s2crs[idx].type = S2CR_TYPE_BYPASS;
smmu->s2crs[idx].privcfg = S2CR_PRIVCFG_DEFAULT;
cnt++;
}
}
dev_notice(smmu->dev, "\tpreserved %d boot mapping%s\n", cnt,
cnt == 1 ? "" : "s");
iort_put_rmr_sids(dev_fwnode(smmu->dev), &rmr_list);
}
static int arm_smmu_device_probe(struct platform_device *pdev)
{
struct resource *res;
@ -2191,6 +2239,10 @@ static int arm_smmu_device_probe(struct platform_device *pdev)
}
platform_set_drvdata(pdev, smmu);
/* Check for RMRs and install bypass SMRs if any */
arm_smmu_rmr_install_bypass_smr(smmu);
arm_smmu_device_reset(smmu);
arm_smmu_test_smr_masks(smmu);