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sh: pci: Consolidate pci_iomap() and use the generic I/O base.
This consolidates the pci_iomap() definitions and reworks how the I/O port base is handled. PCI channels can register their own I/O map base, or if none is provided, the system-wide generic I/O base is used instead. Functionally nothing changes, while this allows us to kill off lots of I/O address special casing and lookups. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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394b6d2fe6
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@ -60,6 +60,57 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
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vma->vm_page_prot);
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}
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static void __iomem *ioport_map_pci(struct pci_dev *dev,
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unsigned long port, unsigned int nr)
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{
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struct pci_channel *chan = dev->sysdata;
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if (!chan->io_map_base)
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chan->io_map_base = generic_io_base;
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return (void __iomem *)(chan->io_map_base + port);
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}
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void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
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{
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resource_size_t start = pci_resource_start(dev, bar);
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resource_size_t len = pci_resource_len(dev, bar);
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unsigned long flags = pci_resource_flags(dev, bar);
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if (unlikely(!len || !start))
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return NULL;
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if (maxlen && len > maxlen)
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len = maxlen;
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if (flags & IORESOURCE_IO)
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return ioport_map_pci(dev, start, len);
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/*
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* Presently the IORESOURCE_MEM case is a bit special, most
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* SH7751 style PCI controllers have PCI memory at a fixed
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* location in the address space where no remapping is desired.
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* With the IORESOURCE_MEM case more care has to be taken
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* to inhibit page table mapping for legacy cores, but this is
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* punted off to __ioremap().
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* -- PFM.
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*/
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if (flags & IORESOURCE_MEM) {
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if (flags & IORESOURCE_CACHEABLE)
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return ioremap(start, len);
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return ioremap_nocache(start, len);
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}
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return NULL;
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}
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EXPORT_SYMBOL(pci_iomap);
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void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
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{
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iounmap(addr);
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}
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EXPORT_SYMBOL(pci_iounmap);
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#ifdef CONFIG_HOTPLUG
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EXPORT_SYMBOL(pcibios_resource_to_bus);
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EXPORT_SYMBOL(pcibios_bus_to_resource);
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@ -187,39 +187,4 @@ void __init pcibios_update_irq(struct pci_dev *dev, int irq)
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pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
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}
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void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
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{
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resource_size_t start = pci_resource_start(dev, bar);
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resource_size_t len = pci_resource_len(dev, bar);
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unsigned long flags = pci_resource_flags(dev, bar);
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if (unlikely(!len || !start))
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return NULL;
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if (maxlen && len > maxlen)
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len = maxlen;
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/*
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* Presently the IORESOURCE_MEM case is a bit special, most
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* SH7751 style PCI controllers have PCI memory at a fixed
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* location in the address space where no remapping is desired.
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* With the IORESOURCE_MEM case more care has to be taken
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* to inhibit page table mapping for legacy cores, but this is
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* punted off to __ioremap().
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* -- PFM.
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*/
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if (flags & IORESOURCE_IO)
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return ioport_map(start, len);
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if (flags & IORESOURCE_MEM)
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return ioremap(start, len);
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return NULL;
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}
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EXPORT_SYMBOL(pci_iomap);
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void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
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{
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iounmap(addr);
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}
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EXPORT_SYMBOL(pci_iounmap);
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EXPORT_SYMBOL(board_pci_channels);
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@ -144,39 +144,4 @@ void __init pcibios_update_irq(struct pci_dev *dev, int irq)
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pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
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}
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void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
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{
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resource_size_t start = pci_resource_start(dev, bar);
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resource_size_t len = pci_resource_len(dev, bar);
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unsigned long flags = pci_resource_flags(dev, bar);
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if (unlikely(!len || !start))
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return NULL;
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if (maxlen && len > maxlen)
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len = maxlen;
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/*
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* Presently the IORESOURCE_MEM case is a bit special, most
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* SH7751 style PCI controllers have PCI memory at a fixed
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* location in the address space where no remapping is desired.
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* With the IORESOURCE_MEM case more care has to be taken
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* to inhibit page table mapping for legacy cores, but this is
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* punted off to __ioremap().
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* -- PFM.
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*/
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if (flags & IORESOURCE_IO)
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return ioport_map(start, len);
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if (flags & IORESOURCE_MEM)
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return ioremap(start, len);
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return NULL;
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}
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EXPORT_SYMBOL(pci_iomap);
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void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
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{
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iounmap(addr);
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}
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EXPORT_SYMBOL(pci_iounmap);
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EXPORT_SYMBOL(board_pci_channels);
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@ -26,6 +26,8 @@ struct pci_channel {
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int enabled;
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unsigned long reg_base;
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unsigned long io_base;
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unsigned long io_map_base;
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};
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/*
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@ -110,31 +112,11 @@ static inline int __is_pci_memory(unsigned long phys_addr, unsigned long size)
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}
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return 0;
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}
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static inline void __iomem *__get_pci_io_base(unsigned long port,
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unsigned long size)
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{
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struct pci_channel *p;
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struct resource *res;
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for (p = board_pci_channels; p->init; p++) {
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res = p->io_resource;
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if (p->enabled && (port >= res->start) &&
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(port + size) <= (res->end + 1))
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return (void __iomem *)(p->io_base + port);
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}
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return NULL;
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}
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#else
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static inline int __is_pci_memory(unsigned long phys_addr, unsigned long size)
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{
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return 0;
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}
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static inline void __iomem *__get_pci_io_base(unsigned long port,
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unsigned long size)
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{
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return NULL;
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}
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#endif
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/* Board-specific fixup routines. */
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@ -70,10 +70,6 @@ void __iomem *ioport_map(unsigned long port, unsigned int nr)
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if (ret)
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return ret;
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ret = __get_pci_io_base(port, nr);
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if (ret)
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return ret;
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return __ioport_map(port, nr);
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}
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EXPORT_SYMBOL(ioport_map);
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