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i40e/i40evf: unhide and enable to one prefena field
The PREFENA field in the receive host memory cache (RX-HMC) must be visible in order to be set to 1 at driver init for best performance. Change-ID: I16b0bcd84cf56f4b6c938201ff5e954bee5a1992 Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Acked-by: Shannon Nelson <shannon.nelson@intel.com> Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -747,6 +747,7 @@ static struct i40e_context_ele i40e_hmc_rxq_ce_info[] = {
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{ I40E_HMC_STORE(i40e_hmc_obj_rxq, tphdata_ena), 1, 195 },
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{ I40E_HMC_STORE(i40e_hmc_obj_rxq, tphhead_ena), 1, 196 },
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{ I40E_HMC_STORE(i40e_hmc_obj_rxq, lrxqthresh), 3, 198 },
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{ I40E_HMC_STORE(i40e_hmc_obj_rxq, prefena), 1, 201 },
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{ 0 }
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};
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@ -56,6 +56,7 @@ struct i40e_hmc_obj_rxq {
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u8 tphdata_ena;
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u8 tphhead_ena;
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u8 lrxqthresh;
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u8 prefena; /* NOTE: normally must be set to 1 at init */
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};
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/* Tx queue context data */
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@ -3140,6 +3140,8 @@ static void i40e_netpoll(struct net_device *netdev)
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pf->flags &= ~I40E_FLAG_IN_NETPOLL;
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}
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#endif
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/* set the prefena field to 1 because the manual says to */
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rx_ctx.prefena = 1;
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/**
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* i40e_vsi_control_tx - Start or stop a VSI's rings
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@ -53,6 +53,7 @@ struct i40e_hmc_obj_rxq {
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u8 tphdata_ena;
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u8 tphhead_ena;
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u8 lrxqthresh;
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u8 prefena; /* NOTE: normally must be set to 1 at init */
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};
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/* Tx queue context data */
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