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arch/sparc: Avoid DCTI Couples
Avoid un-intended DCTI Couples. Use of DCTI couples is deprecated. Also address the "Programming Note" for optimal performance. Here is the complete text from Oracle SPARC Architecture Specs. 6.3.4.7 DCTI Couples "A delayed control transfer instruction (DCTI) in the delay slot of another DCTI is referred to as a “DCTI couple”. The use of DCTI couples is deprecated in the Oracle SPARC Architecture; no new software should place a DCTI in the delay slot of another DCTI, because on future Oracle SPARC Architecture implementations DCTI couples may execute either slowly or differently than the programmer assumes it will. SPARC V8 and SPARC V9 Compatibility Note The SPARC V8 architecture left behavior undefined for a DCTI couple. The SPARC V9 architecture defined behavior in that case, but as of UltraSPARC Architecture 2005, use of DCTI couples was deprecated. Software should not expect high performance from DCTI couples, and performance of DCTI couples should be expected to decline further in future processors. Programming Note As noted in TABLE 6-5 on page 115, an annulled branch-always (branch-always with a = 1) instruction is not architecturally a DCTI. However, since not all implementations make that distinction, for optimal performance, a DCTI should not be placed in the instruction word immediately following an annulled branch-always instruction (BA,A or BPA,A)." Signed-off-by: Babu Moger <babu.moger@oracle.com> Reviewed-by: Rob Gardner <rob.gardner@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -96,6 +96,7 @@ sparc64_boot:
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andn %g1, PSTATE_AM, %g1
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wrpr %g1, 0x0, %pstate
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ba,a,pt %xcc, 1f
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nop
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.globl prom_finddev_name, prom_chosen_path, prom_root_node
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.globl prom_getprop_name, prom_mmu_name, prom_peer_name
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@ -613,6 +614,7 @@ niagara_tlb_fixup:
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nop
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ba,a,pt %xcc, 80f
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nop
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niagara4_patch:
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call niagara4_patch_copyops
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nop
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@ -622,6 +624,7 @@ niagara4_patch:
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nop
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ba,a,pt %xcc, 80f
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nop
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niagara2_patch:
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call niagara2_patch_copyops
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@ -632,6 +635,7 @@ niagara2_patch:
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nop
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ba,a,pt %xcc, 80f
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nop
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niagara_patch:
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call niagara_patch_copyops
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@ -82,6 +82,7 @@ do_stdfmna:
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call handle_stdfmna
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add %sp, PTREGS_OFF, %o0
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ba,a,pt %xcc, rtrap
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nop
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.size do_stdfmna,.-do_stdfmna
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.type breakpoint_trap,#function
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@ -237,6 +237,7 @@ rt_continue: ldx [%sp + PTREGS_OFF + PT_V9_G1], %g1
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bne,pt %xcc, user_rtt_fill_32bit
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wrpr %g1, %cwp
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ba,a,pt %xcc, user_rtt_fill_64bit
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nop
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user_rtt_fill_fixup_dax:
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ba,pt %xcc, user_rtt_fill_fixup_common
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@ -86,6 +86,7 @@ __spitfire_cee_trap_continue:
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rd %pc, %g7
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ba,a,pt %xcc, 2f
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nop
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1: ba,pt %xcc, etrap_irq
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rd %pc, %g7
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@ -352,6 +352,7 @@ sun4v_mna:
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call sun4v_do_mna
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add %sp, PTREGS_OFF, %o0
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ba,a,pt %xcc, rtrap
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nop
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/* Privileged Action. */
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sun4v_privact:
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@ -92,6 +92,7 @@ user_rtt_fill_fixup_common:
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call sun4v_data_access_exception
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nop
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ba,a,pt %xcc, rtrap
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nop
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1: call spitfire_data_access_exception
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nop
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@ -152,6 +152,8 @@ fill_fixup_dax:
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call sun4v_data_access_exception
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nop
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ba,a,pt %xcc, rtrap
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nop
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1: call spitfire_data_access_exception
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nop
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ba,a,pt %xcc, rtrap
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nop
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@ -326,11 +326,13 @@ FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */
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blu 170f
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nop
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ba,a,pt %xcc, 180f
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nop
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4: /* 32 <= low bits < 48 */
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blu 150f
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nop
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ba,a,pt %xcc, 160f
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nop
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5: /* 0 < low bits < 32 */
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blu,a 6f
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cmp %g2, 8
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@ -338,6 +340,7 @@ FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */
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blu 130f
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nop
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ba,a,pt %xcc, 140f
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nop
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6: /* 0 < low bits < 16 */
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bgeu 120f
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nop
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@ -475,6 +478,7 @@ FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */
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brz,pt %o2, 85f
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sub %o0, %o1, GLOBAL_SPARE
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ba,a,pt %XCC, 90f
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nop
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.align 64
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75: /* 16 < len <= 64 */
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@ -530,4 +530,5 @@ FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */
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bne,pt %icc, 1b
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EX_ST(STORE(stb, %g1, %o0 - 0x01), NG4_retl_o2_plus_1)
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ba,a,pt %icc, .Lexit
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nop
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.size FUNC_NAME, .-FUNC_NAME
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@ -102,4 +102,5 @@ NG4bzero:
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bne,pt %icc, 1b
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add %o0, 0x30, %o0
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ba,a,pt %icc, .Lpostloop
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nop
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.size NG4bzero,.-NG4bzero
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@ -394,6 +394,7 @@ FUNC_NAME: /* %i0=dst, %i1=src, %i2=len */
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brz,pt %i2, 85f
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sub %o0, %i1, %i3
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ba,a,pt %XCC, 90f
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nop
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.align 64
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70: /* 16 < len <= 64 */
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