korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-11-20 02:34:23 +08:00
Code Issues Packages Projects Releases Wiki Activity

ARM: shmobile: r8a7740: add USB24 clock explain

Browse Source 
USBCKCR is controlling USB parent clock and divide rate.
This parent clock is used as a "usb24s" from other devices,
but the "divide rate" is not used.
Further, this clock itself is known as "usb24".
So, to set this clock is a little confusable.
This patch adds quick explain and sample settings for this clock.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
This commit is contained in:
Kuninori Morimoto 2012-10-29 01:14:41 -07:00 committed by Simon Horman
parent 167443b16e
commit 0a38429004
1 changed files with 16 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
arch/arm/mach-shmobile/clock-r8a7740.c
View File

@ -188,6 +188,22 @@ static struct clk pllc1_div2_clk = {
};
/* USB clock */
/*
* USBCKCR is controlling usb24 clock
* bit[7] : parent clock
* bit[6] : clock divide rate
* And this bit[7] is used as a "usb24s" from other devices.
* (Video clock / Sub clock / SPU clock)
* You can controll this clock as a below.
*
* struct clk *usb24 = clk_get(dev, "usb24");
* struct clk *usb24s = clk_get(NULL, "usb24s");
* struct clk *system = clk_get(NULL, "system_clk");
* int rate = clk_get_rate(system);
*
* clk_set_parent(usb24s, system); // for bit[7]
* clk_set_rate(usb24, rate / 2); // for bit[6]
*/
static struct clk *usb24s_parents[] = {
[0] = &system_clk,
[1] = &extal2_clk