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drm/i915/gt: Restore clear-residual mitigations for Ivybridge, Baytrail
The mitigation is required for all gen7 platforms, now that it does not cause GPU hangs, restore it for Ivybridge and Baytrail. Fixes:47f8253d2b
("drm/i915/gen7: Clear all EU/L3 residual contexts") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com> Cc: Akeem G Abodunrin <akeem.g.abodunrin@intel.com> Cc: Bloomfield Jon <jon.bloomfield@intel.com> Reviewed-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210111225220.3483-2-chris@chris-wilson.co.uk (cherry picked from commit008ead6ef8
) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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@ -1290,7 +1290,7 @@ int intel_ring_submission_setup(struct intel_engine_cs *engine)
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GEM_BUG_ON(timeline->hwsp_ggtt != engine->status_page.vma);
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if (IS_HASWELL(engine->i915) && engine->class == RENDER_CLASS) {
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if (IS_GEN(engine->i915, 7) && engine->class == RENDER_CLASS) {
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err = gen7_ctx_switch_bb_init(engine);
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if (err)
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goto err_ring_unpin;
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