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KVM: arm/arm64: vgic: Get rid of MISR and EISR fields
We don't use these fields anymore so let's nuke them completely. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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@ -225,8 +225,6 @@ struct vgic_dist {
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struct vgic_v2_cpu_if {
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u32 vgic_hcr;
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u32 vgic_vmcr;
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u32 vgic_misr; /* Saved only */
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u64 vgic_eisr; /* Saved only */
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u64 vgic_elrsr; /* Saved only */
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u32 vgic_apr;
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u32 vgic_lr[VGIC_V2_MAX_LRS];
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@ -236,8 +234,6 @@ struct vgic_v3_cpu_if {
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u32 vgic_hcr;
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u32 vgic_vmcr;
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u32 vgic_sre; /* Restored only, change ignored */
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u32 vgic_misr; /* Saved only */
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u32 vgic_eisr; /* Saved only */
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u32 vgic_elrsr; /* Saved only */
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u32 vgic_ap0r[4];
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u32 vgic_ap1r[4];
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@ -77,9 +77,7 @@ void __hyp_text __vgic_v2_save_state(struct kvm_vcpu *vcpu)
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writel_relaxed(0, base + GICH_HCR);
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} else {
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cpu_if->vgic_eisr = 0;
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cpu_if->vgic_elrsr = ~0UL;
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cpu_if->vgic_misr = 0;
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cpu_if->vgic_apr = 0;
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}
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}
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@ -170,8 +170,6 @@ void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu)
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cpu_if->vgic_ap1r[0] = read_gicreg(ICH_AP1R0_EL2);
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}
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} else {
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cpu_if->vgic_misr = 0;
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cpu_if->vgic_eisr = 0;
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cpu_if->vgic_elrsr = 0xffff;
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cpu_if->vgic_ap0r[0] = 0;
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cpu_if->vgic_ap0r[1] = 0;
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