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hwmon: (f71882fg) Add support for the F71858F
Add support for the hwmon part of the Fintek F71858FG superio IC to the f71882fg driver. Many thanks to Jelle de Jong for lending me a motherboard with this superio on it. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
This commit is contained in:
parent
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commit
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@ -2,14 +2,18 @@ Kernel driver f71882fg
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======================
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======================
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Supported chips:
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Supported chips:
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* Fintek F71882FG and F71883FG
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* Fintek F71858FG
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Prefix: 'f71882fg'
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Prefix: 'f71858fg'
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Addresses scanned: none, address read from Super I/O config space
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Addresses scanned: none, address read from Super I/O config space
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Datasheet: Available from the Fintek website
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Datasheet: Available from the Fintek website
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* Fintek F71862FG and F71863FG
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* Fintek F71862FG and F71863FG
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Prefix: 'f71862fg'
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Prefix: 'f71862fg'
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Addresses scanned: none, address read from Super I/O config space
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Addresses scanned: none, address read from Super I/O config space
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Datasheet: Available from the Fintek website
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Datasheet: Available from the Fintek website
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* Fintek F71882FG and F71883FG
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Prefix: 'f71882fg'
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Addresses scanned: none, address read from Super I/O config space
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Datasheet: Available from the Fintek website
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* Fintek F8000
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* Fintek F8000
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Prefix: 'f8000'
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Prefix: 'f8000'
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Addresses scanned: none, address read from Super I/O config space
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Addresses scanned: none, address read from Super I/O config space
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@ -66,13 +70,13 @@ printed when loading the driver.
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Three different fan control modes are supported; the mode number is written
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Three different fan control modes are supported; the mode number is written
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to the pwm#_enable file. Note that not all modes are supported on all
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to the pwm#_enable file. Note that not all modes are supported on all
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chips, and some modes may only be available in RPM / PWM mode on the F8000.
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chips, and some modes may only be available in RPM / PWM mode.
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Writing an unsupported mode will result in an invalid parameter error.
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Writing an unsupported mode will result in an invalid parameter error.
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* 1: Manual mode
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* 1: Manual mode
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You ask for a specific PWM duty cycle / DC voltage or a specific % of
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You ask for a specific PWM duty cycle / DC voltage or a specific % of
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fan#_full_speed by writing to the pwm# file. This mode is only
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fan#_full_speed by writing to the pwm# file. This mode is only
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available on the F8000 if the fan channel is in RPM mode.
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available on the F71858FG / F8000 if the fan channel is in RPM mode.
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* 2: Normal auto mode
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* 2: Normal auto mode
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You can define a number of temperature/fan speed trip points, which % the
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You can define a number of temperature/fan speed trip points, which % the
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@ -306,11 +306,11 @@ config SENSORS_F71805F
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will be called f71805f.
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will be called f71805f.
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config SENSORS_F71882FG
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config SENSORS_F71882FG
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tristate "Fintek F71862FG, F71882FG and F8000"
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tristate "Fintek F71858FG, F71862FG, F71882FG and F8000"
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depends on EXPERIMENTAL
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depends on EXPERIMENTAL
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help
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help
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If you say yes here you get support for hardware monitoring
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If you say yes here you get support for hardware monitoring
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features of the Fintek F71882FG/F71883FG, F71862FG/71863FG
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features of the Fintek F71858FG, F71862FG/71863FG, F71882FG/F71883FG
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and F8000 Super-I/O chips.
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and F8000 Super-I/O chips.
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This driver can also be built as a module. If so, the module
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This driver can also be built as a module. If so, the module
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@ -32,6 +32,7 @@
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#define DRVNAME "f71882fg"
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#define DRVNAME "f71882fg"
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#define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */
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#define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
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#define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
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#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
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#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
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#define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */
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#define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */
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@ -44,6 +45,7 @@
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#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
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#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
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#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
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#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
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#define SIO_F71858_ID 0x0507 /* Chipset ID */
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#define SIO_F71862_ID 0x0601 /* Chipset ID */
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#define SIO_F71862_ID 0x0601 /* Chipset ID */
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#define SIO_F71882_ID 0x0541 /* Chipset ID */
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#define SIO_F71882_ID 0x0541 /* Chipset ID */
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#define SIO_F8000_ID 0x0581 /* Chipset ID */
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#define SIO_F8000_ID 0x0581 /* Chipset ID */
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@ -70,6 +72,7 @@
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#define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
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#define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
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#define F71882FG_REG_TEMP_STATUS 0x62
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#define F71882FG_REG_TEMP_STATUS 0x62
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#define F71882FG_REG_TEMP_BEEP 0x63
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#define F71882FG_REG_TEMP_BEEP 0x63
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#define F71882FG_REG_TEMP_CONFIG 0x69
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#define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
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#define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
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#define F71882FG_REG_TEMP_TYPE 0x6B
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#define F71882FG_REG_TEMP_TYPE 0x6B
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#define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
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#define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
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@ -92,9 +95,10 @@ static unsigned short force_id;
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module_param(force_id, ushort, 0);
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module_param(force_id, ushort, 0);
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MODULE_PARM_DESC(force_id, "Override the detected device ID");
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MODULE_PARM_DESC(force_id, "Override the detected device ID");
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enum chips { f71862fg, f71882fg, f8000 };
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enum chips { f71858fg, f71862fg, f71882fg, f8000 };
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static const char *f71882fg_names[] = {
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static const char *f71882fg_names[] = {
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"f71858fg",
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"f71862fg",
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"f71862fg",
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"f71882fg",
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"f71882fg",
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"f8000",
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"f8000",
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@ -119,6 +123,7 @@ struct f71882fg_data {
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struct device *hwmon_dev;
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struct device *hwmon_dev;
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struct mutex update_lock;
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struct mutex update_lock;
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int temp_start; /* temp numbering start (0 or 1) */
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char valid; /* !=0 if following fields are valid */
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char valid; /* !=0 if following fields are valid */
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unsigned long last_updated; /* In jiffies */
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unsigned long last_updated; /* In jiffies */
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unsigned long last_limits; /* In jiffies */
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unsigned long last_limits; /* In jiffies */
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@ -136,7 +141,7 @@ struct f71882fg_data {
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/* Note: all models have only 3 temperature channels, but on some
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/* Note: all models have only 3 temperature channels, but on some
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they are addressed as 0-2 and on others as 1-3, so for coding
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they are addressed as 0-2 and on others as 1-3, so for coding
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convenience we reserve space for 4 channels */
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convenience we reserve space for 4 channels */
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u8 temp[4];
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u16 temp[4];
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u8 temp_ovt[4];
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u8 temp_ovt[4];
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u8 temp_high[4];
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u8 temp_high[4];
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u8 temp_hyst[2]; /* 2 hysts stored per reg */
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u8 temp_hyst[2]; /* 2 hysts stored per reg */
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@ -144,6 +149,7 @@ struct f71882fg_data {
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u8 temp_status;
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u8 temp_status;
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u8 temp_beep;
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u8 temp_beep;
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u8 temp_diode_open;
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u8 temp_diode_open;
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u8 temp_config;
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u8 pwm[4];
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u8 pwm[4];
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u8 pwm_enable;
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u8 pwm_enable;
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u8 pwm_auto_point_hyst[2];
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u8 pwm_auto_point_hyst[2];
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@ -252,6 +258,50 @@ static struct platform_driver f71882fg_driver = {
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static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
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static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
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/* Temp and in attr for the f71858fg */
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static struct sensor_device_attribute_2 f71858fg_in_temp_attr[] = {
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SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
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SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
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SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
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SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
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SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
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store_temp_max, 0, 0),
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SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
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store_temp_max_hyst, 0, 0),
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SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0),
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SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
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store_temp_crit, 0, 0),
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SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
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0, 0),
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SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
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SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
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SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
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SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
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store_temp_max, 0, 1),
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SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
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store_temp_max_hyst, 0, 1),
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SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
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SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
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store_temp_crit, 0, 1),
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SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
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0, 1),
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SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
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SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 1),
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SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
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SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
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SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
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store_temp_max, 0, 2),
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SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
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store_temp_max_hyst, 0, 2),
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SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
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SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
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store_temp_crit, 0, 2),
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SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
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0, 2),
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SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
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SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
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};
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/* Temp and in attr common to both the f71862fg and f71882fg */
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/* Temp and in attr common to both the f71862fg and f71882fg */
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static struct sensor_device_attribute_2 f718x2fg_in_temp_attr[] = {
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static struct sensor_device_attribute_2 f718x2fg_in_temp_attr[] = {
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SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
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SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
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@ -476,22 +526,8 @@ static struct sensor_device_attribute_2 f71862fg_fan_attr[] = {
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show_pwm_auto_point_temp_hyst, NULL, 3, 2),
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show_pwm_auto_point_temp_hyst, NULL, 3, 2),
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};
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};
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/* Fan / PWM attr for the f71882fg */
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/* Fan / PWM attr common to both the f71882fg and f71858fg */
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static struct sensor_device_attribute_2 f71882fg_fan_attr[] = {
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static struct sensor_device_attribute_2 f71882fg_f71858fg_fan_attr[] = {
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SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
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store_fan_beep, 0, 0),
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SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
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store_fan_beep, 0, 1),
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SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
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store_fan_beep, 0, 2),
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SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
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SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
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show_fan_full_speed,
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store_fan_full_speed, 0, 3),
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SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
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store_fan_beep, 0, 3),
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SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
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SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
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SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
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show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
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show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
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0, 0),
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0, 0),
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@ -605,6 +641,24 @@ static struct sensor_device_attribute_2 f71882fg_fan_attr[] = {
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show_pwm_auto_point_temp_hyst, NULL, 2, 2),
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show_pwm_auto_point_temp_hyst, NULL, 2, 2),
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SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
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SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
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show_pwm_auto_point_temp_hyst, NULL, 3, 2),
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show_pwm_auto_point_temp_hyst, NULL, 3, 2),
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};
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/* Fan / PWM attr found on the f71882fg but not on the f71858fg */
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static struct sensor_device_attribute_2 f71882fg_fan_attr[] = {
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SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
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store_fan_beep, 0, 0),
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SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
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store_fan_beep, 0, 1),
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SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
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store_fan_beep, 0, 2),
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SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
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SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
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show_fan_full_speed,
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store_fan_full_speed, 0, 3),
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SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
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store_fan_beep, 0, 3),
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SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
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SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
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SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
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SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
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SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
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@ -855,13 +909,20 @@ static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
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outb(val & 255, data->addr + DATA_REG_OFFSET);
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outb(val & 255, data->addr + DATA_REG_OFFSET);
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}
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}
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static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr)
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{
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if (data->type == f71858fg)
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return f71882fg_read16(data, F71882FG_REG_TEMP(nr));
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else
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return f71882fg_read8(data, F71882FG_REG_TEMP(nr));
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}
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static struct f71882fg_data *f71882fg_update_device(struct device *dev)
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static struct f71882fg_data *f71882fg_update_device(struct device *dev)
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{
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{
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struct f71882fg_data *data = dev_get_drvdata(dev);
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struct f71882fg_data *data = dev_get_drvdata(dev);
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int nr, reg = 0, reg2;
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int nr, reg = 0, reg2;
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int nr_fans = (data->type == f71882fg) ? 4 : 3;
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int nr_fans = (data->type == f71882fg) ? 4 : 3;
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int nr_ins = (data->type == f8000) ? 3 : 9;
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int nr_ins = (data->type == f71858fg || data->type == f8000) ? 3 : 9;
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int temp_start = (data->type == f8000) ? 0 : 1;
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||||||
|
|
||||||
mutex_lock(&data->update_lock);
|
mutex_lock(&data->update_lock);
|
||||||
|
|
||||||
@ -876,7 +937,7 @@ static struct f71882fg_data *f71882fg_update_device(struct device *dev)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Get High & boundary temps*/
|
/* Get High & boundary temps*/
|
||||||
for (nr = temp_start; nr < 3 + temp_start; nr++) {
|
for (nr = data->temp_start; nr < 3 + data->temp_start; nr++) {
|
||||||
data->temp_ovt[nr] = f71882fg_read8(data,
|
data->temp_ovt[nr] = f71882fg_read8(data,
|
||||||
F71882FG_REG_TEMP_OVT(nr));
|
F71882FG_REG_TEMP_OVT(nr));
|
||||||
data->temp_high[nr] = f71882fg_read8(data,
|
data->temp_high[nr] = f71882fg_read8(data,
|
||||||
@ -884,14 +945,17 @@ static struct f71882fg_data *f71882fg_update_device(struct device *dev)
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (data->type != f8000) {
|
if (data->type != f8000) {
|
||||||
data->fan_beep = f71882fg_read8(data,
|
|
||||||
F71882FG_REG_FAN_BEEP);
|
|
||||||
data->temp_beep = f71882fg_read8(data,
|
|
||||||
F71882FG_REG_TEMP_BEEP);
|
|
||||||
data->temp_hyst[0] = f71882fg_read8(data,
|
data->temp_hyst[0] = f71882fg_read8(data,
|
||||||
F71882FG_REG_TEMP_HYST(0));
|
F71882FG_REG_TEMP_HYST(0));
|
||||||
data->temp_hyst[1] = f71882fg_read8(data,
|
data->temp_hyst[1] = f71882fg_read8(data,
|
||||||
F71882FG_REG_TEMP_HYST(1));
|
F71882FG_REG_TEMP_HYST(1));
|
||||||
|
}
|
||||||
|
|
||||||
|
if (data->type == f71862fg || data->type == f71882fg) {
|
||||||
|
data->fan_beep = f71882fg_read8(data,
|
||||||
|
F71882FG_REG_FAN_BEEP);
|
||||||
|
data->temp_beep = f71882fg_read8(data,
|
||||||
|
F71882FG_REG_TEMP_BEEP);
|
||||||
/* Have to hardcode type, because temp1 is special */
|
/* Have to hardcode type, because temp1 is special */
|
||||||
reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
|
reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
|
||||||
data->temp_type[2] = (reg & 0x04) ? 2 : 4;
|
data->temp_type[2] = (reg & 0x04) ? 2 : 4;
|
||||||
@ -902,10 +966,10 @@ static struct f71882fg_data *f71882fg_update_device(struct device *dev)
|
|||||||
data->temp_type[1] = 6 /* PECI */;
|
data->temp_type[1] = 6 /* PECI */;
|
||||||
else if ((reg2 & 0x03) == 0x02)
|
else if ((reg2 & 0x03) == 0x02)
|
||||||
data->temp_type[1] = 5 /* AMDSI */;
|
data->temp_type[1] = 5 /* AMDSI */;
|
||||||
else if (data->type != f8000)
|
else if (data->type == f71862fg || data->type == f71882fg)
|
||||||
data->temp_type[1] = (reg & 0x02) ? 2 : 4;
|
data->temp_type[1] = (reg & 0x02) ? 2 : 4;
|
||||||
else
|
else
|
||||||
data->temp_type[1] = 2; /* F8000 only supports BJT */
|
data->temp_type[1] = 2; /* Only supports BJT */
|
||||||
|
|
||||||
data->pwm_enable = f71882fg_read8(data,
|
data->pwm_enable = f71882fg_read8(data,
|
||||||
F71882FG_REG_PWM_ENABLE);
|
F71882FG_REG_PWM_ENABLE);
|
||||||
@ -961,9 +1025,8 @@ static struct f71882fg_data *f71882fg_update_device(struct device *dev)
|
|||||||
F71882FG_REG_TEMP_STATUS);
|
F71882FG_REG_TEMP_STATUS);
|
||||||
data->temp_diode_open = f71882fg_read8(data,
|
data->temp_diode_open = f71882fg_read8(data,
|
||||||
F71882FG_REG_TEMP_DIODE_OPEN);
|
F71882FG_REG_TEMP_DIODE_OPEN);
|
||||||
for (nr = temp_start; nr < 3 + temp_start; nr++)
|
for (nr = data->temp_start; nr < 3 + data->temp_start; nr++)
|
||||||
data->temp[nr] = f71882fg_read8(data,
|
data->temp[nr] = f71882fg_read_temp(data, nr);
|
||||||
F71882FG_REG_TEMP(nr));
|
|
||||||
|
|
||||||
data->fan_status = f71882fg_read8(data,
|
data->fan_status = f71882fg_read8(data,
|
||||||
F71882FG_REG_FAN_STATUS);
|
F71882FG_REG_FAN_STATUS);
|
||||||
@ -1166,8 +1229,24 @@ static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
|
|||||||
{
|
{
|
||||||
struct f71882fg_data *data = f71882fg_update_device(dev);
|
struct f71882fg_data *data = f71882fg_update_device(dev);
|
||||||
int nr = to_sensor_dev_attr_2(devattr)->index;
|
int nr = to_sensor_dev_attr_2(devattr)->index;
|
||||||
|
int sign, temp;
|
||||||
|
|
||||||
return sprintf(buf, "%d\n", data->temp[nr] * 1000);
|
if (data->type == f71858fg) {
|
||||||
|
/* TEMP_TABLE_SEL 1 or 3 ? */
|
||||||
|
if (data->temp_config & 1) {
|
||||||
|
sign = data->temp[nr] & 0x0001;
|
||||||
|
temp = (data->temp[nr] >> 5) & 0x7ff;
|
||||||
|
} else {
|
||||||
|
sign = data->temp[nr] & 0x8000;
|
||||||
|
temp = (data->temp[nr] >> 5) & 0x3ff;
|
||||||
|
}
|
||||||
|
temp *= 125;
|
||||||
|
if (sign)
|
||||||
|
temp -= 128000;
|
||||||
|
} else
|
||||||
|
temp = data->temp[nr] * 1000;
|
||||||
|
|
||||||
|
return sprintf(buf, "%d\n", temp);
|
||||||
}
|
}
|
||||||
|
|
||||||
static ssize_t show_temp_max(struct device *dev, struct device_attribute
|
static ssize_t show_temp_max(struct device *dev, struct device_attribute
|
||||||
@ -1460,6 +1539,12 @@ static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
|
|||||||
} else {
|
} else {
|
||||||
switch (val) {
|
switch (val) {
|
||||||
case 1:
|
case 1:
|
||||||
|
/* The f71858fg does not support manual RPM mode */
|
||||||
|
if (data->type == f71858fg &&
|
||||||
|
((data->pwm_enable >> (2 * nr)) & 1)) {
|
||||||
|
count = -EINVAL;
|
||||||
|
goto leave;
|
||||||
|
}
|
||||||
data->pwm_enable |= 2 << (2 * nr);
|
data->pwm_enable |= 2 << (2 * nr);
|
||||||
break; /* Manual */
|
break; /* Manual */
|
||||||
case 2:
|
case 2:
|
||||||
@ -1618,9 +1703,9 @@ static ssize_t show_pwm_auto_point_channel(struct device *dev,
|
|||||||
int result;
|
int result;
|
||||||
struct f71882fg_data *data = f71882fg_update_device(dev);
|
struct f71882fg_data *data = f71882fg_update_device(dev);
|
||||||
int nr = to_sensor_dev_attr_2(devattr)->index;
|
int nr = to_sensor_dev_attr_2(devattr)->index;
|
||||||
int temp_start = (data->type == f8000) ? 0 : 1;
|
|
||||||
|
|
||||||
result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) - temp_start);
|
result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) -
|
||||||
|
data->temp_start);
|
||||||
|
|
||||||
return sprintf(buf, "%d\n", result);
|
return sprintf(buf, "%d\n", result);
|
||||||
}
|
}
|
||||||
@ -1631,7 +1716,6 @@ static ssize_t store_pwm_auto_point_channel(struct device *dev,
|
|||||||
{
|
{
|
||||||
struct f71882fg_data *data = dev_get_drvdata(dev);
|
struct f71882fg_data *data = dev_get_drvdata(dev);
|
||||||
int nr = to_sensor_dev_attr_2(devattr)->index;
|
int nr = to_sensor_dev_attr_2(devattr)->index;
|
||||||
int temp_start = (data->type == f8000) ? 0 : 1;
|
|
||||||
long val = simple_strtol(buf, NULL, 10);
|
long val = simple_strtol(buf, NULL, 10);
|
||||||
|
|
||||||
switch (val) {
|
switch (val) {
|
||||||
@ -1647,7 +1731,7 @@ static ssize_t store_pwm_auto_point_channel(struct device *dev,
|
|||||||
default:
|
default:
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
val += temp_start;
|
val += data->temp_start;
|
||||||
mutex_lock(&data->update_lock);
|
mutex_lock(&data->update_lock);
|
||||||
data->pwm_auto_point_mapping[nr] =
|
data->pwm_auto_point_mapping[nr] =
|
||||||
f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
|
f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
|
||||||
@ -1723,6 +1807,8 @@ static int __devinit f71882fg_probe(struct platform_device *pdev)
|
|||||||
|
|
||||||
data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
|
data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
|
||||||
data->type = sio_data->type;
|
data->type = sio_data->type;
|
||||||
|
data->temp_start =
|
||||||
|
(data->type == f71858fg || data->type == f8000) ? 0 : 1;
|
||||||
mutex_init(&data->update_lock);
|
mutex_init(&data->update_lock);
|
||||||
platform_set_drvdata(pdev, data);
|
platform_set_drvdata(pdev, data);
|
||||||
|
|
||||||
@ -1745,6 +1831,20 @@ static int __devinit f71882fg_probe(struct platform_device *pdev)
|
|||||||
|
|
||||||
if (start_reg & 0x01) {
|
if (start_reg & 0x01) {
|
||||||
switch (data->type) {
|
switch (data->type) {
|
||||||
|
case f71858fg:
|
||||||
|
data->temp_config =
|
||||||
|
f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG);
|
||||||
|
if (data->temp_config & 0x10)
|
||||||
|
/* The f71858fg temperature alarms behave as
|
||||||
|
the f8000 alarms in this mode */
|
||||||
|
err = f71882fg_create_sysfs_files(pdev,
|
||||||
|
f8000_in_temp_attr,
|
||||||
|
ARRAY_SIZE(f8000_in_temp_attr));
|
||||||
|
else
|
||||||
|
err = f71882fg_create_sysfs_files(pdev,
|
||||||
|
f71858fg_in_temp_attr,
|
||||||
|
ARRAY_SIZE(f71858fg_in_temp_attr));
|
||||||
|
break;
|
||||||
case f71882fg:
|
case f71882fg:
|
||||||
err = f71882fg_create_sysfs_files(pdev,
|
err = f71882fg_create_sysfs_files(pdev,
|
||||||
f71882fg_in_temp_attr,
|
f71882fg_in_temp_attr,
|
||||||
@ -1773,6 +1873,12 @@ static int __devinit f71882fg_probe(struct platform_device *pdev)
|
|||||||
|
|
||||||
/* Sanity check the pwm settings */
|
/* Sanity check the pwm settings */
|
||||||
switch (data->type) {
|
switch (data->type) {
|
||||||
|
case f71858fg:
|
||||||
|
err = 0;
|
||||||
|
for (i = 0; i < nr_fans; i++)
|
||||||
|
if (((data->pwm_enable >> (i * 2)) & 3) == 3)
|
||||||
|
err = 1;
|
||||||
|
break;
|
||||||
case f71862fg:
|
case f71862fg:
|
||||||
err = (data->pwm_enable & 0x15) != 0x15;
|
err = (data->pwm_enable & 0x15) != 0x15;
|
||||||
break;
|
break;
|
||||||
@ -1806,6 +1912,13 @@ static int __devinit f71882fg_probe(struct platform_device *pdev)
|
|||||||
err = f71882fg_create_sysfs_files(pdev,
|
err = f71882fg_create_sysfs_files(pdev,
|
||||||
f71882fg_fan_attr,
|
f71882fg_fan_attr,
|
||||||
ARRAY_SIZE(f71882fg_fan_attr));
|
ARRAY_SIZE(f71882fg_fan_attr));
|
||||||
|
if (err)
|
||||||
|
goto exit_unregister_sysfs;
|
||||||
|
/* fall through! */
|
||||||
|
case f71858fg:
|
||||||
|
err = f71882fg_create_sysfs_files(pdev,
|
||||||
|
f71882fg_f71858fg_fan_attr,
|
||||||
|
ARRAY_SIZE(f71882fg_f71858fg_fan_attr));
|
||||||
break;
|
break;
|
||||||
case f8000:
|
case f8000:
|
||||||
err = f71882fg_create_sysfs_files(pdev,
|
err = f71882fg_create_sysfs_files(pdev,
|
||||||
@ -1890,6 +2003,9 @@ static int __init f71882fg_find(int sioaddr, unsigned short *address,
|
|||||||
|
|
||||||
devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
|
devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
|
||||||
switch (devid) {
|
switch (devid) {
|
||||||
|
case SIO_F71858_ID:
|
||||||
|
sio_data->type = f71858fg;
|
||||||
|
break;
|
||||||
case SIO_F71862_ID:
|
case SIO_F71862_ID:
|
||||||
sio_data->type = f71862fg;
|
sio_data->type = f71862fg;
|
||||||
break;
|
break;
|
||||||
@ -1904,7 +2020,11 @@ static int __init f71882fg_find(int sioaddr, unsigned short *address,
|
|||||||
goto exit;
|
goto exit;
|
||||||
}
|
}
|
||||||
|
|
||||||
superio_select(sioaddr, SIO_F71882FG_LD_HWM);
|
if (sio_data->type == f71858fg)
|
||||||
|
superio_select(sioaddr, SIO_F71858FG_LD_HWM);
|
||||||
|
else
|
||||||
|
superio_select(sioaddr, SIO_F71882FG_LD_HWM);
|
||||||
|
|
||||||
if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
|
if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
|
||||||
printk(KERN_WARNING DRVNAME ": Device not activated\n");
|
printk(KERN_WARNING DRVNAME ": Device not activated\n");
|
||||||
goto exit;
|
goto exit;
|
||||||
|
Loading…
Reference in New Issue
Block a user