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MMC core:
- Fix CQE error recovery path MMC host: - cqhci: Fix CQE error recovery path - sdhci-pci-gli: Fix initialization of LPM - sdhci-sprd: Fix enabling/disabling of the vqmmc regulator -----BEGIN PGP SIGNATURE----- iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAmVoZ1gXHHVsZi5oYW5z c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjCmiRBAAjNrmB5Jg7n52+Oc5RjmTEb1y xrwhFo8zPAsGkZY2rTRRabW/0n7W+v0d3d2DK/v0flbv0gBUMsSIKqrNtjfjAYEf GRoEdt8esHuRwNLiDdPxUV20HQd/VW64nxCucX1YoO4y8MqOaOXAltB0OfGL5OJ2 59x76k9e/eXmfCE53Ace3h9xq4oeL0aeg8o+P494fEoYNesKIcj699uRuSJeXZ8B lu42jrQjRtsFEmPUxT7nkZnPVNg6ebX4V1Nh00uaqYR7uhuiE0qMW5uCbH5XQvAW YSS9JuL0eSJkh5ni7/v1ubbijZAheCrHgfXBIj4tFNAmHXK+HCyABueJLUVpXpu7 ZbVSJVPmzSOpJn9iJlARovh4vfIhEdgFaryoepOmIgGXn1EY+jR4BqCGytE4wSh+ OWwvOJo3RImcGpBrOQy9ds0rRLj2Yuz0ifYzU6W6qFmxjvth6druhHIQZWarOURT +/FdnG2F0GApGtAJZE4hWobk3FPXLHEstkZXqsuxDE7p6Os1w2gbKmfOmDvNZWHr tgBC2qVmQSXyDcxylF/yDIX6B0eAjrZnq7px3uD6IdSF30KN2w1SQ7giaYBGqExr TAbom/u2u7i73h4XaRQHoftBouzc6QBpo2OzBYeolkJgVJCx8sHj7BU1gBstp033 /kgogUJSgMGBcZeREhg= =G0uq -----END PGP SIGNATURE----- Merge tag 'mmc-v6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc Pull MMC fixes from Ulf Hansson: "MMC core: - Fix CQE error recovery path MMC host: - cqhci: Fix CQE error recovery path - sdhci-pci-gli: Fix initialization of LPM - sdhci-sprd: Fix enabling/disabling of the vqmmc regulator" * tag 'mmc-v6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: mmc: sdhci-sprd: Fix vqmmc not shutting down after the card was pulled mmc: sdhci-pci-gli: Disable LPM during initialization mmc: cqhci: Fix task clearing in CQE error recovery mmc: cqhci: Warn of halt or task clear failure mmc: block: Retry commands in CQE error recovery mmc: block: Be sure to wait while busy in CQE error recovery mmc: cqhci: Increase recovery halt timeout mmc: block: Do not lose cache flush during CQE error recovery
This commit is contained in:
commit
09443a144c
@ -1482,6 +1482,8 @@ static void mmc_blk_cqe_complete_rq(struct mmc_queue *mq, struct request *req)
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blk_mq_requeue_request(req, true);
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else
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__blk_mq_end_request(req, BLK_STS_OK);
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} else if (mq->in_recovery) {
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blk_mq_requeue_request(req, true);
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} else {
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blk_mq_end_request(req, BLK_STS_OK);
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}
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@ -551,7 +551,9 @@ int mmc_cqe_recovery(struct mmc_host *host)
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cmd.flags = MMC_RSP_R1B | MMC_CMD_AC;
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cmd.flags &= ~MMC_RSP_CRC; /* Ignore CRC */
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cmd.busy_timeout = MMC_CQE_RECOVERY_TIMEOUT;
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mmc_wait_for_cmd(host, &cmd, 0);
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mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES);
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mmc_poll_for_busy(host->card, MMC_CQE_RECOVERY_TIMEOUT, true, MMC_BUSY_IO);
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memset(&cmd, 0, sizeof(cmd));
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cmd.opcode = MMC_CMDQ_TASK_MGMT;
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@ -559,10 +561,13 @@ int mmc_cqe_recovery(struct mmc_host *host)
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cmd.flags = MMC_RSP_R1B | MMC_CMD_AC;
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cmd.flags &= ~MMC_RSP_CRC; /* Ignore CRC */
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cmd.busy_timeout = MMC_CQE_RECOVERY_TIMEOUT;
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err = mmc_wait_for_cmd(host, &cmd, 0);
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err = mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES);
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host->cqe_ops->cqe_recovery_finish(host);
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if (err)
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err = mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES);
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mmc_retune_release(host);
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return err;
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@ -942,8 +942,8 @@ static bool cqhci_clear_all_tasks(struct mmc_host *mmc, unsigned int timeout)
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ret = cqhci_tasks_cleared(cq_host);
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if (!ret)
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pr_debug("%s: cqhci: Failed to clear tasks\n",
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mmc_hostname(mmc));
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pr_warn("%s: cqhci: Failed to clear tasks\n",
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mmc_hostname(mmc));
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return ret;
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}
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@ -976,7 +976,7 @@ static bool cqhci_halt(struct mmc_host *mmc, unsigned int timeout)
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ret = cqhci_halted(cq_host);
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if (!ret)
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pr_debug("%s: cqhci: Failed to halt\n", mmc_hostname(mmc));
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pr_warn("%s: cqhci: Failed to halt\n", mmc_hostname(mmc));
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return ret;
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}
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@ -984,10 +984,10 @@ static bool cqhci_halt(struct mmc_host *mmc, unsigned int timeout)
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/*
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* After halting we expect to be able to use the command line. We interpret the
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* failure to halt to mean the data lines might still be in use (and the upper
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* layers will need to send a STOP command), so we set the timeout based on a
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* generous command timeout.
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* layers will need to send a STOP command), however failing to halt complicates
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* the recovery, so set a timeout that would reasonably allow I/O to complete.
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*/
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#define CQHCI_START_HALT_TIMEOUT 5
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#define CQHCI_START_HALT_TIMEOUT 500
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static void cqhci_recovery_start(struct mmc_host *mmc)
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{
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@ -1075,28 +1075,28 @@ static void cqhci_recovery_finish(struct mmc_host *mmc)
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ok = cqhci_halt(mmc, CQHCI_FINISH_HALT_TIMEOUT);
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if (!cqhci_clear_all_tasks(mmc, CQHCI_CLEAR_TIMEOUT))
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ok = false;
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/*
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* The specification contradicts itself, by saying that tasks cannot be
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* cleared if CQHCI does not halt, but if CQHCI does not halt, it should
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* be disabled/re-enabled, but not to disable before clearing tasks.
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* Have a go anyway.
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*/
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if (!ok) {
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pr_debug("%s: cqhci: disable / re-enable\n", mmc_hostname(mmc));
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cqcfg = cqhci_readl(cq_host, CQHCI_CFG);
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cqcfg &= ~CQHCI_ENABLE;
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cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
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cqcfg |= CQHCI_ENABLE;
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cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
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/* Be sure that there are no tasks */
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ok = cqhci_halt(mmc, CQHCI_FINISH_HALT_TIMEOUT);
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if (!cqhci_clear_all_tasks(mmc, CQHCI_CLEAR_TIMEOUT))
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ok = false;
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WARN_ON(!ok);
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}
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if (!cqhci_clear_all_tasks(mmc, CQHCI_CLEAR_TIMEOUT))
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ok = false;
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/* Disable to make sure tasks really are cleared */
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cqcfg = cqhci_readl(cq_host, CQHCI_CFG);
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cqcfg &= ~CQHCI_ENABLE;
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cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
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cqcfg = cqhci_readl(cq_host, CQHCI_CFG);
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cqcfg |= CQHCI_ENABLE;
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cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
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cqhci_halt(mmc, CQHCI_FINISH_HALT_TIMEOUT);
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if (!ok)
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cqhci_clear_all_tasks(mmc, CQHCI_CLEAR_TIMEOUT);
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cqhci_recover_mrqs(cq_host);
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@ -1189,6 +1189,32 @@ static void gl9763e_hs400_enhanced_strobe(struct mmc_host *mmc,
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sdhci_writel(host, val, SDHCI_GLI_9763E_HS400_ES_REG);
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}
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static void gl9763e_set_low_power_negotiation(struct sdhci_pci_slot *slot,
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bool enable)
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{
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struct pci_dev *pdev = slot->chip->pdev;
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u32 value;
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pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
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value &= ~GLI_9763E_VHS_REV;
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value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_W);
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pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
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pci_read_config_dword(pdev, PCIE_GLI_9763E_CFG, &value);
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if (enable)
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value &= ~GLI_9763E_CFG_LPSN_DIS;
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else
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value |= GLI_9763E_CFG_LPSN_DIS;
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pci_write_config_dword(pdev, PCIE_GLI_9763E_CFG, value);
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pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
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value &= ~GLI_9763E_VHS_REV;
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value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
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pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
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}
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static void sdhci_set_gl9763e_signaling(struct sdhci_host *host,
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unsigned int timing)
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{
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@ -1297,6 +1323,9 @@ static int gl9763e_add_host(struct sdhci_pci_slot *slot)
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if (ret)
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goto cleanup;
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/* Disable LPM negotiation to avoid entering L1 state. */
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gl9763e_set_low_power_negotiation(slot, false);
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return 0;
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cleanup:
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@ -1340,31 +1369,6 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
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}
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#ifdef CONFIG_PM
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static void gl9763e_set_low_power_negotiation(struct sdhci_pci_slot *slot, bool enable)
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{
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struct pci_dev *pdev = slot->chip->pdev;
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u32 value;
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pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
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value &= ~GLI_9763E_VHS_REV;
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value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_W);
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pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
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pci_read_config_dword(pdev, PCIE_GLI_9763E_CFG, &value);
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if (enable)
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value &= ~GLI_9763E_CFG_LPSN_DIS;
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else
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value |= GLI_9763E_CFG_LPSN_DIS;
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pci_write_config_dword(pdev, PCIE_GLI_9763E_CFG, value);
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pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
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value &= ~GLI_9763E_VHS_REV;
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value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
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pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
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}
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static int gl9763e_runtime_suspend(struct sdhci_pci_chip *chip)
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{
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struct sdhci_pci_slot *slot = chip->slots[0];
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@ -416,12 +416,33 @@ static void sdhci_sprd_request_done(struct sdhci_host *host,
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mmc_request_done(host->mmc, mrq);
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}
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static void sdhci_sprd_set_power(struct sdhci_host *host, unsigned char mode,
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unsigned short vdd)
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{
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struct mmc_host *mmc = host->mmc;
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switch (mode) {
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case MMC_POWER_OFF:
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mmc_regulator_set_ocr(host->mmc, mmc->supply.vmmc, 0);
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mmc_regulator_disable_vqmmc(mmc);
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break;
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case MMC_POWER_ON:
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mmc_regulator_enable_vqmmc(mmc);
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break;
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case MMC_POWER_UP:
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mmc_regulator_set_ocr(host->mmc, mmc->supply.vmmc, vdd);
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break;
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}
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}
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static struct sdhci_ops sdhci_sprd_ops = {
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.read_l = sdhci_sprd_readl,
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.write_l = sdhci_sprd_writel,
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.write_w = sdhci_sprd_writew,
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.write_b = sdhci_sprd_writeb,
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.set_clock = sdhci_sprd_set_clock,
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.set_power = sdhci_sprd_set_power,
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.get_max_clock = sdhci_sprd_get_max_clock,
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.get_min_clock = sdhci_sprd_get_min_clock,
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.set_bus_width = sdhci_set_bus_width,
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@ -823,6 +844,10 @@ static int sdhci_sprd_probe(struct platform_device *pdev)
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host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 |
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SDHCI_SUPPORT_DDR50);
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ret = mmc_regulator_get_supply(host->mmc);
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if (ret)
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goto pm_runtime_disable;
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ret = sdhci_setup_host(host);
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if (ret)
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goto pm_runtime_disable;
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