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drm/amdgpu: Move to gtt before cpu accesses dma buf.
To improve cpu read performance. This is implemented for APUs currently. v2: Adapt to change https://lists.freedesktop.org/archives/amd-gfx/2017-October/015174.html v3: Adapt to change "forward begin_cpu_access callback to drivers" v4: Instead of v3, reuse drm_gem dmabuf_ops here. Also some minor fixes as suggested. v5: only set dma_buf ops when it is valid (Samuel) Signed-off-by: Samuel Li <Samuel.Li@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -418,6 +418,8 @@ amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
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struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
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struct drm_gem_object *gobj,
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int flags);
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struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
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struct dma_buf *dma_buf);
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int amdgpu_gem_prime_pin(struct drm_gem_object *obj);
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void amdgpu_gem_prime_unpin(struct drm_gem_object *obj);
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struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *);
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@ -870,7 +870,7 @@ static struct drm_driver kms_driver = {
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.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
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.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
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.gem_prime_export = amdgpu_gem_prime_export,
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.gem_prime_import = drm_gem_prime_import,
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.gem_prime_import = amdgpu_gem_prime_import,
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.gem_prime_pin = amdgpu_gem_prime_pin,
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.gem_prime_unpin = amdgpu_gem_prime_unpin,
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.gem_prime_res_obj = amdgpu_gem_prime_res_obj,
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@ -26,6 +26,7 @@
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#include <drm/drmP.h>
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#include "amdgpu.h"
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#include "amdgpu_display.h"
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#include <drm/amdgpu_drm.h>
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#include <linux/dma-buf.h>
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@ -164,6 +165,50 @@ struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *obj)
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return bo->tbo.resv;
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}
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static int amdgpu_gem_begin_cpu_access(struct dma_buf *dma_buf,
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enum dma_data_direction direction)
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{
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struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
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struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
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struct ttm_operation_ctx ctx = { true, false };
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u32 domain = amdgpu_display_framebuffer_domains(adev);
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int ret;
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bool reads = (direction == DMA_BIDIRECTIONAL ||
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direction == DMA_FROM_DEVICE);
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if (!reads || !(domain & AMDGPU_GEM_DOMAIN_GTT))
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return 0;
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/* move to gtt */
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ret = amdgpu_bo_reserve(bo, false);
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if (unlikely(ret != 0))
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return ret;
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if (!bo->pin_count && (bo->allowed_domains & AMDGPU_GEM_DOMAIN_GTT)) {
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amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_GTT);
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ret = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
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}
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amdgpu_bo_unreserve(bo);
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return ret;
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}
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static const struct dma_buf_ops amdgpu_dmabuf_ops = {
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.attach = drm_gem_map_attach,
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.detach = drm_gem_map_detach,
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.map_dma_buf = drm_gem_map_dma_buf,
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.unmap_dma_buf = drm_gem_unmap_dma_buf,
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.release = drm_gem_dmabuf_release,
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.begin_cpu_access = amdgpu_gem_begin_cpu_access,
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.map = drm_gem_dmabuf_kmap,
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.map_atomic = drm_gem_dmabuf_kmap_atomic,
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.unmap = drm_gem_dmabuf_kunmap,
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.unmap_atomic = drm_gem_dmabuf_kunmap_atomic,
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.mmap = drm_gem_dmabuf_mmap,
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.vmap = drm_gem_dmabuf_vmap,
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.vunmap = drm_gem_dmabuf_vunmap,
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};
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struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
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struct drm_gem_object *gobj,
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int flags)
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@ -176,7 +221,30 @@ struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
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return ERR_PTR(-EPERM);
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buf = drm_gem_prime_export(dev, gobj, flags);
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if (!IS_ERR(buf))
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if (!IS_ERR(buf)) {
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buf->file->f_mapping = dev->anon_inode->i_mapping;
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buf->ops = &amdgpu_dmabuf_ops;
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}
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return buf;
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}
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struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
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struct dma_buf *dma_buf)
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{
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struct drm_gem_object *obj;
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if (dma_buf->ops == &amdgpu_dmabuf_ops) {
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obj = dma_buf->priv;
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if (obj->dev == dev) {
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/*
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* Importing dmabuf exported from out own gem increases
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* refcount on gem itself instead of f_count of dmabuf.
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*/
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drm_gem_object_get(obj);
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return obj;
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}
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}
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return drm_gem_prime_import(dev, dma_buf);
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}
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