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[libata] ata_piix: attempt to fix ICH8 support
Take into account the fact that ICH8 changed the register layout of the MAP and PCS register bits. Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@ -126,6 +126,7 @@ enum {
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ich6_sata = 4,
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ich6_sata_ahci = 5,
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ich6m_sata_ahci = 6,
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ich8_sata_ahci = 7,
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/* constants for mapping table */
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P0 = 0, /* port 0 */
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@ -142,11 +143,13 @@ enum {
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struct piix_map_db {
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const u32 mask;
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const u32 port_enable;
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const int present_shift;
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const int map[][4];
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};
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struct piix_host_priv {
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const int *map;
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const struct piix_map_db *map_db;
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};
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static int piix_init_one (struct pci_dev *pdev,
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@ -192,11 +195,11 @@ static const struct pci_device_id piix_pci_tbl[] = {
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/* Enterprise Southbridge 2 (where's the datasheet?) */
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{ 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
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/* SATA Controller 1 IDE (ICH8, no datasheet yet) */
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{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
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{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
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/* SATA Controller 2 IDE (ICH8, ditto) */
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{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
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{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
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/* Mobile SATA Controller IDE (ICH8M, ditto) */
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{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci },
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{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },
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{ } /* terminate list */
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};
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@ -296,6 +299,7 @@ static const struct ata_port_operations piix_sata_ops = {
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static const struct piix_map_db ich5_map_db = {
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.mask = 0x7,
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.port_enable = 0x3,
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.present_shift = 4,
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.map = {
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/* PM PS SM SS MAP */
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{ P0, NA, P1, NA }, /* 000b */
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@ -312,6 +316,7 @@ static const struct piix_map_db ich5_map_db = {
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static const struct piix_map_db ich6_map_db = {
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.mask = 0x3,
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.port_enable = 0xf,
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.present_shift = 4,
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.map = {
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/* PM PS SM SS MAP */
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{ P0, P2, P1, P3 }, /* 00b */
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@ -324,6 +329,7 @@ static const struct piix_map_db ich6_map_db = {
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static const struct piix_map_db ich6m_map_db = {
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.mask = 0x3,
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.port_enable = 0x5,
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.present_shift = 4,
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.map = {
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/* PM PS SM SS MAP */
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{ P0, P2, RV, RV }, /* 00b */
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@ -333,12 +339,26 @@ static const struct piix_map_db ich6m_map_db = {
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},
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};
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static const struct piix_map_db ich8_map_db = {
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.mask = 0x3,
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.port_enable = 0x3,
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.present_shift = 8,
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.map = {
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/* PM PS SM SS MAP */
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{ P0, RV, P1, RV }, /* 00b (hardwired) */
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{ RV, RV, RV, RV },
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{ RV, RV, RV, RV }, /* 10b (never) */
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{ RV, RV, RV, RV },
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},
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};
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static const struct piix_map_db *piix_map_db_table[] = {
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[ich5_sata] = &ich5_map_db,
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[esb_sata] = &ich5_map_db,
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[ich6_sata] = &ich6_map_db,
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[ich6_sata_ahci] = &ich6_map_db,
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[ich6m_sata_ahci] = &ich6m_map_db,
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[ich8_sata_ahci] = &ich8_map_db,
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};
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static struct ata_port_info piix_port_info[] = {
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@ -426,6 +446,18 @@ static struct ata_port_info piix_port_info[] = {
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.udma_mask = 0x7f, /* udma0-6 */
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.port_ops = &piix_sata_ops,
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},
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/* ich8_sata_ahci */
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{
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.sht = &piix_sht,
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.host_flags = ATA_FLAG_SATA | PIIX_FLAG_COMBINED_ICH6 |
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PIIX_FLAG_CHECKINTR | PIIX_FLAG_SCR |
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PIIX_FLAG_AHCI,
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.pio_mask = 0x1f, /* pio0-4 */
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.mwdma_mask = 0x07, /* mwdma0-2 */
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.udma_mask = 0x7f, /* udma0-6 */
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.port_ops = &piix_sata_ops,
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},
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};
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static struct pci_bits piix_enable_bits[] = {
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@ -534,7 +566,8 @@ static int piix_sata_prereset(struct ata_port *ap)
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port = map[base + i];
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if (port < 0)
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continue;
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if (ap->flags & PIIX_FLAG_IGNORE_PCS || pcs & 1 << (4 + port))
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if ((ap->flags & PIIX_FLAG_IGNORE_PCS) ||
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(pcs & 1 << (hpriv->map_db->present_shift + port)))
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present = 1;
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}
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@ -817,6 +850,7 @@ static void __devinit piix_init_sata_map(struct pci_dev *pdev,
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"invalid MAP value %u\n", map_value);
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hpriv->map = map;
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hpriv->map_db = map_db;
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}
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/**
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