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ARM: dts: add GPIO and MPP to MSM8660 PMIC
This adds the 8660 PMIC GPIO and MPP blocks to the MSM8660 DTSI. Verified against the vendor tree to be in these locations with these interrupts, tested on the APQ8060 Dragonboard. Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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0840ea9e44
@ -143,6 +143,44 @@
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#address-cells = <1>;
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#size-cells = <0>;
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pm8058_gpio: gpio@150 {
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compatible = "qcom,pm8058-gpio",
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"qcom,ssbi-gpio";
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reg = <0x150>;
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interrupt-parent = <&pmicintc>;
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interrupts = <192 1>, <193 1>, <194 1>,
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<195 1>, <196 1>, <197 1>,
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<198 1>, <199 1>, <200 1>,
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<201 1>, <202 1>, <203 1>,
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<204 1>, <205 1>, <206 1>,
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<207 1>, <208 1>, <209 1>,
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<210 1>, <211 1>, <212 1>,
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<213 1>, <214 1>, <215 1>,
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<216 1>, <217 1>, <218 1>,
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<219 1>, <220 1>, <221 1>,
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<222 1>, <223 1>, <224 1>,
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<225 1>, <226 1>, <227 1>,
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<228 1>, <229 1>, <230 1>,
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<231 1>, <232 1>, <233 1>,
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<234 1>, <235 1>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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pm8058_mpps: mpps@50 {
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compatible = "qcom,pm8058-mpp",
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"qcom,ssbi-mpp";
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reg = <0x50>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&pmicintc>;
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interrupts =
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<128 1>, <129 1>, <130 1>, <131 1>,
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<132 1>, <133 1>, <134 1>, <135 1>,
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<136 1>, <137 1>, <138 1>, <139 1>;
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};
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pwrkey@1c {
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compatible = "qcom,pm8058-pwrkey";
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reg = <0x1c>;
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