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add debug ports for CSRatlas7 SoC
Because Marco chip has never shipped to customers and has been replaced by Atlas7, so we do the below - drop Marco's debug port - add debug ports for Atlas7 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJUvkFoAAoJEDIv4aC191RhDlUP/3MbRNT5jDLm82r1ZXaetXi/ s2BeGuv313gceDAwWuNTISL855/dnEi56ifQtQUSRVWEadt199XLsugRPJ1xForF zo/VZ/0WkzyRx3mPrGQtjUkt0Tj4S6W6IwhYfjKjh4lNF1KsiTGM2UQnKgnqZD/w zqTGbK1WbcecQu02FcyhPX65Ic2kA18Mp0iMBANP4mLRQo5nfQ0fCGyHZ0DCAwHm RsYoDKekemheo7+hVQi9KAGioF3M+D6w4L0tsTciHMPDdwy68xuK1JcRL1x3545k m7yaj73bB7f4YmuvFgTcaA3BeiG1ZyyWA5yCwbzcTuhBMFenWJJnzvv7ykhPzvax z3R8E331+ZJLXHjUQdq6rDrZtuoEH4j1fZExgUmg2C3OGYSnhQLPMCwEniXTuMsE RbOarwGZZEm6fdSKqsHmhjKR5hMEQcScoQv7SnIrMvq+XPAJRI3VM9iLKiRChn0r af8PwkL1lLVSDI9Kbsg+S/QlH1SuSSew9CnBvyrII7DDY8om8mgVDw46QWwYuytc ELHCok9sNUbBjE/y7QwLIIIx4O1oAQ4BrYDKHFUpvVKlWjo8qmJ7+x4d9D02qp/y yfUjdZD04++45CrptDw1o6D0lhxN6aedJ6A7mIVYI2v3vO3fpSWFVKkxl6B4vNQC 7myeOF+fryWiQADYcmOk =Zt2B -----END PGP SIGNATURE----- Merge tag 'atlas7-lldebug-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux into next/soc Merge "CSR atlas7 debug ports for 3.20" from Barry Song: add debug ports for CSRatlas7 SoC Because Marco chip has never shipped to customers and has been replaced by Atlas7, so we do the below - drop Marco's debug port - add debug ports for Atlas7 * tag 'atlas7-lldebug-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux: ARM: sirf: add two debug ports for CSRatlas7 SoC ARM: sirf: drop Marco low-level debug port Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
0766c17fb9
@ -931,16 +931,28 @@ choice
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config DEBUG_SIRFPRIMA2_UART1
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config DEBUG_SIRFPRIMA2_UART1
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bool "Kernel low-level debugging messages via SiRFprimaII UART1"
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bool "Kernel low-level debugging messages via SiRFprimaII UART1"
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depends on ARCH_PRIMA2
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depends on ARCH_PRIMA2
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select DEBUG_SIRFSOC_UART
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help
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help
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Say Y here if you want the debug print routines to direct
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Say Y here if you want the debug print routines to direct
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their output to the uart1 port on SiRFprimaII devices.
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their output to the uart1 port on SiRFprimaII devices.
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config DEBUG_SIRFMARCO_UART1
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config DEBUG_SIRFATLAS7_UART0
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bool "Kernel low-level debugging messages via SiRFmarco UART1"
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bool "Kernel low-level debugging messages via SiRFatlas7 UART0"
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depends on ARCH_MARCO
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depends on ARCH_ATLAS7
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select DEBUG_SIRFSOC_UART
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help
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help
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Say Y here if you want the debug print routines to direct
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Say Y here if you want the debug print routines to direct
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their output to the uart1 port on SiRFmarco devices.
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their output to the uart0 port on SiRFATLAS7 devices.The uart0
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is used on SiRFATLAS7 as a extra debug port.sometimes an extra
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debug port can be very useful.
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config DEBUG_SIRFATLAS7_UART1
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bool "Kernel low-level debugging messages via SiRFatlas7 UART1"
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depends on ARCH_ATLAS7
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select DEBUG_SIRFSOC_UART
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help
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Say Y here if you want the debug print routines to direct
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their output to the uart1 port on SiRFATLAS7 devices.
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config STIH41X_DEBUG_ASC2
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config STIH41X_DEBUG_ASC2
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bool "Use StiH415/416 ASC2 UART for low-level debug"
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bool "Use StiH415/416 ASC2 UART for low-level debug"
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@ -1176,6 +1188,10 @@ config DEBUG_STI_UART
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bool
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bool
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depends on ARCH_STI
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depends on ARCH_STI
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config DEBUG_SIRFSOC_UART
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bool
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depends on ARCH_SIRF
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config DEBUG_LL_INCLUDE
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config DEBUG_LL_INCLUDE
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string
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string
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default "debug/sa1100.S" if DEBUG_SA1100
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default "debug/sa1100.S" if DEBUG_SA1100
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@ -1210,7 +1226,7 @@ config DEBUG_LL_INCLUDE
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default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA4
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default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA4
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default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART
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default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART
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default "debug/s5pv210.S" if DEBUG_S5PV210_UART
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default "debug/s5pv210.S" if DEBUG_S5PV210_UART
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default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1
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default "debug/sirf.S" if DEBUG_SIRFSOC_UART
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default "debug/sti.S" if DEBUG_STI_UART
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default "debug/sti.S" if DEBUG_STI_UART
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default "debug/tegra.S" if DEBUG_TEGRA_UART
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default "debug/tegra.S" if DEBUG_TEGRA_UART
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default "debug/ux500.S" if DEBUG_UX500_UART
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default "debug/ux500.S" if DEBUG_UX500_UART
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@ -1266,6 +1282,8 @@ config DEBUG_UART_PHYS
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default 0x11009000 if DEBUG_MT8135_UART3
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default 0x11009000 if DEBUG_MT8135_UART3
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default 0x16000000 if ARCH_INTEGRATOR
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default 0x16000000 if ARCH_INTEGRATOR
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default 0x18000300 if DEBUG_BCM_5301X
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default 0x18000300 if DEBUG_BCM_5301X
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default 0x18010000 if DEBUG_SIRFATLAS7_UART0
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default 0x18020000 if DEBUG_SIRFATLAS7_UART1
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default 0x1c090000 if DEBUG_VEXPRESS_UART0_RS1
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default 0x1c090000 if DEBUG_VEXPRESS_UART0_RS1
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default 0x20060000 if DEBUG_RK29_UART0
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default 0x20060000 if DEBUG_RK29_UART0
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default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
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default 0x20064000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
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@ -1292,6 +1310,7 @@ config DEBUG_UART_PHYS
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default 0x808c0000 if ARCH_EP93XX
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default 0x808c0000 if ARCH_EP93XX
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default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART
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default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART
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default 0xa9a00000 if DEBUG_MSM_UART
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default 0xa9a00000 if DEBUG_MSM_UART
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default 0xb0060000 if DEBUG_SIRFPRIMA2_UART1
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default 0xb0090000 if DEBUG_VEXPRESS_UART0_CRX
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default 0xb0090000 if DEBUG_VEXPRESS_UART0_CRX
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default 0xc0013000 if DEBUG_U300_UART
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default 0xc0013000 if DEBUG_U300_UART
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default 0xc8000000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN
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default 0xc8000000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN
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@ -1336,7 +1355,8 @@ config DEBUG_UART_PHYS
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DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF2 || \
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DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF2 || \
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DEBUG_RMOBILE_SCIFA0 || DEBUG_RMOBILE_SCIFA1 || \
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DEBUG_RMOBILE_SCIFA0 || DEBUG_RMOBILE_SCIFA1 || \
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DEBUG_RMOBILE_SCIFA4 || DEBUG_S3C24XX_UART || \
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DEBUG_RMOBILE_SCIFA4 || DEBUG_S3C24XX_UART || \
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DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART
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DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART || \
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DEBUG_SIRFSOC_UART
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config DEBUG_UART_VIRT
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config DEBUG_UART_VIRT
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hex "Virtual base address of debug UART"
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hex "Virtual base address of debug UART"
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@ -1395,7 +1415,10 @@ config DEBUG_UART_VIRT
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default 0xfec02000 if DEBUG_SOCFPGA_UART
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default 0xfec02000 if DEBUG_SOCFPGA_UART
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default 0xfec12000 if DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE
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default 0xfec12000 if DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE
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default 0xfec12100 if DEBUG_MVEBU_UART1_ALTERNATE
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default 0xfec12100 if DEBUG_MVEBU_UART1_ALTERNATE
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default 0xfec10000 if DEBUG_SIRFATLAS7_UART0
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default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0
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default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0
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default 0xfec20000 if DEBUG_SIRFATLAS7_UART1
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default 0xfec60000 if DEBUG_SIRFPRIMA2_UART1
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default 0xfec90000 if DEBUG_RK32_UART2
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default 0xfec90000 if DEBUG_RK32_UART2
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default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
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default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
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default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2
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default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2
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@ -1415,7 +1438,7 @@ config DEBUG_UART_VIRT
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depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
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depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
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DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \
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DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \
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DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART || \
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DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART || \
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DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART
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DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART || DEBUG_SIRFSOC_UART
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config DEBUG_UART_8250_SHIFT
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config DEBUG_UART_8250_SHIFT
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int "Register offset shift for the 8250 debug UART"
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int "Register offset shift for the 8250 debug UART"
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@ -6,37 +6,33 @@
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* Licensed under GPLv2 or later.
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* Licensed under GPLv2 or later.
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*/
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*/
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#if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1)
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#define SIRF_LLUART_TXFIFO_STATUS 0x0114
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#define SIRFSOC_UART1_PA_BASE 0xb0060000
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#define SIRF_LLUART_TXFIFO_DATA 0x0118
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#elif defined(CONFIG_DEBUG_SIRFMARCO_UART1)
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#define SIRFSOC_UART1_PA_BASE 0xcc060000
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#define SIRF_LLUART_TXFIFO_FULL (1 << 5)
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#ifdef CONFIG_DEBUG_SIRFATLAS7_UART0
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#define SIRF_LLUART_TXFIFO_EMPTY (1 << 8)
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#else
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#else
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#define SIRFSOC_UART1_PA_BASE 0
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#define SIRF_LLUART_TXFIFO_EMPTY (1 << 6)
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#endif
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#endif
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#define SIRFSOC_UART1_VA_BASE 0xFEC60000
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#define SIRFSOC_UART_TXFIFO_STATUS 0x0114
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#define SIRFSOC_UART_TXFIFO_DATA 0x0118
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#define SIRFSOC_UART1_TXFIFO_FULL (1 << 5)
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#define SIRFSOC_UART1_TXFIFO_EMPTY (1 << 6)
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.macro addruart, rp, rv, tmp
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.macro addruart, rp, rv, tmp
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ldr \rp, =SIRFSOC_UART1_PA_BASE @ physical
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ldr \rp, =CONFIG_DEBUG_UART_PHYS @ physical
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ldr \rv, =SIRFSOC_UART1_VA_BASE @ virtual
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ldr \rv, =CONFIG_DEBUG_UART_VIRT @ virtual
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.endm
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.endm
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.macro senduart,rd,rx
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.macro senduart,rd,rx
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str \rd, [\rx, #SIRFSOC_UART_TXFIFO_DATA]
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str \rd, [\rx, #SIRF_LLUART_TXFIFO_DATA]
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.endm
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.endm
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.macro busyuart,rd,rx
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.macro busyuart,rd,rx
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.endm
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.endm
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.macro waituart,rd,rx
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.macro waituart,rd,rx
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1001: ldr \rd, [\rx, #SIRFSOC_UART_TXFIFO_STATUS]
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1001: ldr \rd, [\rx, #SIRF_LLUART_TXFIFO_STATUS]
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tst \rd, #SIRFSOC_UART1_TXFIFO_EMPTY
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tst \rd, #SIRF_LLUART_TXFIFO_EMPTY
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beq 1001b
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beq 1001b
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.endm
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.endm
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@ -13,8 +13,6 @@
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#if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1)
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#if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1)
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#define SIRFSOC_UART1_PA_BASE 0xb0060000
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#define SIRFSOC_UART1_PA_BASE 0xb0060000
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#elif defined(CONFIG_DEBUG_SIRFMARCO_UART1)
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#define SIRFSOC_UART1_PA_BASE 0xcc060000
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#else
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#else
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#define SIRFSOC_UART1_PA_BASE 0
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#define SIRFSOC_UART1_PA_BASE 0
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#endif
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#endif
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