mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-11 04:18:39 +08:00
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Cross-merge networking fixes after downstream PR. No conflicts or adjacent changes. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski
commit
06f609b311
32
.editorconfig
Normal file
32
.editorconfig
Normal file
@ -0,0 +1,32 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
|
||||
root = true
|
||||
|
||||
[{*.{awk,c,dts,dtsi,dtso,h,mk,s,S},Kconfig,Makefile,Makefile.*}]
|
||||
charset = utf-8
|
||||
end_of_line = lf
|
||||
trim_trailing_whitespace = true
|
||||
insert_final_newline = true
|
||||
indent_style = tab
|
||||
indent_size = 8
|
||||
|
||||
[*.{json,py,rs}]
|
||||
charset = utf-8
|
||||
end_of_line = lf
|
||||
trim_trailing_whitespace = true
|
||||
insert_final_newline = true
|
||||
indent_style = space
|
||||
indent_size = 4
|
||||
|
||||
# this must be below the general *.py to overwrite it
|
||||
[tools/{perf,power,rcu,testing/kunit}/**.py,]
|
||||
indent_style = tab
|
||||
indent_size = 8
|
||||
|
||||
[*.yaml]
|
||||
charset = utf-8
|
||||
end_of_line = lf
|
||||
trim_trailing_whitespace = unset
|
||||
insert_final_newline = true
|
||||
indent_style = space
|
||||
indent_size = 2
|
||||
1
.gitignore
vendored
1
.gitignore
vendored
@ -96,6 +96,7 @@ modules.order
|
||||
#
|
||||
!.clang-format
|
||||
!.cocciconfig
|
||||
!.editorconfig
|
||||
!.get_maintainer.ignore
|
||||
!.gitattributes
|
||||
!.gitignore
|
||||
|
||||
@ -2,7 +2,8 @@
|
||||
TODO
|
||||
====
|
||||
|
||||
Version 2.14 December 21, 2018
|
||||
As of 6.7 kernel. See https://wiki.samba.org/index.php/LinuxCIFSKernel
|
||||
for list of features added by release
|
||||
|
||||
A Partial List of Missing Features
|
||||
==================================
|
||||
@ -12,22 +13,22 @@ for visible, important contributions to this module. Here
|
||||
is a partial list of the known problems and missing features:
|
||||
|
||||
a) SMB3 (and SMB3.1.1) missing optional features:
|
||||
multichannel performance optimizations, algorithmic channel selection,
|
||||
directory leases optimizations,
|
||||
support for faster packet signing (GMAC),
|
||||
support for compression over the network,
|
||||
T10 copy offload ie "ODX" (copy chunk, and "Duplicate Extents" ioctl
|
||||
are currently the only two server side copy mechanisms supported)
|
||||
|
||||
- multichannel (partially integrated), integration of multichannel with RDMA
|
||||
- directory leases (improved metadata caching). Currently only implemented for root dir
|
||||
- T10 copy offload ie "ODX" (copy chunk, and "Duplicate Extents" ioctl
|
||||
currently the only two server side copy mechanisms supported)
|
||||
b) Better optimized compounding and error handling for sparse file support,
|
||||
perhaps addition of new optional SMB3.1.1 fsctls to make collapse range
|
||||
and insert range more atomic
|
||||
|
||||
b) improved sparse file support (fiemap and SEEK_HOLE are implemented
|
||||
but additional features would be supportable by the protocol such
|
||||
as FALLOC_FL_COLLAPSE_RANGE and FALLOC_FL_INSERT_RANGE)
|
||||
|
||||
c) Directory entry caching relies on a 1 second timer, rather than
|
||||
using Directory Leases, currently only the root file handle is cached longer
|
||||
by leveraging Directory Leases
|
||||
c) Support for SMB3.1.1 over QUIC (and perhaps other socket based protocols
|
||||
like SCTP)
|
||||
|
||||
d) quota support (needs minor kernel change since quota calls otherwise
|
||||
won't make it to network filesystems or deviceless filesystems).
|
||||
won't make it to network filesystems or deviceless filesystems).
|
||||
|
||||
e) Additional use cases can be optimized to use "compounding" (e.g.
|
||||
open/query/close and open/setinfo/close) to reduce the number of
|
||||
@ -92,23 +93,20 @@ t) split cifs and smb3 support into separate modules so legacy (and less
|
||||
|
||||
v) Additional testing of POSIX Extensions for SMB3.1.1
|
||||
|
||||
w) Add support for additional strong encryption types, and additional spnego
|
||||
authentication mechanisms (see MS-SMB2). GCM-256 is now partially implemented.
|
||||
w) Support for the Mac SMB3.1.1 extensions to improve interop with Apple servers
|
||||
|
||||
x) Finish support for SMB3.1.1 compression
|
||||
x) Support for additional authentication options (e.g. IAKERB, peer-to-peer
|
||||
Kerberos, SCRAM and others supported by existing servers)
|
||||
|
||||
y) Improved tracing, more eBPF trace points, better scripts for performance
|
||||
analysis
|
||||
|
||||
Known Bugs
|
||||
==========
|
||||
|
||||
See https://bugzilla.samba.org - search on product "CifsVFS" for
|
||||
current bug list. Also check http://bugzilla.kernel.org (Product = File System, Component = CIFS)
|
||||
|
||||
1) existing symbolic links (Windows reparse points) are recognized but
|
||||
can not be created remotely. They are implemented for Samba and those that
|
||||
support the CIFS Unix extensions, although earlier versions of Samba
|
||||
overly restrict the pathnames.
|
||||
2) follow_link and readdir code does not follow dfs junctions
|
||||
but recognizes them
|
||||
and xfstest results e.g. https://wiki.samba.org/index.php/Xfstest-results-smb3
|
||||
|
||||
Misc testing to do
|
||||
==================
|
||||
|
||||
@ -81,7 +81,7 @@ much older and less secure than the default dialect SMB3 which includes
|
||||
many advanced security features such as downgrade attack detection
|
||||
and encrypted shares and stronger signing and authentication algorithms.
|
||||
There are additional mount options that may be helpful for SMB3 to get
|
||||
improved POSIX behavior (NB: can use vers=3.0 to force only SMB3, never 2.1):
|
||||
improved POSIX behavior (NB: can use vers=3 to force SMB3 or later, never 2.1):
|
||||
|
||||
``mfsymlinks`` and either ``cifsacl`` or ``modefromsid`` (usually with ``idsfromsid``)
|
||||
|
||||
@ -715,6 +715,7 @@ DebugData Displays information about active CIFS sessions and
|
||||
Stats Lists summary resource usage information as well as per
|
||||
share statistics.
|
||||
open_files List all the open file handles on all active SMB sessions.
|
||||
mount_params List of all mount parameters available for the module
|
||||
======================= =======================================================
|
||||
|
||||
Configuration pseudo-files:
|
||||
@ -864,6 +865,11 @@ i.e.::
|
||||
|
||||
echo "value" > /sys/module/cifs/parameters/<param>
|
||||
|
||||
More detailed descriptions of the available module parameters and their values
|
||||
can be seen by doing:
|
||||
|
||||
modinfo cifs (or modinfo smb3)
|
||||
|
||||
================= ==========================================================
|
||||
1. enable_oplocks Enable or disable oplocks. Oplocks are enabled by default.
|
||||
[Y/y/1]. To disable use any of [N/n/0].
|
||||
|
||||
@ -888,9 +888,9 @@
|
||||
memory region [offset, offset + size] for that kernel
|
||||
image. If '@offset' is omitted, then a suitable offset
|
||||
is selected automatically.
|
||||
[KNL, X86-64, ARM64, RISCV] Select a region under 4G first, and
|
||||
fall back to reserve region above 4G when '@offset'
|
||||
hasn't been specified.
|
||||
[KNL, X86-64, ARM64, RISCV, LoongArch] Select a region
|
||||
under 4G first, and fall back to reserve region above
|
||||
4G when '@offset' hasn't been specified.
|
||||
See Documentation/admin-guide/kdump/kdump.rst for further details.
|
||||
|
||||
crashkernel=range1:size1[,range2:size2,...][@offset]
|
||||
@ -901,25 +901,27 @@
|
||||
Documentation/admin-guide/kdump/kdump.rst for an example.
|
||||
|
||||
crashkernel=size[KMG],high
|
||||
[KNL, X86-64, ARM64, RISCV] range could be above 4G.
|
||||
[KNL, X86-64, ARM64, RISCV, LoongArch] range could be
|
||||
above 4G.
|
||||
Allow kernel to allocate physical memory region from top,
|
||||
so could be above 4G if system have more than 4G ram
|
||||
installed. Otherwise memory region will be allocated
|
||||
below 4G, if available.
|
||||
It will be ignored if crashkernel=X is specified.
|
||||
crashkernel=size[KMG],low
|
||||
[KNL, X86-64, ARM64, RISCV] range under 4G. When crashkernel=X,high
|
||||
is passed, kernel could allocate physical memory region
|
||||
above 4G, that cause second kernel crash on system
|
||||
that require some amount of low memory, e.g. swiotlb
|
||||
requires at least 64M+32K low memory, also enough extra
|
||||
low memory is needed to make sure DMA buffers for 32-bit
|
||||
devices won't run out. Kernel would try to allocate
|
||||
[KNL, X86-64, ARM64, RISCV, LoongArch] range under 4G.
|
||||
When crashkernel=X,high is passed, kernel could allocate
|
||||
physical memory region above 4G, that cause second kernel
|
||||
crash on system that require some amount of low memory,
|
||||
e.g. swiotlb requires at least 64M+32K low memory, also
|
||||
enough extra low memory is needed to make sure DMA buffers
|
||||
for 32-bit devices won't run out. Kernel would try to allocate
|
||||
default size of memory below 4G automatically. The default
|
||||
size is platform dependent.
|
||||
--> x86: max(swiotlb_size_or_default() + 8MiB, 256MiB)
|
||||
--> arm64: 128MiB
|
||||
--> riscv: 128MiB
|
||||
--> loongarch: 128MiB
|
||||
This one lets the user specify own low range under 4G
|
||||
for second kernel instead.
|
||||
0: to disable low allocation.
|
||||
|
||||
@ -71,6 +71,8 @@ stable kernels.
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A510 | #2658417 | ARM64_ERRATUM_2658417 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A510 | #3117295 | ARM64_ERRATUM_3117295 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A520 | #2966298 | ARM64_ERRATUM_2966298 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
|
||||
@ -235,11 +237,9 @@ stable kernels.
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Rockchip | RK3588 | #3588001 | ROCKCHIP_ERRATUM_3588001 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Fujitsu | A64FX | E#010001 | FUJITSU_ERRATUM_010001 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ASR | ASR8601 | #8601001 | N/A |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
|
||||
@ -6,17 +6,16 @@ Block io priorities
|
||||
Intro
|
||||
-----
|
||||
|
||||
With the introduction of cfq v3 (aka cfq-ts or time sliced cfq), basic io
|
||||
priorities are supported for reads on files. This enables users to io nice
|
||||
processes or process groups, similar to what has been possible with cpu
|
||||
scheduling for ages. This document mainly details the current possibilities
|
||||
with cfq; other io schedulers do not support io priorities thus far.
|
||||
The io priority feature enables users to io nice processes or process groups,
|
||||
similar to what has been possible with cpu scheduling for ages. Support for io
|
||||
priorities is io scheduler dependent and currently supported by bfq and
|
||||
mq-deadline.
|
||||
|
||||
Scheduling classes
|
||||
------------------
|
||||
|
||||
CFQ implements three generic scheduling classes that determine how io is
|
||||
served for a process.
|
||||
Three generic scheduling classes are implemented for io priorities that
|
||||
determine how io is served for a process.
|
||||
|
||||
IOPRIO_CLASS_RT: This is the realtime io class. This scheduling class is given
|
||||
higher priority than any other in the system, processes from this class are
|
||||
|
||||
477
Documentation/dev-tools/checkuapi.rst
Normal file
477
Documentation/dev-tools/checkuapi.rst
Normal file
@ -0,0 +1,477 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0-only
|
||||
|
||||
============
|
||||
UAPI Checker
|
||||
============
|
||||
|
||||
The UAPI checker (``scripts/check-uapi.sh``) is a shell script which
|
||||
checks UAPI header files for userspace backwards-compatibility across
|
||||
the git tree.
|
||||
|
||||
Options
|
||||
=======
|
||||
|
||||
This section will describe the options with which ``check-uapi.sh``
|
||||
can be run.
|
||||
|
||||
Usage::
|
||||
|
||||
check-uapi.sh [-b BASE_REF] [-p PAST_REF] [-j N] [-l ERROR_LOG] [-i] [-q] [-v]
|
||||
|
||||
Available options::
|
||||
|
||||
-b BASE_REF Base git reference to use for comparison. If unspecified or empty,
|
||||
will use any dirty changes in tree to UAPI files. If there are no
|
||||
dirty changes, HEAD will be used.
|
||||
-p PAST_REF Compare BASE_REF to PAST_REF (e.g. -p v6.1). If unspecified or empty,
|
||||
will use BASE_REF^1. Must be an ancestor of BASE_REF. Only headers
|
||||
that exist on PAST_REF will be checked for compatibility.
|
||||
-j JOBS Number of checks to run in parallel (default: number of CPU cores).
|
||||
-l ERROR_LOG Write error log to file (default: no error log is generated).
|
||||
-i Ignore ambiguous changes that may or may not break UAPI compatibility.
|
||||
-q Quiet operation.
|
||||
-v Verbose operation (print more information about each header being checked).
|
||||
|
||||
Environmental args::
|
||||
|
||||
ABIDIFF Custom path to abidiff binary
|
||||
CC C compiler (default is "gcc")
|
||||
ARCH Target architecture of C compiler (default is host arch)
|
||||
|
||||
Exit codes::
|
||||
|
||||
0) Success
|
||||
1) ABI difference detected
|
||||
2) Prerequisite not met
|
||||
|
||||
Examples
|
||||
========
|
||||
|
||||
Basic Usage
|
||||
-----------
|
||||
|
||||
First, let's try making a change to a UAPI header file that obviously
|
||||
won't break userspace::
|
||||
|
||||
cat << 'EOF' | patch -l -p1
|
||||
--- a/include/uapi/linux/acct.h
|
||||
+++ b/include/uapi/linux/acct.h
|
||||
@@ -21,7 +21,9 @@
|
||||
#include <asm/param.h>
|
||||
#include <asm/byteorder.h>
|
||||
|
||||
-/*
|
||||
+#define FOO
|
||||
+
|
||||
+/*
|
||||
* comp_t is a 16-bit "floating" point number with a 3-bit base 8
|
||||
* exponent and a 13-bit fraction.
|
||||
* comp2_t is 24-bit with 5-bit base 2 exponent and 20 bit fraction
|
||||
diff --git a/include/uapi/linux/bpf.h b/include/uapi/linux/bpf.h
|
||||
EOF
|
||||
|
||||
Now, let's use the script to validate::
|
||||
|
||||
% ./scripts/check-uapi.sh
|
||||
Installing user-facing UAPI headers from dirty tree... OK
|
||||
Installing user-facing UAPI headers from HEAD... OK
|
||||
Checking changes to UAPI headers between HEAD and dirty tree...
|
||||
All 912 UAPI headers compatible with x86 appear to be backwards compatible
|
||||
|
||||
Let's add another change that *might* break userspace::
|
||||
|
||||
cat << 'EOF' | patch -l -p1
|
||||
--- a/include/uapi/linux/bpf.h
|
||||
+++ b/include/uapi/linux/bpf.h
|
||||
@@ -74,7 +74,7 @@ struct bpf_insn {
|
||||
__u8 dst_reg:4; /* dest register */
|
||||
__u8 src_reg:4; /* source register */
|
||||
__s16 off; /* signed offset */
|
||||
- __s32 imm; /* signed immediate constant */
|
||||
+ __u32 imm; /* unsigned immediate constant */
|
||||
};
|
||||
|
||||
/* Key of an a BPF_MAP_TYPE_LPM_TRIE entry */
|
||||
EOF
|
||||
|
||||
The script will catch this::
|
||||
|
||||
% ./scripts/check-uapi.sh
|
||||
Installing user-facing UAPI headers from dirty tree... OK
|
||||
Installing user-facing UAPI headers from HEAD... OK
|
||||
Checking changes to UAPI headers between HEAD and dirty tree...
|
||||
==== ABI differences detected in include/linux/bpf.h from HEAD -> dirty tree ====
|
||||
[C] 'struct bpf_insn' changed:
|
||||
type size hasn't changed
|
||||
1 data member change:
|
||||
type of '__s32 imm' changed:
|
||||
typedef name changed from __s32 to __u32 at int-ll64.h:27:1
|
||||
underlying type 'int' changed:
|
||||
type name changed from 'int' to 'unsigned int'
|
||||
type size hasn't changed
|
||||
==================================================================================
|
||||
|
||||
error - 1/912 UAPI headers compatible with x86 appear _not_ to be backwards compatible
|
||||
|
||||
In this case, the script is reporting the type change because it could
|
||||
break a userspace program that passes in a negative number. Now, let's
|
||||
say you know that no userspace program could possibly be using a negative
|
||||
value in ``imm``, so changing to an unsigned type there shouldn't hurt
|
||||
anything. You can pass the ``-i`` flag to the script to ignore changes
|
||||
in which the userspace backwards compatibility is ambiguous::
|
||||
|
||||
% ./scripts/check-uapi.sh -i
|
||||
Installing user-facing UAPI headers from dirty tree... OK
|
||||
Installing user-facing UAPI headers from HEAD... OK
|
||||
Checking changes to UAPI headers between HEAD and dirty tree...
|
||||
All 912 UAPI headers compatible with x86 appear to be backwards compatible
|
||||
|
||||
Now, let's make a similar change that *will* break userspace::
|
||||
|
||||
cat << 'EOF' | patch -l -p1
|
||||
--- a/include/uapi/linux/bpf.h
|
||||
+++ b/include/uapi/linux/bpf.h
|
||||
@@ -71,8 +71,8 @@ enum {
|
||||
|
||||
struct bpf_insn {
|
||||
__u8 code; /* opcode */
|
||||
- __u8 dst_reg:4; /* dest register */
|
||||
__u8 src_reg:4; /* source register */
|
||||
+ __u8 dst_reg:4; /* dest register */
|
||||
__s16 off; /* signed offset */
|
||||
__s32 imm; /* signed immediate constant */
|
||||
};
|
||||
EOF
|
||||
|
||||
Since we're re-ordering an existing struct member, there's no ambiguity,
|
||||
and the script will report the breakage even if you pass ``-i``::
|
||||
|
||||
% ./scripts/check-uapi.sh -i
|
||||
Installing user-facing UAPI headers from dirty tree... OK
|
||||
Installing user-facing UAPI headers from HEAD... OK
|
||||
Checking changes to UAPI headers between HEAD and dirty tree...
|
||||
==== ABI differences detected in include/linux/bpf.h from HEAD -> dirty tree ====
|
||||
[C] 'struct bpf_insn' changed:
|
||||
type size hasn't changed
|
||||
2 data member changes:
|
||||
'__u8 dst_reg' offset changed from 8 to 12 (in bits) (by +4 bits)
|
||||
'__u8 src_reg' offset changed from 12 to 8 (in bits) (by -4 bits)
|
||||
==================================================================================
|
||||
|
||||
error - 1/912 UAPI headers compatible with x86 appear _not_ to be backwards compatible
|
||||
|
||||
Let's commit the breaking change, then commit the innocuous change::
|
||||
|
||||
% git commit -m 'Breaking UAPI change' include/uapi/linux/bpf.h
|
||||
[detached HEAD f758e574663a] Breaking UAPI change
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
% git commit -m 'Innocuous UAPI change' include/uapi/linux/acct.h
|
||||
[detached HEAD 2e87df769081] Innocuous UAPI change
|
||||
1 file changed, 3 insertions(+), 1 deletion(-)
|
||||
|
||||
Now, let's run the script again with no arguments::
|
||||
|
||||
% ./scripts/check-uapi.sh
|
||||
Installing user-facing UAPI headers from HEAD... OK
|
||||
Installing user-facing UAPI headers from HEAD^1... OK
|
||||
Checking changes to UAPI headers between HEAD^1 and HEAD...
|
||||
All 912 UAPI headers compatible with x86 appear to be backwards compatible
|
||||
|
||||
It doesn't catch any breaking change because, by default, it only
|
||||
compares ``HEAD`` to ``HEAD^1``. The breaking change was committed on
|
||||
``HEAD~2``. If we wanted the search scope to go back further, we'd have to
|
||||
use the ``-p`` option to pass a different past reference. In this case,
|
||||
let's pass ``-p HEAD~2`` to the script so it checks UAPI changes between
|
||||
``HEAD~2`` and ``HEAD``::
|
||||
|
||||
% ./scripts/check-uapi.sh -p HEAD~2
|
||||
Installing user-facing UAPI headers from HEAD... OK
|
||||
Installing user-facing UAPI headers from HEAD~2... OK
|
||||
Checking changes to UAPI headers between HEAD~2 and HEAD...
|
||||
==== ABI differences detected in include/linux/bpf.h from HEAD~2 -> HEAD ====
|
||||
[C] 'struct bpf_insn' changed:
|
||||
type size hasn't changed
|
||||
2 data member changes:
|
||||
'__u8 dst_reg' offset changed from 8 to 12 (in bits) (by +4 bits)
|
||||
'__u8 src_reg' offset changed from 12 to 8 (in bits) (by -4 bits)
|
||||
==============================================================================
|
||||
|
||||
error - 1/912 UAPI headers compatible with x86 appear _not_ to be backwards compatible
|
||||
|
||||
Alternatively, we could have also run with ``-b HEAD~``. This would set the
|
||||
base reference to ``HEAD~`` so then the script would compare it to ``HEAD~^1``.
|
||||
|
||||
Architecture-specific Headers
|
||||
-----------------------------
|
||||
|
||||
Consider this change::
|
||||
|
||||
cat << 'EOF' | patch -l -p1
|
||||
--- a/arch/arm64/include/uapi/asm/sigcontext.h
|
||||
+++ b/arch/arm64/include/uapi/asm/sigcontext.h
|
||||
@@ -70,6 +70,7 @@ struct sigcontext {
|
||||
struct _aarch64_ctx {
|
||||
__u32 magic;
|
||||
__u32 size;
|
||||
+ __u32 new_var;
|
||||
};
|
||||
|
||||
#define FPSIMD_MAGIC 0x46508001
|
||||
EOF
|
||||
|
||||
This is a change to an arm64-specific UAPI header file. In this example, I'm
|
||||
running the script from an x86 machine with an x86 compiler, so, by default,
|
||||
the script only checks x86-compatible UAPI header files::
|
||||
|
||||
% ./scripts/check-uapi.sh
|
||||
Installing user-facing UAPI headers from dirty tree... OK
|
||||
Installing user-facing UAPI headers from HEAD... OK
|
||||
No changes to UAPI headers were applied between HEAD and dirty tree
|
||||
|
||||
With an x86 compiler, we can't check header files in ``arch/arm64``, so the
|
||||
script doesn't even try.
|
||||
|
||||
If we want to check the header file, we'll have to use an arm64 compiler and
|
||||
set ``ARCH`` accordingly::
|
||||
|
||||
% CC=aarch64-linux-gnu-gcc ARCH=arm64 ./scripts/check-uapi.sh
|
||||
Installing user-facing UAPI headers from dirty tree... OK
|
||||
Installing user-facing UAPI headers from HEAD... OK
|
||||
Checking changes to UAPI headers between HEAD and dirty tree...
|
||||
==== ABI differences detected in include/asm/sigcontext.h from HEAD -> dirty tree ====
|
||||
[C] 'struct _aarch64_ctx' changed:
|
||||
type size changed from 64 to 96 (in bits)
|
||||
1 data member insertion:
|
||||
'__u32 new_var', at offset 64 (in bits) at sigcontext.h:73:1
|
||||
-- snip --
|
||||
[C] 'struct zt_context' changed:
|
||||
type size changed from 128 to 160 (in bits)
|
||||
2 data member changes (1 filtered):
|
||||
'__u16 nregs' offset changed from 64 to 96 (in bits) (by +32 bits)
|
||||
'__u16 __reserved[3]' offset changed from 80 to 112 (in bits) (by +32 bits)
|
||||
=======================================================================================
|
||||
|
||||
error - 1/884 UAPI headers compatible with arm64 appear _not_ to be backwards compatible
|
||||
|
||||
We can see with ``ARCH`` and ``CC`` set properly for the file, the ABI
|
||||
change is reported properly. Also notice that the total number of UAPI
|
||||
header files checked by the script changes. This is because the number
|
||||
of headers installed for arm64 platforms is different than x86.
|
||||
|
||||
Cross-Dependency Breakages
|
||||
--------------------------
|
||||
|
||||
Consider this change::
|
||||
|
||||
cat << 'EOF' | patch -l -p1
|
||||
--- a/include/uapi/linux/types.h
|
||||
+++ b/include/uapi/linux/types.h
|
||||
@@ -52,7 +52,7 @@ typedef __u32 __bitwise __wsum;
|
||||
#define __aligned_be64 __be64 __attribute__((aligned(8)))
|
||||
#define __aligned_le64 __le64 __attribute__((aligned(8)))
|
||||
|
||||
-typedef unsigned __bitwise __poll_t;
|
||||
+typedef unsigned short __bitwise __poll_t;
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* _UAPI_LINUX_TYPES_H */
|
||||
EOF
|
||||
|
||||
Here, we're changing a ``typedef`` in ``types.h``. This doesn't break
|
||||
a UAPI in ``types.h``, but other UAPIs in the tree may break due to
|
||||
this change::
|
||||
|
||||
% ./scripts/check-uapi.sh
|
||||
Installing user-facing UAPI headers from dirty tree... OK
|
||||
Installing user-facing UAPI headers from HEAD... OK
|
||||
Checking changes to UAPI headers between HEAD and dirty tree...
|
||||
==== ABI differences detected in include/linux/eventpoll.h from HEAD -> dirty tree ====
|
||||
[C] 'struct epoll_event' changed:
|
||||
type size changed from 96 to 80 (in bits)
|
||||
2 data member changes:
|
||||
type of '__poll_t events' changed:
|
||||
underlying type 'unsigned int' changed:
|
||||
type name changed from 'unsigned int' to 'unsigned short int'
|
||||
type size changed from 32 to 16 (in bits)
|
||||
'__u64 data' offset changed from 32 to 16 (in bits) (by -16 bits)
|
||||
========================================================================================
|
||||
include/linux/eventpoll.h did not change between HEAD and dirty tree...
|
||||
It's possible a change to one of the headers it includes caused this error:
|
||||
#include <linux/fcntl.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
Note that the script noticed the failing header file did not change,
|
||||
so it assumes one of its includes must have caused the breakage. Indeed,
|
||||
we can see ``linux/types.h`` is used from ``eventpoll.h``.
|
||||
|
||||
UAPI Header Removals
|
||||
--------------------
|
||||
|
||||
Consider this change::
|
||||
|
||||
cat << 'EOF' | patch -l -p1
|
||||
diff --git a/include/uapi/asm-generic/Kbuild b/include/uapi/asm-generic/Kbuild
|
||||
index ebb180aac74e..a9c88b0a8b3b 100644
|
||||
--- a/include/uapi/asm-generic/Kbuild
|
||||
+++ b/include/uapi/asm-generic/Kbuild
|
||||
@@ -31,6 +31,6 @@ mandatory-y += stat.h
|
||||
mandatory-y += statfs.h
|
||||
mandatory-y += swab.h
|
||||
mandatory-y += termbits.h
|
||||
-mandatory-y += termios.h
|
||||
+#mandatory-y += termios.h
|
||||
mandatory-y += types.h
|
||||
mandatory-y += unistd.h
|
||||
EOF
|
||||
|
||||
This script removes a UAPI header file from the install list. Let's run
|
||||
the script::
|
||||
|
||||
% ./scripts/check-uapi.sh
|
||||
Installing user-facing UAPI headers from dirty tree... OK
|
||||
Installing user-facing UAPI headers from HEAD... OK
|
||||
Checking changes to UAPI headers between HEAD and dirty tree...
|
||||
==== UAPI header include/asm/termios.h was removed between HEAD and dirty tree ====
|
||||
|
||||
error - 1/912 UAPI headers compatible with x86 appear _not_ to be backwards compatible
|
||||
|
||||
Removing a UAPI header is considered a breaking change, and the script
|
||||
will flag it as such.
|
||||
|
||||
Checking Historic UAPI Compatibility
|
||||
------------------------------------
|
||||
|
||||
You can use the ``-b`` and ``-p`` options to examine different chunks of your
|
||||
git tree. For example, to check all changed UAPI header files between tags
|
||||
v6.0 and v6.1, you'd run::
|
||||
|
||||
% ./scripts/check-uapi.sh -b v6.1 -p v6.0
|
||||
Installing user-facing UAPI headers from v6.1... OK
|
||||
Installing user-facing UAPI headers from v6.0... OK
|
||||
Checking changes to UAPI headers between v6.0 and v6.1...
|
||||
|
||||
--- snip ---
|
||||
error - 37/907 UAPI headers compatible with x86 appear _not_ to be backwards compatible
|
||||
|
||||
Note: Before v5.3, a header file needed by the script is not present,
|
||||
so the script is unable to check changes before then.
|
||||
|
||||
You'll notice that the script detected many UAPI changes that are not
|
||||
backwards compatible. Knowing that kernel UAPIs are supposed to be stable
|
||||
forever, this is an alarming result. This brings us to the next section:
|
||||
caveats.
|
||||
|
||||
Caveats
|
||||
=======
|
||||
|
||||
The UAPI checker makes no assumptions about the author's intention, so some
|
||||
types of changes may be flagged even though they intentionally break UAPI.
|
||||
|
||||
Removals For Refactoring or Deprecation
|
||||
---------------------------------------
|
||||
|
||||
Sometimes drivers for very old hardware are removed, such as in this example::
|
||||
|
||||
% ./scripts/check-uapi.sh -b ba47652ba655
|
||||
Installing user-facing UAPI headers from ba47652ba655... OK
|
||||
Installing user-facing UAPI headers from ba47652ba655^1... OK
|
||||
Checking changes to UAPI headers between ba47652ba655^1 and ba47652ba655...
|
||||
==== UAPI header include/linux/meye.h was removed between ba47652ba655^1 and ba47652ba655 ====
|
||||
|
||||
error - 1/910 UAPI headers compatible with x86 appear _not_ to be backwards compatible
|
||||
|
||||
The script will always flag removals (even if they're intentional).
|
||||
|
||||
Struct Expansions
|
||||
-----------------
|
||||
|
||||
Depending on how a structure is handled in kernelspace, a change which
|
||||
expands a struct could be non-breaking.
|
||||
|
||||
If a struct is used as the argument to an ioctl, then the kernel driver
|
||||
must be able to handle ioctl commands of any size. Beyond that, you need
|
||||
to be careful when copying data from the user. Say, for example, that
|
||||
``struct foo`` is changed like this::
|
||||
|
||||
struct foo {
|
||||
__u64 a; /* added in version 1 */
|
||||
+ __u32 b; /* added in version 2 */
|
||||
+ __u32 c; /* added in version 2 */
|
||||
}
|
||||
|
||||
By default, the script will flag this kind of change for further review::
|
||||
|
||||
[C] 'struct foo' changed:
|
||||
type size changed from 64 to 128 (in bits)
|
||||
2 data member insertions:
|
||||
'__u32 b', at offset 64 (in bits)
|
||||
'__u32 c', at offset 96 (in bits)
|
||||
|
||||
However, it is possible that this change was made safely.
|
||||
|
||||
If a userspace program was built with version 1, it will think
|
||||
``sizeof(struct foo)`` is 8. That size will be encoded in the
|
||||
ioctl value that gets sent to the kernel. If the kernel is built
|
||||
with version 2, it will think the ``sizeof(struct foo)`` is 16.
|
||||
|
||||
The kernel can use the ``_IOC_SIZE`` macro to get the size encoded
|
||||
in the ioctl code that the user passed in and then use
|
||||
``copy_struct_from_user()`` to safely copy the value::
|
||||
|
||||
int handle_ioctl(unsigned long cmd, unsigned long arg)
|
||||
{
|
||||
switch _IOC_NR(cmd) {
|
||||
0x01: {
|
||||
struct foo my_cmd; /* size 16 in the kernel */
|
||||
|
||||
ret = copy_struct_from_user(&my_cmd, arg, sizeof(struct foo), _IOC_SIZE(cmd));
|
||||
...
|
||||
|
||||
``copy_struct_from_user`` will zero the struct in the kernel and then copy
|
||||
only the bytes passed in from the user (leaving new members zeroized).
|
||||
If the user passed in a larger struct, the extra members are ignored.
|
||||
|
||||
If you know this situation is accounted for in the kernel code, you can
|
||||
pass ``-i`` to the script, and struct expansions like this will be ignored.
|
||||
|
||||
Flex Array Migration
|
||||
--------------------
|
||||
|
||||
While the script handles expansion into an existing flex array, it does
|
||||
still flag initial migration to flex arrays from 1-element fake flex
|
||||
arrays. For example::
|
||||
|
||||
struct foo {
|
||||
__u32 x;
|
||||
- __u32 flex[1]; /* fake flex */
|
||||
+ __u32 flex[]; /* real flex */
|
||||
};
|
||||
|
||||
This change would be flagged by the script::
|
||||
|
||||
[C] 'struct foo' changed:
|
||||
type size changed from 64 to 32 (in bits)
|
||||
1 data member change:
|
||||
type of '__u32 flex[1]' changed:
|
||||
type name changed from '__u32[1]' to '__u32[]'
|
||||
array type size changed from 32 to 'unknown'
|
||||
array type subrange 1 changed length from 1 to 'unknown'
|
||||
|
||||
At this time, there's no way to filter these types of changes, so be
|
||||
aware of this possible false positive.
|
||||
|
||||
Summary
|
||||
-------
|
||||
|
||||
While many types of false positives are filtered out by the script,
|
||||
it's possible there are some cases where the script flags a change
|
||||
which does not break UAPI. It's also possible a change which *does*
|
||||
break userspace would not be flagged by this script. While the script
|
||||
has been run on much of the kernel history, there could still be corner
|
||||
cases that are not accounted for.
|
||||
|
||||
The intention is for this script to be used as a quick check for
|
||||
maintainers or automated tooling, not as the end-all authority on
|
||||
patch compatibility. It's best to remember: use your best judgment
|
||||
(and ideally a unit test in userspace) to make sure your UAPI changes
|
||||
are backwards-compatible!
|
||||
@ -31,6 +31,7 @@ Documentation/dev-tools/testing-overview.rst
|
||||
kselftest
|
||||
kunit/index
|
||||
ktap
|
||||
checkuapi
|
||||
|
||||
|
||||
.. only:: subproject and html
|
||||
|
||||
@ -19,19 +19,4 @@ properties:
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
examples:
|
||||
- |
|
||||
dma: dma-controller@48000000 {
|
||||
compatible = "ti,omap-sdma";
|
||||
reg = <0x48000000 0x1000>;
|
||||
interrupts = <0 12 0x4>,
|
||||
<0 13 0x4>,
|
||||
<0 14 0x4>,
|
||||
<0 15 0x4>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <32>;
|
||||
dma-requests = <127>;
|
||||
dma-channel-mask = <0xfffe>;
|
||||
};
|
||||
|
||||
...
|
||||
|
||||
@ -40,15 +40,4 @@ required:
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
examples:
|
||||
- |
|
||||
sdma_xbar: dma-router@4a002b78 {
|
||||
compatible = "ti,dra7-dma-crossbar";
|
||||
reg = <0x4a002b78 0xfc>;
|
||||
#dma-cells = <1>;
|
||||
dma-requests = <205>;
|
||||
ti,dma-safe-map = <0>;
|
||||
dma-masters = <&sdma>;
|
||||
};
|
||||
|
||||
...
|
||||
|
||||
@ -0,0 +1,62 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/dma/loongson,ls2x-apbdma.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Loongson LS2X APB DMA controller
|
||||
|
||||
description:
|
||||
The Loongson LS2X APB DMA controller is used for transferring data
|
||||
between system memory and the peripherals on the APB bus.
|
||||
|
||||
maintainers:
|
||||
- Binbin Zhou <zhoubinbin@loongson.cn>
|
||||
|
||||
allOf:
|
||||
- $ref: dma-controller.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- const: loongson,ls2k1000-apbdma
|
||||
- items:
|
||||
- const: loongson,ls2k0500-apbdma
|
||||
- const: loongson,ls2k1000-apbdma
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
'#dma-cells':
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- '#dma-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/clock/loongson,ls2k-clk.h>
|
||||
|
||||
dma-controller@1fe00c00 {
|
||||
compatible = "loongson,ls2k1000-apbdma";
|
||||
reg = <0x1fe00c00 0x8>;
|
||||
interrupt-parent = <&liointc1>;
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk LOONGSON2_APB_CLK>;
|
||||
#dma-cells = <1>;
|
||||
};
|
||||
|
||||
...
|
||||
@ -53,6 +53,9 @@ properties:
|
||||
ADMA_CHn_CTRL register.
|
||||
const: 1
|
||||
|
||||
dma-channel-mask:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
@ -32,6 +32,8 @@ properties:
|
||||
- qcom,sm8350-gpi-dma
|
||||
- qcom,sm8450-gpi-dma
|
||||
- qcom,sm8550-gpi-dma
|
||||
- qcom,sm8650-gpi-dma
|
||||
- qcom,x1e80100-gpi-dma
|
||||
- const: qcom,sm6350-gpi-dma
|
||||
- items:
|
||||
- enum:
|
||||
|
||||
@ -16,7 +16,7 @@ properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- renesas,r9a07g043-dmac # RZ/G2UL
|
||||
- renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five
|
||||
- renesas,r9a07g044-dmac # RZ/G2{L,LC}
|
||||
- renesas,r9a07g054-dmac # RZ/V2L
|
||||
- const: renesas,rz-dmac
|
||||
|
||||
@ -29,6 +29,7 @@ properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- microchip,mpfs-pdma
|
||||
- sifive,fu540-c000-pdma
|
||||
- const: sifive,pdma0
|
||||
description:
|
||||
|
||||
@ -37,11 +37,11 @@ properties:
|
||||
|
||||
reg:
|
||||
minItems: 3
|
||||
maxItems: 5
|
||||
maxItems: 9
|
||||
|
||||
reg-names:
|
||||
minItems: 3
|
||||
maxItems: 5
|
||||
maxItems: 9
|
||||
|
||||
"#dma-cells":
|
||||
const: 3
|
||||
@ -141,7 +141,10 @@ allOf:
|
||||
ti,sci-rm-range-tchan: false
|
||||
|
||||
reg:
|
||||
maxItems: 3
|
||||
items:
|
||||
- description: BCDMA Control /Status Registers region
|
||||
- description: RX Channel Realtime Registers region
|
||||
- description: Ring Realtime Registers region
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
@ -161,14 +164,29 @@ allOf:
|
||||
properties:
|
||||
reg:
|
||||
minItems: 5
|
||||
items:
|
||||
- description: BCDMA Control /Status Registers region
|
||||
- description: Block Copy Channel Realtime Registers region
|
||||
- description: RX Channel Realtime Registers region
|
||||
- description: TX Channel Realtime Registers region
|
||||
- description: Ring Realtime Registers region
|
||||
- description: Ring Configuration Registers region
|
||||
- description: TX Channel Configuration Registers region
|
||||
- description: RX Channel Configuration Registers region
|
||||
- description: Block Copy Channel Configuration Registers region
|
||||
|
||||
reg-names:
|
||||
minItems: 5
|
||||
items:
|
||||
- const: gcfg
|
||||
- const: bchanrt
|
||||
- const: rchanrt
|
||||
- const: tchanrt
|
||||
- const: ringrt
|
||||
- const: ring
|
||||
- const: tchan
|
||||
- const: rchan
|
||||
- const: bchan
|
||||
|
||||
required:
|
||||
- ti,sci-rm-range-bchan
|
||||
@ -184,7 +202,11 @@ allOf:
|
||||
ti,sci-rm-range-bchan: false
|
||||
|
||||
reg:
|
||||
maxItems: 4
|
||||
items:
|
||||
- description: BCDMA Control /Status Registers region
|
||||
- description: RX Channel Realtime Registers region
|
||||
- description: TX Channel Realtime Registers region
|
||||
- description: Ring Realtime Registers region
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
@ -220,8 +242,13 @@ examples:
|
||||
<0x0 0x4c000000 0x0 0x20000>,
|
||||
<0x0 0x4a820000 0x0 0x20000>,
|
||||
<0x0 0x4aa40000 0x0 0x20000>,
|
||||
<0x0 0x4bc00000 0x0 0x100000>;
|
||||
reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
|
||||
<0x0 0x4bc00000 0x0 0x100000>,
|
||||
<0x0 0x48600000 0x0 0x8000>,
|
||||
<0x0 0x484a4000 0x0 0x2000>,
|
||||
<0x0 0x484c2000 0x0 0x2000>,
|
||||
<0x0 0x48420000 0x0 0x2000>;
|
||||
reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
|
||||
"ring", "tchan", "rchan", "bchan";
|
||||
msi-parent = <&inta_main_dmss>;
|
||||
#dma-cells = <3>;
|
||||
|
||||
|
||||
@ -45,14 +45,28 @@ properties:
|
||||
The second cell is the ASEL value for the channel
|
||||
|
||||
reg:
|
||||
maxItems: 4
|
||||
minItems: 4
|
||||
items:
|
||||
- description: Packet DMA Control /Status Registers region
|
||||
- description: RX Channel Realtime Registers region
|
||||
- description: TX Channel Realtime Registers region
|
||||
- description: Ring Realtime Registers region
|
||||
- description: Ring Configuration Registers region
|
||||
- description: TX Configuration Registers region
|
||||
- description: RX Configuration Registers region
|
||||
- description: RX Flow Configuration Registers region
|
||||
|
||||
reg-names:
|
||||
minItems: 4
|
||||
items:
|
||||
- const: gcfg
|
||||
- const: rchanrt
|
||||
- const: tchanrt
|
||||
- const: ringrt
|
||||
- const: ring
|
||||
- const: tchan
|
||||
- const: rchan
|
||||
- const: rflow
|
||||
|
||||
msi-parent: true
|
||||
|
||||
@ -136,8 +150,14 @@ examples:
|
||||
reg = <0x0 0x485c0000 0x0 0x100>,
|
||||
<0x0 0x4a800000 0x0 0x20000>,
|
||||
<0x0 0x4aa00000 0x0 0x40000>,
|
||||
<0x0 0x4b800000 0x0 0x400000>;
|
||||
reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
|
||||
<0x0 0x4b800000 0x0 0x400000>,
|
||||
<0x0 0x485e0000 0x0 0x20000>,
|
||||
<0x0 0x484a0000 0x0 0x4000>,
|
||||
<0x0 0x484c0000 0x0 0x2000>,
|
||||
<0x0 0x48430000 0x0 0x4000>;
|
||||
reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
|
||||
"ring", "tchan", "rchan", "rflow";
|
||||
|
||||
msi-parent = <&inta_main_dmss>;
|
||||
#dma-cells = <2>;
|
||||
|
||||
|
||||
@ -69,13 +69,24 @@ properties:
|
||||
- ti,j721e-navss-mcu-udmap
|
||||
|
||||
reg:
|
||||
maxItems: 3
|
||||
minItems: 3
|
||||
items:
|
||||
- description: UDMA-P Control /Status Registers region
|
||||
- description: RX Channel Realtime Registers region
|
||||
- description: TX Channel Realtime Registers region
|
||||
- description: TX Configuration Registers region
|
||||
- description: RX Configuration Registers region
|
||||
- description: RX Flow Configuration Registers region
|
||||
|
||||
reg-names:
|
||||
minItems: 3
|
||||
items:
|
||||
- const: gcfg
|
||||
- const: rchanrt
|
||||
- const: tchanrt
|
||||
- const: tchan
|
||||
- const: rchan
|
||||
- const: rflow
|
||||
|
||||
msi-parent: true
|
||||
|
||||
@ -158,8 +169,11 @@ examples:
|
||||
compatible = "ti,am654-navss-main-udmap";
|
||||
reg = <0x0 0x31150000 0x0 0x100>,
|
||||
<0x0 0x34000000 0x0 0x100000>,
|
||||
<0x0 0x35000000 0x0 0x100000>;
|
||||
reg-names = "gcfg", "rchanrt", "tchanrt";
|
||||
<0x0 0x35000000 0x0 0x100000>,
|
||||
<0x0 0x30b00000 0x0 0x20000>,
|
||||
<0x0 0x30c00000 0x0 0x8000>,
|
||||
<0x0 0x30d00000 0x0 0x4000>;
|
||||
reg-names = "gcfg", "rchanrt", "tchanrt", "tchan", "rchan", "rflow";
|
||||
#dma-cells = <1>;
|
||||
|
||||
ti,ringacc = <&ringacc>;
|
||||
|
||||
@ -11,8 +11,13 @@ maintainers:
|
||||
|
||||
description: |
|
||||
This interrupt controller is found in the Loongson-3 family of chips and
|
||||
Loongson-2K1000 chip, as the primary package interrupt controller which
|
||||
Loongson-2K series chips, as the primary package interrupt controller which
|
||||
can route local I/O interrupt to interrupt lines of cores.
|
||||
Be aware of the following points.
|
||||
1.The Loongson-2K0500 is a single core CPU;
|
||||
2.The Loongson-2K0500/2K1000 has 64 device interrupt sources as inputs, so we
|
||||
need to define two nodes in dts{i} to describe the "0-31" and "32-61" interrupt
|
||||
sources respectively.
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/interrupt-controller.yaml#
|
||||
@ -33,6 +38,7 @@ properties:
|
||||
- const: main
|
||||
- const: isr0
|
||||
- const: isr1
|
||||
minItems: 2
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
@ -45,11 +51,9 @@ properties:
|
||||
interrupt-names:
|
||||
description: List of names for the parent interrupts.
|
||||
items:
|
||||
- const: int0
|
||||
- const: int1
|
||||
- const: int2
|
||||
- const: int3
|
||||
pattern: int[0-3]
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
|
||||
'#interrupt-cells':
|
||||
const: 2
|
||||
@ -69,6 +73,7 @@ required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
- interrupt-controller
|
||||
- '#interrupt-cells'
|
||||
- loongson,parent_int_map
|
||||
@ -86,7 +91,8 @@ if:
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
minItems: 3
|
||||
minItems: 2
|
||||
maxItems: 3
|
||||
|
||||
required:
|
||||
- reg-names
|
||||
|
||||
61
Documentation/devicetree/bindings/loongarch/cpus.yaml
Normal file
61
Documentation/devicetree/bindings/loongarch/cpus.yaml
Normal file
@ -0,0 +1,61 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/loongarch/cpus.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: LoongArch CPUs
|
||||
|
||||
maintainers:
|
||||
- Binbin Zhou <zhoubinbin@loongson.cn>
|
||||
|
||||
description:
|
||||
This document describes the list of LoongArch CPU cores that support FDT,
|
||||
it describe the layout of CPUs in a system through the "cpus" node.
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/cpu.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- loongson,la264
|
||||
- loongson,la364
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/loongson,ls2k-clk.h>
|
||||
|
||||
cpus {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
|
||||
cpu@0 {
|
||||
compatible = "loongson,la264";
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
clocks = <&clk LOONGSON2_NODE_CLK>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
compatible = "loongson,la264";
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
clocks = <&clk LOONGSON2_NODE_CLK>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
34
Documentation/devicetree/bindings/loongarch/loongson.yaml
Normal file
34
Documentation/devicetree/bindings/loongarch/loongson.yaml
Normal file
@ -0,0 +1,34 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/loongarch/loongson.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Loongson SoC-based boards
|
||||
|
||||
maintainers:
|
||||
- Binbin Zhou <zhoubinbin@loongson.cn>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: Loongson-2K0500 processor based boards
|
||||
items:
|
||||
- const: loongson,ls2k0500-ref
|
||||
- const: loongson,ls2k0500
|
||||
|
||||
- description: Loongson-2K1000 processor based boards
|
||||
items:
|
||||
- const: loongson,ls2k1000-ref
|
||||
- const: loongson,ls2k1000
|
||||
|
||||
- description: Loongson-2K2000 processor based boards
|
||||
items:
|
||||
- const: loongson,ls2k2000-ref
|
||||
- const: loongson,ls2k2000
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
@ -28,17 +28,15 @@ properties:
|
||||
items:
|
||||
- const: reboot-mode
|
||||
|
||||
patternProperties:
|
||||
"^mode-.+":
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: Vendor-specific mode value written to the mode register
|
||||
allOf:
|
||||
- $ref: reboot-mode.yaml#
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- nvmem-cells
|
||||
- nvmem-cell-names
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
||||
@ -111,21 +111,24 @@ examples:
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/input/linux-event-codes.h>
|
||||
#include <dt-bindings/spmi/spmi.h>
|
||||
spmi_bus: spmi@c440000 {
|
||||
|
||||
spmi@c440000 {
|
||||
reg = <0x0c440000 0x1100>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
pmk8350: pmic@0 {
|
||||
|
||||
pmic@0 {
|
||||
reg = <0x0 SPMI_USID>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pmk8350_pon: pon_hlos@1300 {
|
||||
reg = <0x1300>;
|
||||
|
||||
pon@800 {
|
||||
compatible = "qcom,pm8998-pon";
|
||||
reg = <0x800>;
|
||||
|
||||
pwrkey {
|
||||
compatible = "qcom,pm8941-pwrkey";
|
||||
interrupts = < 0x0 0x8 0 IRQ_TYPE_EDGE_BOTH >;
|
||||
interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
|
||||
debounce = <15625>;
|
||||
bias-pull-up;
|
||||
linux,code = <KEY_POWER>;
|
||||
|
||||
@ -29,12 +29,10 @@ properties:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: Offset in the register map for the mode register (in bytes)
|
||||
|
||||
patternProperties:
|
||||
"^mode-.+":
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: Vendor-specific mode value written to the mode register
|
||||
allOf:
|
||||
- $ref: reboot-mode.yaml#
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
@ -57,7 +57,7 @@ examples:
|
||||
|
||||
firmware {
|
||||
zynqmp-firmware {
|
||||
zynqmp-power {
|
||||
power-management {
|
||||
compatible = "xlnx,zynqmp-power";
|
||||
interrupts = <0 35 4>;
|
||||
};
|
||||
@ -70,7 +70,7 @@ examples:
|
||||
|
||||
firmware {
|
||||
zynqmp-firmware {
|
||||
zynqmp-power {
|
||||
power-management {
|
||||
compatible = "xlnx,zynqmp-power";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 35 4>;
|
||||
|
||||
@ -20,6 +20,7 @@ properties:
|
||||
- ti,bq24192
|
||||
- ti,bq24192i
|
||||
- ti,bq24196
|
||||
- ti,bq24296
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@ -63,8 +63,8 @@ properties:
|
||||
|
||||
mmu-type:
|
||||
description:
|
||||
Identifies the MMU address translation mode used on this
|
||||
hart. These values originate from the RISC-V Privileged
|
||||
Identifies the largest MMU address translation mode supported by
|
||||
this hart. These values originate from the RISC-V Privileged
|
||||
Specification document, available from
|
||||
https://riscv.org/specifications/
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
@ -80,6 +80,11 @@ properties:
|
||||
description:
|
||||
The blocksize in bytes for the Zicbom cache operations.
|
||||
|
||||
riscv,cbop-block-size:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
The blocksize in bytes for the Zicbop cache operations.
|
||||
|
||||
riscv,cboz-block-size:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
|
||||
@ -48,7 +48,7 @@ properties:
|
||||
insensitive, letters in the riscv,isa string must be all
|
||||
lowercase.
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
pattern: ^rv(?:64|32)imaf?d?q?c?b?k?j?p?v?h?(?:[hsxz](?:[a-z])+)?(?:_[hsxz](?:[a-z])+)*$
|
||||
pattern: ^rv(?:64|32)imaf?d?q?c?b?k?j?p?v?h?(?:[hsxz](?:[0-9a-z])+)?(?:_[hsxz](?:[0-9a-z])+)*$
|
||||
deprecated: true
|
||||
|
||||
riscv,isa-base:
|
||||
|
||||
@ -18,7 +18,6 @@ description: |
|
||||
|
||||
Specifications about the audio amplifier can be found at:
|
||||
https://www.ti.com/lit/gpn/tas2562
|
||||
https://www.ti.com/lit/gpn/tas2563
|
||||
https://www.ti.com/lit/gpn/tas2564
|
||||
https://www.ti.com/lit/gpn/tas2110
|
||||
|
||||
@ -29,7 +28,6 @@ properties:
|
||||
compatible:
|
||||
enum:
|
||||
- ti,tas2562
|
||||
- ti,tas2563
|
||||
- ti,tas2564
|
||||
- ti,tas2110
|
||||
|
||||
|
||||
@ -5,36 +5,46 @@
|
||||
$id: http://devicetree.org/schemas/sound/ti,tas2781.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Texas Instruments TAS2781 SmartAMP
|
||||
title: Texas Instruments TAS2563/TAS2781 SmartAMP
|
||||
|
||||
maintainers:
|
||||
- Shenghao Ding <shenghao-ding@ti.com>
|
||||
|
||||
description:
|
||||
The TAS2781 is a mono, digital input Class-D audio amplifier
|
||||
optimized for efficiently driving high peak power into small
|
||||
loudspeakers. An integrated on-chip DSP supports Texas Instruments
|
||||
Smart Amp speaker protection algorithm. The integrated speaker
|
||||
voltage and current sense provides for real time
|
||||
description: |
|
||||
The TAS2563/TAS2781 is a mono, digital input Class-D audio
|
||||
amplifier optimized for efficiently driving high peak power into
|
||||
small loudspeakers. An integrated on-chip DSP supports Texas
|
||||
Instruments Smart Amp speaker protection algorithm. The
|
||||
integrated speaker voltage and current sense provides for real time
|
||||
monitoring of loudspeaker behavior.
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
Specifications about the audio amplifier can be found at:
|
||||
https://www.ti.com/lit/gpn/tas2563
|
||||
https://www.ti.com/lit/gpn/tas2781
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- ti,tas2781
|
||||
description: |
|
||||
ti,tas2563: 6.1-W Boosted Class-D Audio Amplifier With Integrated
|
||||
DSP and IV Sense, 16/20/24/32bit stereo I2S or multichannel TDM.
|
||||
|
||||
ti,tas2781: 24-V Class-D Amplifier with Real Time Integrated Speaker
|
||||
Protection and Audio Processing, 16/20/24/32bit stereo I2S or
|
||||
multichannel TDM.
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- ti,tas2563
|
||||
- const: ti,tas2781
|
||||
- enum:
|
||||
- ti,tas2781
|
||||
|
||||
reg:
|
||||
description:
|
||||
I2C address, in multiple tas2781s case, all the i2c address
|
||||
I2C address, in multiple-AMP case, all the i2c address
|
||||
aggregate as one Audio Device to support multiple audio slots.
|
||||
maxItems: 8
|
||||
minItems: 1
|
||||
items:
|
||||
minimum: 0x38
|
||||
maximum: 0x3f
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
@ -49,6 +59,44 @@ required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- ti,tas2563
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
description:
|
||||
I2C address, in multiple-AMP case, all the i2c address
|
||||
aggregate as one Audio Device to support multiple audio slots.
|
||||
maxItems: 4
|
||||
minItems: 1
|
||||
items:
|
||||
minimum: 0x4c
|
||||
maximum: 0x4f
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- ti,tas2781
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
description:
|
||||
I2C address, in multiple-AMP case, all the i2c address
|
||||
aggregate as one Audio Device to support multiple audio slots.
|
||||
maxItems: 8
|
||||
minItems: 1
|
||||
items:
|
||||
minimum: 0x38
|
||||
maximum: 0x3f
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
@ -33,6 +33,7 @@ properties:
|
||||
- sifive,fu540-c000-clint # SiFive FU540
|
||||
- starfive,jh7100-clint # StarFive JH7100
|
||||
- starfive,jh7110-clint # StarFive JH7110
|
||||
- starfive,jh8100-clint # StarFive JH8100
|
||||
- const: sifive,clint0 # SiFive CLINT v0 IP block
|
||||
- items:
|
||||
- enum:
|
||||
|
||||
@ -17,7 +17,12 @@ properties:
|
||||
- const: thead,c900-aclint-mtimer
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
items:
|
||||
- description: MTIMECMP Registers
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: mtimecmp
|
||||
|
||||
interrupts-extended:
|
||||
minItems: 1
|
||||
@ -28,6 +33,7 @@ additionalProperties: false
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- interrupts-extended
|
||||
|
||||
examples:
|
||||
@ -39,5 +45,6 @@ examples:
|
||||
<&cpu3intc 7>,
|
||||
<&cpu4intc 7>;
|
||||
reg = <0xac000000 0x00010000>;
|
||||
reg-names = "mtimecmp";
|
||||
};
|
||||
...
|
||||
|
||||
@ -20,7 +20,7 @@
|
||||
| openrisc: | .. |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | TODO |
|
||||
| riscv: | TODO |
|
||||
| riscv: | ok |
|
||||
| s390: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
|
||||
@ -295,7 +295,6 @@ through which it can issue requests and negotiate::
|
||||
struct netfs_request_ops {
|
||||
void (*init_request)(struct netfs_io_request *rreq, struct file *file);
|
||||
void (*free_request)(struct netfs_io_request *rreq);
|
||||
int (*begin_cache_operation)(struct netfs_io_request *rreq);
|
||||
void (*expand_readahead)(struct netfs_io_request *rreq);
|
||||
bool (*clamp_length)(struct netfs_io_subrequest *subreq);
|
||||
void (*issue_read)(struct netfs_io_subrequest *subreq);
|
||||
@ -317,20 +316,6 @@ The operations are as follows:
|
||||
[Optional] This is called as the request is being deallocated so that the
|
||||
filesystem can clean up any state it has attached there.
|
||||
|
||||
* ``begin_cache_operation()``
|
||||
|
||||
[Optional] This is called to ask the network filesystem to call into the
|
||||
cache (if present) to initialise the caching state for this read. The netfs
|
||||
library module cannot access the cache directly, so the cache should call
|
||||
something like fscache_begin_read_operation() to do this.
|
||||
|
||||
The cache gets to store its state in ->cache_resources and must set a table
|
||||
of operations of its own there (though of a different type).
|
||||
|
||||
This should return 0 on success and an error code otherwise. If an error is
|
||||
reported, the operation may proceed anyway, just without local caching (only
|
||||
out of memory and interruption errors cause failure here).
|
||||
|
||||
* ``expand_readahead()``
|
||||
|
||||
[Optional] This is called to allow the filesystem to expand the size of a
|
||||
@ -460,14 +445,14 @@ When implementing a local cache to be used by the read helpers, two things are
|
||||
required: some way for the network filesystem to initialise the caching for a
|
||||
read request and a table of operations for the helpers to call.
|
||||
|
||||
The network filesystem's ->begin_cache_operation() method is called to set up a
|
||||
cache and this must call into the cache to do the work. If using fscache, for
|
||||
example, the cache would call::
|
||||
To begin a cache operation on an fscache object, the following function is
|
||||
called::
|
||||
|
||||
int fscache_begin_read_operation(struct netfs_io_request *rreq,
|
||||
struct fscache_cookie *cookie);
|
||||
|
||||
passing in the request pointer and the cookie corresponding to the file.
|
||||
passing in the request pointer and the cookie corresponding to the file. This
|
||||
fills in the cache resources mentioned below.
|
||||
|
||||
The netfs_io_request object contains a place for the cache to hang its
|
||||
state::
|
||||
|
||||
@ -145,7 +145,9 @@ filesystem, an overlay filesystem needs to record in the upper filesystem
|
||||
that files have been removed. This is done using whiteouts and opaque
|
||||
directories (non-directories are always opaque).
|
||||
|
||||
A whiteout is created as a character device with 0/0 device number.
|
||||
A whiteout is created as a character device with 0/0 device number or
|
||||
as a zero-size regular file with the xattr "trusted.overlay.whiteout".
|
||||
|
||||
When a whiteout is found in the upper level of a merged directory, any
|
||||
matching name in the lower level is ignored, and the whiteout itself
|
||||
is also hidden.
|
||||
@ -154,6 +156,13 @@ A directory is made opaque by setting the xattr "trusted.overlay.opaque"
|
||||
to "y". Where the upper filesystem contains an opaque directory, any
|
||||
directory in the lower filesystem with the same name is ignored.
|
||||
|
||||
An opaque directory should not conntain any whiteouts, because they do not
|
||||
serve any purpose. A merge directory containing regular files with the xattr
|
||||
"trusted.overlay.whiteout", should be additionally marked by setting the xattr
|
||||
"trusted.overlay.opaque" to "x" on the merge directory itself.
|
||||
This is needed to avoid the overhead of checking the "trusted.overlay.whiteout"
|
||||
on all entries during readdir in the common case.
|
||||
|
||||
readdir
|
||||
-------
|
||||
|
||||
@ -534,8 +543,9 @@ A lower dir with a regular whiteout will always be handled by the overlayfs
|
||||
mount, so to support storing an effective whiteout file in an overlayfs mount an
|
||||
alternative form of whiteout is supported. This form is a regular, zero-size
|
||||
file with the "overlay.whiteout" xattr set, inside a directory with the
|
||||
"overlay.whiteouts" xattr set. Such whiteouts are never created by overlayfs,
|
||||
but can be used by userspace tools (like containers) that generate lower layers.
|
||||
"overlay.opaque" xattr set to "x" (see `whiteouts and opaque directories`_).
|
||||
These alternative whiteouts are never created by overlayfs, but can be used by
|
||||
userspace tools (like containers) that generate lower layers.
|
||||
These alternative whiteouts can be escaped using the standard xattr escape
|
||||
mechanism in order to properly nest to any depth.
|
||||
|
||||
|
||||
@ -73,15 +73,14 @@ Auto Negotiation Supported.
|
||||
Compound Request Supported.
|
||||
Oplock Cache Mechanism Supported.
|
||||
SMB2 leases(v1 lease) Supported.
|
||||
Directory leases(v2 lease) Planned for future.
|
||||
Directory leases(v2 lease) Supported.
|
||||
Multi-credits Supported.
|
||||
NTLM/NTLMv2 Supported.
|
||||
HMAC-SHA256 Signing Supported.
|
||||
Secure negotiate Supported.
|
||||
Signing Update Supported.
|
||||
Pre-authentication integrity Supported.
|
||||
SMB3 encryption(CCM, GCM) Supported. (CCM and GCM128 supported, GCM256 in
|
||||
progress)
|
||||
SMB3 encryption(CCM, GCM) Supported. (CCM/GCM128 and CCM/GCM256 supported)
|
||||
SMB direct(RDMA) Supported.
|
||||
SMB3 Multi-channel Partially Supported. Planned to implement
|
||||
replay/retry mechanisms for future.
|
||||
@ -112,6 +111,10 @@ DCE/RPC support Partially Supported. a few calls(NetShareEnumAll,
|
||||
for Witness protocol e.g.)
|
||||
ksmbd/nfsd interoperability Planned for future. The features that ksmbd
|
||||
support are Leases, Notify, ACLs and Share modes.
|
||||
SMB3.1.1 Compression Planned for future.
|
||||
SMB3.1.1 over QUIC Planned for future.
|
||||
Signing/Encryption over RDMA Planned for future.
|
||||
SMB3.1.1 GMAC signing support Planned for future.
|
||||
============================== =================================================
|
||||
|
||||
|
||||
|
||||
@ -66,6 +66,10 @@ for aligning variables/macros, for reflowing text and other similar tasks.
|
||||
See the file :ref:`Documentation/process/clang-format.rst <clangformat>`
|
||||
for more details.
|
||||
|
||||
Some basic editor settings, such as indentation and line endings, will be
|
||||
set automatically if you are using an editor that is compatible with
|
||||
EditorConfig. See the official EditorConfig website for more information:
|
||||
https://editorconfig.org/
|
||||
|
||||
Abstraction layers
|
||||
******************
|
||||
|
||||
@ -735,6 +735,10 @@ for aligning variables/macros, for reflowing text and other similar tasks.
|
||||
See the file :ref:`Documentation/process/clang-format.rst <clangformat>`
|
||||
for more details.
|
||||
|
||||
Some basic editor settings, such as indentation and line endings, will be
|
||||
set automatically if you are using an editor that is compatible with
|
||||
EditorConfig. See the official EditorConfig website for more information:
|
||||
https://editorconfig.org/
|
||||
|
||||
10) Kconfig configuration files
|
||||
-------------------------------
|
||||
|
||||
@ -12,10 +12,11 @@ which uses ``libclang``.
|
||||
Below is a general summary of architectures that currently work. Level of
|
||||
support corresponds to ``S`` values in the ``MAINTAINERS`` file.
|
||||
|
||||
============ ================ ==============================================
|
||||
Architecture Level of support Constraints
|
||||
============ ================ ==============================================
|
||||
``um`` Maintained ``x86_64`` only.
|
||||
``x86`` Maintained ``x86_64`` only.
|
||||
============ ================ ==============================================
|
||||
============= ================ ==============================================
|
||||
Architecture Level of support Constraints
|
||||
============= ================ ==============================================
|
||||
``loongarch`` Maintained -
|
||||
``um`` Maintained ``x86_64`` only.
|
||||
``x86`` Maintained ``x86_64`` only.
|
||||
============= ================ ==============================================
|
||||
|
||||
|
||||
45
MAINTAINERS
45
MAINTAINERS
@ -3692,6 +3692,13 @@ L: bpf@vger.kernel.org
|
||||
S: Supported
|
||||
F: arch/arm64/net/
|
||||
|
||||
BPF JIT for LOONGARCH
|
||||
M: Tiezhu Yang <yangtiezhu@loongson.cn>
|
||||
R: Hengqi Chen <hengqi.chen@gmail.com>
|
||||
L: bpf@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/loongarch/net/
|
||||
|
||||
BPF JIT for MIPS (32-BIT AND 64-BIT)
|
||||
M: Johan Almbladh <johan.almbladh@anyfinetworks.com>
|
||||
M: Paul Burton <paulburton@kernel.org>
|
||||
@ -4540,7 +4547,7 @@ F: drivers/net/ieee802154/ca8210.c
|
||||
|
||||
CACHEFILES: FS-CACHE BACKEND FOR CACHING ON MOUNTED FILESYSTEMS
|
||||
M: David Howells <dhowells@redhat.com>
|
||||
L: linux-cachefs@redhat.com (moderated for non-subscribers)
|
||||
L: netfs@lists.linux.dev
|
||||
S: Supported
|
||||
F: Documentation/filesystems/caching/cachefiles.rst
|
||||
F: fs/cachefiles/
|
||||
@ -5229,7 +5236,7 @@ X: drivers/clk/clkdev.c
|
||||
COMMON INTERNET FILE SYSTEM CLIENT (CIFS and SMB3)
|
||||
M: Steve French <sfrench@samba.org>
|
||||
R: Paulo Alcantara <pc@manguebit.com> (DFS, global name space)
|
||||
R: Ronnie Sahlberg <lsahlber@redhat.com> (directory leases, sparse files)
|
||||
R: Ronnie Sahlberg <ronniesahlberg@gmail.com> (directory leases, sparse files)
|
||||
R: Shyam Prasad N <sprasad@microsoft.com> (multichannel)
|
||||
R: Tom Talpey <tom@talpey.com> (RDMA, smbdirect)
|
||||
L: linux-cifs@vger.kernel.org
|
||||
@ -7948,12 +7955,13 @@ L: rust-for-linux@vger.kernel.org
|
||||
S: Maintained
|
||||
F: rust/kernel/net/phy.rs
|
||||
|
||||
EXEC & BINFMT API
|
||||
EXEC & BINFMT API, ELF
|
||||
R: Eric Biederman <ebiederm@xmission.com>
|
||||
R: Kees Cook <keescook@chromium.org>
|
||||
L: linux-mm@kvack.org
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux.git for-next/execve
|
||||
F: Documentation/userspace-api/ELF.rst
|
||||
F: fs/*binfmt_*.c
|
||||
F: fs/exec.c
|
||||
F: include/linux/binfmts.h
|
||||
@ -8214,6 +8222,20 @@ S: Supported
|
||||
F: fs/iomap/
|
||||
F: include/linux/iomap.h
|
||||
|
||||
FILESYSTEMS [NETFS LIBRARY]
|
||||
M: David Howells <dhowells@redhat.com>
|
||||
R: Jeff Layton <jlayton@kernel.org>
|
||||
L: netfs@lists.linux.dev
|
||||
L: linux-fsdevel@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/filesystems/caching/
|
||||
F: Documentation/filesystems/netfs_library.rst
|
||||
F: fs/netfs/
|
||||
F: include/linux/fscache*.h
|
||||
F: include/linux/netfs.h
|
||||
F: include/trace/events/fscache.h
|
||||
F: include/trace/events/netfs.h
|
||||
|
||||
FILESYSTEMS [STACKABLE]
|
||||
M: Miklos Szeredi <miklos@szeredi.hu>
|
||||
M: Amir Goldstein <amir73il@gmail.com>
|
||||
@ -8659,14 +8681,6 @@ F: Documentation/power/freezing-of-tasks.rst
|
||||
F: include/linux/freezer.h
|
||||
F: kernel/freezer.c
|
||||
|
||||
FS-CACHE: LOCAL CACHING FOR NETWORK FILESYSTEMS
|
||||
M: David Howells <dhowells@redhat.com>
|
||||
L: linux-cachefs@redhat.com (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: Documentation/filesystems/caching/
|
||||
F: fs/fscache/
|
||||
F: include/linux/fscache*.h
|
||||
|
||||
FSCRYPT: FILE SYSTEM LEVEL ENCRYPTION SUPPORT
|
||||
M: Eric Biggers <ebiggers@kernel.org>
|
||||
M: Theodore Y. Ts'o <tytso@mit.edu>
|
||||
@ -12627,6 +12641,13 @@ S: Maintained
|
||||
F: Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml
|
||||
F: drivers/gpio/gpio-loongson-64bit.c
|
||||
|
||||
LOONGSON LS2X APB DMA DRIVER
|
||||
M: Binbin Zhou <zhoubinbin@loongson.cn>
|
||||
L: dmaengine@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/dma/loongson,ls2x-apbdma.yaml
|
||||
F: drivers/dma/ls2x-apb-dma.c
|
||||
|
||||
LOONGSON LS2X I2C DRIVER
|
||||
M: Binbin Zhou <zhoubinbin@loongson.cn>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
@ -17128,10 +17149,10 @@ PERFORMANCE EVENTS SUBSYSTEM
|
||||
M: Peter Zijlstra <peterz@infradead.org>
|
||||
M: Ingo Molnar <mingo@redhat.com>
|
||||
M: Arnaldo Carvalho de Melo <acme@kernel.org>
|
||||
M: Namhyung Kim <namhyung@kernel.org>
|
||||
R: Mark Rutland <mark.rutland@arm.com>
|
||||
R: Alexander Shishkin <alexander.shishkin@linux.intel.com>
|
||||
R: Jiri Olsa <jolsa@kernel.org>
|
||||
R: Namhyung Kim <namhyung@kernel.org>
|
||||
R: Ian Rogers <irogers@google.com>
|
||||
R: Adrian Hunter <adrian.hunter@intel.com>
|
||||
L: linux-perf-users@vger.kernel.org
|
||||
|
||||
31
Makefile
31
Makefile
@ -1,8 +1,8 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
VERSION = 6
|
||||
PATCHLEVEL = 7
|
||||
PATCHLEVEL = 8
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION =
|
||||
EXTRAVERSION = -rc1
|
||||
NAME = Hurr durr I'ma ninja sloth
|
||||
|
||||
# *DOCUMENTATION*
|
||||
@ -155,6 +155,15 @@ endif
|
||||
|
||||
export KBUILD_EXTMOD
|
||||
|
||||
# backward compatibility
|
||||
KBUILD_EXTRA_WARN ?= $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)
|
||||
|
||||
ifeq ("$(origin W)", "command line")
|
||||
KBUILD_EXTRA_WARN := $(W)
|
||||
endif
|
||||
|
||||
export KBUILD_EXTRA_WARN
|
||||
|
||||
# Kbuild will save output files in the current working directory.
|
||||
# This does not need to match to the root of the kernel source tree.
|
||||
#
|
||||
@ -181,14 +190,11 @@ ifeq ("$(origin O)", "command line")
|
||||
endif
|
||||
|
||||
ifneq ($(KBUILD_OUTPUT),)
|
||||
# Make's built-in functions such as $(abspath ...), $(realpath ...) cannot
|
||||
# expand a shell special character '~'. We use a somewhat tedious way here.
|
||||
abs_objtree := $(shell mkdir -p $(KBUILD_OUTPUT) && cd $(KBUILD_OUTPUT) && pwd)
|
||||
$(if $(abs_objtree),, \
|
||||
$(error failed to create output directory "$(KBUILD_OUTPUT)"))
|
||||
|
||||
# $(realpath ...) gets empty if the path does not exist. Run 'mkdir -p' first.
|
||||
$(shell mkdir -p "$(KBUILD_OUTPUT)")
|
||||
# $(realpath ...) resolves symlinks
|
||||
abs_objtree := $(realpath $(abs_objtree))
|
||||
abs_objtree := $(realpath $(KBUILD_OUTPUT))
|
||||
$(if $(abs_objtree),,$(error failed to create output directory "$(KBUILD_OUTPUT)"))
|
||||
endif # ifneq ($(KBUILD_OUTPUT),)
|
||||
|
||||
ifneq ($(words $(subst :, ,$(abs_srctree))), 1)
|
||||
@ -609,8 +615,6 @@ export KBUILD_AFLAGS_KERNEL KBUILD_CFLAGS_KERNEL KBUILD_RUSTFLAGS_KERNEL
|
||||
export RCS_FIND_IGNORE := \( -name SCCS -o -name BitKeeper -o -name .svn -o \
|
||||
-name CVS -o -name .pc -o -name .hg -o -name .git \) \
|
||||
-prune -o
|
||||
export RCS_TAR_IGNORE := --exclude SCCS --exclude BitKeeper --exclude .svn \
|
||||
--exclude CVS --exclude .pc --exclude .hg --exclude .git
|
||||
|
||||
# ===========================================================================
|
||||
# Rules shared between *config targets and build targets
|
||||
@ -982,6 +986,10 @@ NOSTDINC_FLAGS += -nostdinc
|
||||
# perform bounds checking.
|
||||
KBUILD_CFLAGS += $(call cc-option, -fstrict-flex-arrays=3)
|
||||
|
||||
#Currently, disable -Wstringop-overflow for GCC 11, globally.
|
||||
KBUILD_CFLAGS-$(CONFIG_CC_NO_STRINGOP_OVERFLOW) += $(call cc-option, -Wno-stringop-overflow)
|
||||
KBUILD_CFLAGS-$(CONFIG_CC_STRINGOP_OVERFLOW) += $(call cc-option, -Wstringop-overflow)
|
||||
|
||||
# disable invalid "can't wrap" optimizations for signed / pointers
|
||||
KBUILD_CFLAGS += -fno-strict-overflow
|
||||
|
||||
@ -1662,6 +1670,7 @@ help:
|
||||
@echo ' 1: warnings which may be relevant and do not occur too often'
|
||||
@echo ' 2: warnings which occur quite often but may still be relevant'
|
||||
@echo ' 3: more obscure warnings, can most likely be ignored'
|
||||
@echo ' c: extra checks in the configuration stage (Kconfig)'
|
||||
@echo ' e: warnings are being treated as errors'
|
||||
@echo ' Multiple levels can be combined with W=12 or W=123'
|
||||
@$(if $(dtstree), \
|
||||
|
||||
@ -138,7 +138,8 @@ CONFIG_PWM_MXS=y
|
||||
CONFIG_NVMEM_MXS_OCOTP=y
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_FSCACHE=m
|
||||
CONFIG_NETFS_SUPPORT=m
|
||||
CONFIG_FSCACHE=y
|
||||
CONFIG_FSCACHE_STATS=y
|
||||
CONFIG_CACHEFILES=m
|
||||
CONFIG_VFAT_FS=y
|
||||
|
||||
@ -1039,8 +1039,12 @@ config ARM64_ERRATUM_2645198
|
||||
|
||||
If unsure, say Y.
|
||||
|
||||
config ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
|
||||
bool
|
||||
|
||||
config ARM64_ERRATUM_2966298
|
||||
bool "Cortex-A520: 2966298: workaround for speculatively executed unprivileged load"
|
||||
select ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
|
||||
default y
|
||||
help
|
||||
This option adds the workaround for ARM Cortex-A520 erratum 2966298.
|
||||
@ -1052,6 +1056,20 @@ config ARM64_ERRATUM_2966298
|
||||
|
||||
If unsure, say Y.
|
||||
|
||||
config ARM64_ERRATUM_3117295
|
||||
bool "Cortex-A510: 3117295: workaround for speculatively executed unprivileged load"
|
||||
select ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
|
||||
default y
|
||||
help
|
||||
This option adds the workaround for ARM Cortex-A510 erratum 3117295.
|
||||
|
||||
On an affected Cortex-A510 core, a speculatively executed unprivileged
|
||||
load might leak data from a privileged level via a cache side channel.
|
||||
|
||||
Work around this problem by executing a TLBI before returning to EL0.
|
||||
|
||||
If unsure, say Y.
|
||||
|
||||
config CAVIUM_ERRATUM_22375
|
||||
bool "Cavium erratum 22375, 24313"
|
||||
default y
|
||||
|
||||
@ -760,32 +760,25 @@ alternative_endif
|
||||
.endm
|
||||
|
||||
/*
|
||||
* Check whether preempt/bh-disabled asm code should yield as soon as
|
||||
* it is able. This is the case if we are currently running in task
|
||||
* context, and either a softirq is pending, or the TIF_NEED_RESCHED
|
||||
* flag is set and re-enabling preemption a single time would result in
|
||||
* a preempt count of zero. (Note that the TIF_NEED_RESCHED flag is
|
||||
* stored negated in the top word of the thread_info::preempt_count
|
||||
* Check whether asm code should yield as soon as it is able. This is
|
||||
* the case if we are currently running in task context, and the
|
||||
* TIF_NEED_RESCHED flag is set. (Note that the TIF_NEED_RESCHED flag
|
||||
* is stored negated in the top word of the thread_info::preempt_count
|
||||
* field)
|
||||
*/
|
||||
.macro cond_yield, lbl:req, tmp:req, tmp2:req
|
||||
.macro cond_yield, lbl:req, tmp:req, tmp2
|
||||
#ifdef CONFIG_PREEMPT_VOLUNTARY
|
||||
get_current_task \tmp
|
||||
ldr \tmp, [\tmp, #TSK_TI_PREEMPT]
|
||||
/*
|
||||
* If we are serving a softirq, there is no point in yielding: the
|
||||
* softirq will not be preempted no matter what we do, so we should
|
||||
* run to completion as quickly as we can.
|
||||
* run to completion as quickly as we can. The preempt_count field will
|
||||
* have BIT(SOFTIRQ_SHIFT) set in this case, so the zero check will
|
||||
* catch this case too.
|
||||
*/
|
||||
tbnz \tmp, #SOFTIRQ_SHIFT, .Lnoyield_\@
|
||||
#ifdef CONFIG_PREEMPTION
|
||||
sub \tmp, \tmp, #PREEMPT_DISABLE_OFFSET
|
||||
cbz \tmp, \lbl
|
||||
#endif
|
||||
adr_l \tmp, irq_stat + IRQ_CPUSTAT_SOFTIRQ_PENDING
|
||||
get_this_cpu_offset \tmp2
|
||||
ldr w\tmp, [\tmp, \tmp2]
|
||||
cbnz w\tmp, \lbl // yield on pending softirq in task context
|
||||
.Lnoyield_\@:
|
||||
.endm
|
||||
|
||||
/*
|
||||
|
||||
@ -4,6 +4,8 @@
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
|
||||
#include <linux/cpumask.h>
|
||||
|
||||
#include <asm-generic/irq.h>
|
||||
|
||||
void arch_trigger_cpumask_backtrace(const cpumask_t *mask, int exclude_cpu);
|
||||
|
||||
@ -73,7 +73,13 @@ obj-$(CONFIG_ARM64_MTE) += mte.o
|
||||
obj-y += vdso-wrap.o
|
||||
obj-$(CONFIG_COMPAT_VDSO) += vdso32-wrap.o
|
||||
obj-$(CONFIG_UNWIND_PATCH_PAC_INTO_SCS) += patch-scs.o
|
||||
CFLAGS_patch-scs.o += -mbranch-protection=none
|
||||
|
||||
# We need to prevent the SCS patching code from patching itself. Using
|
||||
# -mbranch-protection=none here to avoid the patchable PAC opcodes from being
|
||||
# generated triggers an issue with full LTO on Clang, which stops emitting PAC
|
||||
# instructions altogether. So instead, omit the unwind tables used by the
|
||||
# patching code, so it will not be able to locate its own PAC instructions.
|
||||
CFLAGS_patch-scs.o += -fno-asynchronous-unwind-tables -fno-unwind-tables
|
||||
|
||||
# Force dependency (vdso*-wrap.S includes vdso.so through incbin)
|
||||
$(obj)/vdso-wrap.o: $(obj)/vdso/vdso.so
|
||||
|
||||
@ -117,8 +117,6 @@ int main(void)
|
||||
DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
|
||||
BLANK();
|
||||
DEFINE(PREEMPT_DISABLE_OFFSET, PREEMPT_DISABLE_OFFSET);
|
||||
DEFINE(SOFTIRQ_SHIFT, SOFTIRQ_SHIFT);
|
||||
DEFINE(IRQ_CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending));
|
||||
BLANK();
|
||||
DEFINE(CPU_BOOT_TASK, offsetof(struct secondary_data, task));
|
||||
BLANK();
|
||||
|
||||
@ -416,6 +416,19 @@ static struct midr_range broken_aarch32_aes[] = {
|
||||
};
|
||||
#endif /* CONFIG_ARM64_WORKAROUND_TRBE_WRITE_OUT_OF_RANGE */
|
||||
|
||||
#ifdef CONFIG_ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
|
||||
static const struct midr_range erratum_spec_unpriv_load_list[] = {
|
||||
#ifdef CONFIG_ARM64_ERRATUM_3117295
|
||||
MIDR_ALL_VERSIONS(MIDR_CORTEX_A510),
|
||||
#endif
|
||||
#ifdef CONFIG_ARM64_ERRATUM_2966298
|
||||
/* Cortex-A520 r0p0 to r0p1 */
|
||||
MIDR_REV_RANGE(MIDR_CORTEX_A520, 0, 0, 1),
|
||||
#endif
|
||||
{},
|
||||
};
|
||||
#endif
|
||||
|
||||
const struct arm64_cpu_capabilities arm64_errata[] = {
|
||||
#ifdef CONFIG_ARM64_WORKAROUND_CLEAN_CACHE
|
||||
{
|
||||
@ -713,12 +726,12 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
|
||||
MIDR_FIXED(MIDR_CPU_VAR_REV(1,1), BIT(25)),
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_ARM64_ERRATUM_2966298
|
||||
#ifdef CONFIG_ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
|
||||
{
|
||||
.desc = "ARM erratum 2966298",
|
||||
.capability = ARM64_WORKAROUND_2966298,
|
||||
.desc = "ARM errata 2966298, 3117295",
|
||||
.capability = ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD,
|
||||
/* Cortex-A520 r0p0 - r0p1 */
|
||||
ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A520, 0, 0, 1),
|
||||
ERRATA_MIDR_RANGE_LIST(erratum_spec_unpriv_load_list),
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_AMPERE_ERRATUM_AC03_CPU_38
|
||||
|
||||
@ -428,16 +428,9 @@ alternative_else_nop_endif
|
||||
ldp x28, x29, [sp, #16 * 14]
|
||||
|
||||
.if \el == 0
|
||||
alternative_if ARM64_WORKAROUND_2966298
|
||||
tlbi vale1, xzr
|
||||
dsb nsh
|
||||
alternative_else_nop_endif
|
||||
alternative_if_not ARM64_UNMAP_KERNEL_AT_EL0
|
||||
ldr lr, [sp, #S_LR]
|
||||
add sp, sp, #PT_REGS_SIZE // restore sp
|
||||
eret
|
||||
alternative_else_nop_endif
|
||||
#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
|
||||
alternative_insn "b .L_skip_tramp_exit_\@", nop, ARM64_UNMAP_KERNEL_AT_EL0
|
||||
|
||||
msr far_el1, x29
|
||||
|
||||
ldr_this_cpu x30, this_cpu_vector, x29
|
||||
@ -446,16 +439,26 @@ alternative_else_nop_endif
|
||||
ldr lr, [sp, #S_LR] // restore x30
|
||||
add sp, sp, #PT_REGS_SIZE // restore sp
|
||||
br x29
|
||||
|
||||
.L_skip_tramp_exit_\@:
|
||||
#endif
|
||||
.else
|
||||
.endif
|
||||
|
||||
ldr lr, [sp, #S_LR]
|
||||
add sp, sp, #PT_REGS_SIZE // restore sp
|
||||
|
||||
.if \el == 0
|
||||
/* This must be after the last explicit memory access */
|
||||
alternative_if ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
|
||||
tlbi vale1, xzr
|
||||
dsb nsh
|
||||
alternative_else_nop_endif
|
||||
.else
|
||||
/* Ensure any device/NC reads complete */
|
||||
alternative_insn nop, "dmb sy", ARM64_WORKAROUND_1508412
|
||||
.endif
|
||||
|
||||
eret
|
||||
.endif
|
||||
sb
|
||||
.endm
|
||||
|
||||
|
||||
@ -898,10 +898,8 @@ int vec_set_vector_length(struct task_struct *task, enum vec_type type,
|
||||
* allocate SVE now in case it is needed for use in streaming
|
||||
* mode.
|
||||
*/
|
||||
if (system_supports_sve()) {
|
||||
sve_free(task);
|
||||
sve_alloc(task, true);
|
||||
}
|
||||
sve_free(task);
|
||||
sve_alloc(task, true);
|
||||
|
||||
if (free_sme)
|
||||
sme_free(task);
|
||||
@ -1219,8 +1217,10 @@ void fpsimd_release_task(struct task_struct *dead_task)
|
||||
*/
|
||||
void sme_alloc(struct task_struct *task, bool flush)
|
||||
{
|
||||
if (task->thread.sme_state && flush) {
|
||||
memset(task->thread.sme_state, 0, sme_state_size(task));
|
||||
if (task->thread.sme_state) {
|
||||
if (flush)
|
||||
memset(task->thread.sme_state, 0,
|
||||
sme_state_size(task));
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
@ -1108,12 +1108,13 @@ static int za_set(struct task_struct *target,
|
||||
}
|
||||
}
|
||||
|
||||
/* Allocate/reinit ZA storage */
|
||||
sme_alloc(target, true);
|
||||
if (!target->thread.sme_state) {
|
||||
ret = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
/*
|
||||
* Only flush the storage if PSTATE.ZA was not already set,
|
||||
* otherwise preserve any existing data.
|
||||
*/
|
||||
sme_alloc(target, !thread_za_enabled(&target->thread));
|
||||
if (!target->thread.sme_state)
|
||||
return -ENOMEM;
|
||||
|
||||
/* If there is no data then disable ZA */
|
||||
if (!count) {
|
||||
|
||||
@ -84,7 +84,6 @@ WORKAROUND_2077057
|
||||
WORKAROUND_2457168
|
||||
WORKAROUND_2645198
|
||||
WORKAROUND_2658417
|
||||
WORKAROUND_2966298
|
||||
WORKAROUND_AMPERE_AC03_CPU_38
|
||||
WORKAROUND_TRBE_OVERWRITE_FILL_MODE
|
||||
WORKAROUND_TSB_FLUSH_FAILURE
|
||||
@ -100,3 +99,4 @@ WORKAROUND_NVIDIA_CARMEL_CNP
|
||||
WORKAROUND_QCOM_FALKOR_E1003
|
||||
WORKAROUND_REPEAT_TLBI
|
||||
WORKAROUND_SPECULATIVE_AT
|
||||
WORKAROUND_SPECULATIVE_UNPRIV_LOAD
|
||||
|
||||
@ -34,7 +34,8 @@ CONFIG_GENERIC_PHY=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_FANOTIFY=y
|
||||
CONFIG_QUOTA=y
|
||||
CONFIG_FSCACHE=m
|
||||
CONFIG_NETFS_SUPPORT=m
|
||||
CONFIG_FSCACHE=y
|
||||
CONFIG_FSCACHE_STATS=y
|
||||
CONFIG_CACHEFILES=m
|
||||
CONFIG_MSDOS_FS=y
|
||||
|
||||
@ -4,6 +4,7 @@ obj-y += net/
|
||||
obj-y += vdso/
|
||||
|
||||
obj-$(CONFIG_KVM) += kvm/
|
||||
obj-$(CONFIG_BUILTIN_DTB) += boot/dts/
|
||||
|
||||
# for cleaning
|
||||
subdir- += boot
|
||||
|
||||
@ -142,6 +142,7 @@ config LOONGARCH
|
||||
select HAVE_REGS_AND_STACK_ACCESS_API
|
||||
select HAVE_RETHOOK
|
||||
select HAVE_RSEQ
|
||||
select HAVE_RUST
|
||||
select HAVE_SAMPLE_FTRACE_DIRECT
|
||||
select HAVE_SAMPLE_FTRACE_DIRECT_MULTI
|
||||
select HAVE_SETUP_PER_CPU_AREA if NUMA
|
||||
@ -376,6 +377,24 @@ config CMDLINE_FORCE
|
||||
|
||||
endchoice
|
||||
|
||||
config BUILTIN_DTB
|
||||
bool "Enable built-in dtb in kernel"
|
||||
depends on OF
|
||||
help
|
||||
Some existing systems do not provide a canonical device tree to
|
||||
the kernel at boot time. Let's provide a device tree table in the
|
||||
kernel, keyed by the dts filename, containing the relevant DTBs.
|
||||
|
||||
Built-in DTBs are generic enough and can be used as references.
|
||||
|
||||
config BUILTIN_DTB_NAME
|
||||
string "Source file for built-in dtb"
|
||||
depends on BUILTIN_DTB
|
||||
help
|
||||
Base name (without suffix, relative to arch/loongarch/boot/dts/)
|
||||
for the DTS file that will be used to produce the DTB linked into
|
||||
the kernel.
|
||||
|
||||
config DMI
|
||||
bool "Enable DMI scanning"
|
||||
select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
|
||||
@ -577,6 +596,9 @@ config ARCH_SELECTS_CRASH_DUMP
|
||||
depends on CRASH_DUMP
|
||||
select RELOCATABLE
|
||||
|
||||
config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
|
||||
def_bool CRASH_CORE
|
||||
|
||||
config RELOCATABLE
|
||||
bool "Relocatable kernel"
|
||||
help
|
||||
|
||||
@ -6,6 +6,7 @@
|
||||
boot := arch/loongarch/boot
|
||||
|
||||
KBUILD_DEFCONFIG := loongson3_defconfig
|
||||
KBUILD_DTBS := dtbs
|
||||
|
||||
image-name-y := vmlinux
|
||||
image-name-$(CONFIG_EFI_ZBOOT) := vmlinuz
|
||||
@ -81,8 +82,11 @@ KBUILD_AFLAGS_MODULE += -Wa,-mla-global-with-abs
|
||||
KBUILD_CFLAGS_MODULE += -fplt -Wa,-mla-global-with-abs,-mla-local-with-abs
|
||||
endif
|
||||
|
||||
KBUILD_RUSTFLAGS_MODULE += -Crelocation-model=pic
|
||||
|
||||
ifeq ($(CONFIG_RELOCATABLE),y)
|
||||
KBUILD_CFLAGS_KERNEL += -fPIE
|
||||
KBUILD_RUSTFLAGS_KERNEL += -Crelocation-model=pie
|
||||
LDFLAGS_vmlinux += -static -pie --no-dynamic-linker -z notext $(call ld-option, --apply-dynamic-relocs)
|
||||
endif
|
||||
|
||||
@ -141,7 +145,7 @@ endif
|
||||
|
||||
vdso-install-y += arch/loongarch/vdso/vdso.so.dbg
|
||||
|
||||
all: $(notdir $(KBUILD_IMAGE))
|
||||
all: $(notdir $(KBUILD_IMAGE)) $(KBUILD_DTBS)
|
||||
|
||||
vmlinuz.efi: vmlinux.efi
|
||||
|
||||
|
||||
@ -1,4 +1,5 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
dtstree := $(srctree)/$(src)
|
||||
|
||||
dtb-y := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
|
||||
dtb-y = loongson-2k0500-ref.dtb loongson-2k1000-ref.dtb loongson-2k2000-ref.dtb
|
||||
|
||||
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME))
|
||||
|
||||
88
arch/loongarch/boot/dts/loongson-2k0500-ref.dts
Normal file
88
arch/loongarch/boot/dts/loongson-2k0500-ref.dts
Normal file
@ -0,0 +1,88 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2023 Loongson Technology Corporation Limited
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "loongson-2k0500.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "loongson,ls2k0500-ref", "loongson,ls2k0500";
|
||||
model = "Loongson-2K0500 Reference Board";
|
||||
|
||||
aliases {
|
||||
ethernet0 = &gmac0;
|
||||
ethernet1 = &gmac1;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@200000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x00200000 0x0 0x0ee00000>,
|
||||
<0x0 0x90000000 0x0 0x60000000>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
linux,cma {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
size = <0x0 0x2000000>;
|
||||
linux,cma-default;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gmac0 {
|
||||
status = "okay";
|
||||
|
||||
phy-mode = "rgmii";
|
||||
bus_id = <0x0>;
|
||||
};
|
||||
|
||||
&gmac1 {
|
||||
status = "okay";
|
||||
|
||||
phy-mode = "rgmii";
|
||||
bus_id = <0x1>;
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
eeprom@57{
|
||||
compatible = "atmel,24c16";
|
||||
reg = <0x57>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
&ehci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ohci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rtc0 {
|
||||
status = "okay";
|
||||
};
|
||||
266
arch/loongarch/boot/dts/loongson-2k0500.dtsi
Normal file
266
arch/loongarch/boot/dts/loongson-2k0500.dtsi
Normal file
@ -0,0 +1,266 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2023 Loongson Technology Corporation Limited
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu0: cpu@0 {
|
||||
compatible = "loongson,la264";
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
clocks = <&cpu_clk>;
|
||||
};
|
||||
};
|
||||
|
||||
cpu_clk: cpu-clk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <500000000>;
|
||||
};
|
||||
|
||||
cpuintc: interrupt-controller {
|
||||
compatible = "loongson,cpu-interrupt-controller";
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
bus@10000000 {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
|
||||
<0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>,
|
||||
<0x0 0x20000000 0x0 0x20000000 0x0 0x10000000>,
|
||||
<0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
|
||||
<0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
isa@16400000 {
|
||||
compatible = "isa";
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
ranges = <1 0x0 0x0 0x16400000 0x4000>;
|
||||
};
|
||||
|
||||
liointc0: interrupt-controller@1fe11400 {
|
||||
compatible = "loongson,liointc-2.0";
|
||||
reg = <0x0 0x1fe11400 0x0 0x40>,
|
||||
<0x0 0x1fe11040 0x0 0x8>;
|
||||
reg-names = "main", "isr0";
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&cpuintc>;
|
||||
interrupts = <2>;
|
||||
interrupt-names = "int0";
|
||||
|
||||
loongson,parent_int_map = <0xffffffff>, /* int0 */
|
||||
<0x00000000>, /* int1 */
|
||||
<0x00000000>, /* int2 */
|
||||
<0x00000000>; /* int3 */
|
||||
};
|
||||
|
||||
liointc1: interrupt-controller@1fe11440 {
|
||||
compatible = "loongson,liointc-2.0";
|
||||
reg = <0x0 0x1fe11440 0x0 0x40>,
|
||||
<0x0 0x1fe11048 0x0 0x8>;
|
||||
reg-names = "main", "isr0";
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&cpuintc>;
|
||||
interrupts = <4>;
|
||||
interrupt-names = "int2";
|
||||
|
||||
loongson,parent_int_map = <0x00000000>, /* int0 */
|
||||
<0x00000000>, /* int1 */
|
||||
<0xffffffff>, /* int2 */
|
||||
<0x00000000>; /* int3 */
|
||||
};
|
||||
|
||||
eiointc: interrupt-controller@1fe11600 {
|
||||
compatible = "loongson,ls2k0500-eiointc";
|
||||
reg = <0x0 0x1fe11600 0x0 0xea00>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&cpuintc>;
|
||||
interrupts = <3>;
|
||||
};
|
||||
|
||||
gmac0: ethernet@1f020000 {
|
||||
compatible = "snps,dwmac-3.70a";
|
||||
reg = <0x0 0x1f020000 0x0 0x10000>;
|
||||
interrupt-parent = <&liointc0>;
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gmac1: ethernet@1f030000 {
|
||||
compatible = "snps,dwmac-3.70a";
|
||||
reg = <0x0 0x1f030000 0x0 0x10000>;
|
||||
interrupt-parent = <&liointc0>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sata: sata@1f040000 {
|
||||
compatible = "snps,spear-ahci";
|
||||
reg = <0x0 0x1f040000 0x0 0x10000>;
|
||||
interrupt-parent = <&eiointc>;
|
||||
interrupts = <75>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehci0: usb@1f050000 {
|
||||
compatible = "generic-ehci";
|
||||
reg = <0x0 0x1f050000 0x0 0x8000>;
|
||||
interrupt-parent = <&eiointc>;
|
||||
interrupts = <71>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ohci0: usb@1f058000 {
|
||||
compatible = "generic-ohci";
|
||||
reg = <0x0 0x1f058000 0x0 0x8000>;
|
||||
interrupt-parent = <&eiointc>;
|
||||
interrupts = <72>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart0: serial@1ff40800 {
|
||||
compatible = "ns16550a";
|
||||
reg = <0x0 0x1ff40800 0x0 0x10>;
|
||||
clock-frequency = <100000000>;
|
||||
interrupt-parent = <&eiointc>;
|
||||
interrupts = <2>;
|
||||
no-loopback-test;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@1ff48000 {
|
||||
compatible = "loongson,ls2k-i2c";
|
||||
reg = <0x0 0x1ff48000 0x0 0x0800>;
|
||||
interrupt-parent = <&eiointc>;
|
||||
interrupts = <14>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@1ff48800 {
|
||||
compatible = "loongson,ls2k-i2c";
|
||||
reg = <0x0 0x1ff48800 0x0 0x0800>;
|
||||
interrupt-parent = <&eiointc>;
|
||||
interrupts = <15>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@1ff49000 {
|
||||
compatible = "loongson,ls2k-i2c";
|
||||
reg = <0x0 0x1ff49000 0x0 0x0800>;
|
||||
interrupt-parent = <&eiointc>;
|
||||
interrupts = <16>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@1ff49800 {
|
||||
compatible = "loongson,ls2k-i2c";
|
||||
reg = <0x0 0x1ff49800 0x0 0x0800>;
|
||||
interrupt-parent = <&eiointc>;
|
||||
interrupts = <17>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@1ff4a000 {
|
||||
compatible = "loongson,ls2k-i2c";
|
||||
reg = <0x0 0x1ff4a000 0x0 0x0800>;
|
||||
interrupt-parent = <&eiointc>;
|
||||
interrupts = <18>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@1ff4a800 {
|
||||
compatible = "loongson,ls2k-i2c";
|
||||
reg = <0x0 0x1ff4a800 0x0 0x0800>;
|
||||
interrupt-parent = <&eiointc>;
|
||||
interrupts = <19>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pmc: power-management@1ff6c000 {
|
||||
compatible = "loongson,ls2k0500-pmc", "syscon";
|
||||
reg = <0x0 0x1ff6c000 0x0 0x58>;
|
||||
interrupt-parent = <&eiointc>;
|
||||
interrupts = <56>;
|
||||
loongson,suspend-address = <0x0 0x1c000500>;
|
||||
|
||||
syscon-reboot {
|
||||
compatible = "syscon-reboot";
|
||||
offset = <0x30>;
|
||||
mask = <0x1>;
|
||||
};
|
||||
|
||||
syscon-poweroff {
|
||||
compatible = "syscon-poweroff";
|
||||
regmap = <&pmc>;
|
||||
offset = <0x14>;
|
||||
mask = <0x3c00>;
|
||||
value = <0x3c00>;
|
||||
};
|
||||
};
|
||||
|
||||
rtc0: rtc@1ff6c100 {
|
||||
compatible = "loongson,ls2k0500-rtc", "loongson,ls7a-rtc";
|
||||
reg = <0x0 0x1ff6c100 0x0 0x100>;
|
||||
interrupt-parent = <&eiointc>;
|
||||
interrupts = <35>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@1a000000 {
|
||||
compatible = "loongson,ls2k-pci";
|
||||
reg = <0x0 0x1a000000 0x0 0x02000000>,
|
||||
<0xfe 0x0 0x0 0x20000000>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
bus-range = <0x0 0x5>;
|
||||
ranges = <0x01000000 0x0 0x00004000 0x0 0x16404000 0x0 0x00004000>,
|
||||
<0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
|
||||
|
||||
pcie@0,0 {
|
||||
reg = <0x0000 0x0 0x0 0x0 0x0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&eiointc>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x0 &eiointc 81>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
pcie@1,0 {
|
||||
reg = <0x0800 0x0 0x0 0x0 0x0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&eiointc>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x0 &eiointc 82>;
|
||||
ranges;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
183
arch/loongarch/boot/dts/loongson-2k1000-ref.dts
Normal file
183
arch/loongarch/boot/dts/loongson-2k1000-ref.dts
Normal file
@ -0,0 +1,183 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2023 Loongson Technology Corporation Limited
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "loongson-2k1000.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "loongson,ls2k1000-ref", "loongson,ls2k1000";
|
||||
model = "Loongson-2K1000 Reference Board";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@200000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x00200000 0x0 0x06e00000>,
|
||||
<0x0 0x08000000 0x0 0x07000000>,
|
||||
<0x0 0x90000000 0x1 0xe0000000>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
linux,cma {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
size = <0x0 0x2000000>;
|
||||
linux,cma-default;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gmac0 {
|
||||
status = "okay";
|
||||
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <&phy0>;
|
||||
mdio {
|
||||
compatible = "snps,dwmac-mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gmac1 {
|
||||
status = "okay";
|
||||
|
||||
phy-mode = "rgmii";
|
||||
phy-handle = <&phy1>;
|
||||
mdio {
|
||||
compatible = "snps,dwmac-mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <16>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-0 = <&i2c0_pins_default>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
eeprom@57{
|
||||
compatible = "atmel,24c16";
|
||||
reg = <0x57>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
spidev@0 {
|
||||
compatible = "rohm,dh2228fv";
|
||||
spi-max-frequency = <100000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&ehci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ohci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&clk {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rtc0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pctrl {
|
||||
status = "okay";
|
||||
|
||||
sdio_pins_default: sdio-pins {
|
||||
sdio-pinmux {
|
||||
groups = "sdio";
|
||||
function = "sdio";
|
||||
};
|
||||
sdio-det-pinmux {
|
||||
groups = "pwm2";
|
||||
function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
pwm1_pins_default: pwm1-pins {
|
||||
pinmux {
|
||||
groups = "pwm1";
|
||||
function = "pwm1";
|
||||
};
|
||||
};
|
||||
|
||||
pwm0_pins_default: pwm0-pins {
|
||||
pinmux {
|
||||
groups = "pwm0";
|
||||
function = "pwm0";
|
||||
};
|
||||
};
|
||||
|
||||
i2c1_pins_default: i2c1-pins {
|
||||
pinmux {
|
||||
groups = "i2c1";
|
||||
function = "i2c1";
|
||||
};
|
||||
};
|
||||
|
||||
i2c0_pins_default: i2c0-pins {
|
||||
pinmux {
|
||||
groups = "i2c0";
|
||||
function = "i2c0";
|
||||
};
|
||||
};
|
||||
|
||||
nand_pins_default: nand-pins {
|
||||
pinmux {
|
||||
groups = "nand";
|
||||
function = "nand";
|
||||
};
|
||||
};
|
||||
|
||||
hda_pins_default: hda-pins {
|
||||
grp0-pinmux {
|
||||
groups = "hda";
|
||||
function = "hda";
|
||||
};
|
||||
grp1-pinmux {
|
||||
groups = "i2s";
|
||||
function = "gpio";
|
||||
};
|
||||
};
|
||||
};
|
||||
492
arch/loongarch/boot/dts/loongson-2k1000.dtsi
Normal file
492
arch/loongarch/boot/dts/loongson-2k1000.dtsi
Normal file
@ -0,0 +1,492 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2023 Loongson Technology Corporation Limited
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/clock/loongson,ls2k-clk.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu0: cpu@0 {
|
||||
compatible = "loongson,la264";
|
||||
device_type = "cpu";
|
||||
reg= <0x0>;
|
||||
clocks = <&clk LOONGSON2_NODE_CLK>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
compatible = "loongson,la264";
|
||||
device_type = "cpu";
|
||||
reg = <0x1>;
|
||||
clocks = <&clk LOONGSON2_NODE_CLK>;
|
||||
};
|
||||
};
|
||||
|
||||
ref_100m: clock-ref-100m {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <100000000>;
|
||||
clock-output-names = "ref_100m";
|
||||
};
|
||||
|
||||
cpuintc: interrupt-controller {
|
||||
compatible = "loongson,cpu-interrupt-controller";
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
/* i2c of the dvi eeprom edid */
|
||||
i2c-gpio-0 {
|
||||
compatible = "i2c-gpio";
|
||||
scl-gpios = <&gpio0 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
i2c-gpio,delay-us = <5>; /* ~100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* i2c of the eeprom edid */
|
||||
i2c-gpio-1 {
|
||||
compatible = "i2c-gpio";
|
||||
scl-gpios = <&gpio0 33 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio0 32 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
i2c-gpio,delay-us = <5>; /* ~100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu-thermal {
|
||||
polling-delay-passive = <1000>;
|
||||
polling-delay = <5000>;
|
||||
thermal-sensors = <&tsensor 0>;
|
||||
|
||||
trips {
|
||||
cpu_alert: cpu-alert {
|
||||
temperature = <33000>;
|
||||
hysteresis = <2000>;
|
||||
type = "active";
|
||||
};
|
||||
|
||||
cpu_crit: cpu-crit {
|
||||
temperature = <85000>;
|
||||
hysteresis = <5000>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
bus@10000000 {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
|
||||
<0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>,
|
||||
<0x0 0x20000000 0x0 0x20000000 0x0 0x10000000>,
|
||||
<0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
|
||||
<0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
dma-coherent;
|
||||
|
||||
liointc0: interrupt-controller@1fe01400 {
|
||||
compatible = "loongson,liointc-2.0";
|
||||
reg = <0x0 0x1fe01400 0x0 0x40>,
|
||||
<0x0 0x1fe01040 0x0 0x8>,
|
||||
<0x0 0x1fe01140 0x0 0x8>;
|
||||
reg-names = "main", "isr0", "isr1";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&cpuintc>;
|
||||
interrupts = <2>;
|
||||
interrupt-names = "int0";
|
||||
loongson,parent_int_map = <0xffffffff>, /* int0 */
|
||||
<0x00000000>, /* int1 */
|
||||
<0x00000000>, /* int2 */
|
||||
<0x00000000>; /* int3 */
|
||||
};
|
||||
|
||||
liointc1: interrupt-controller@1fe01440 {
|
||||
compatible = "loongson,liointc-2.0";
|
||||
reg = <0x0 0x1fe01440 0x0 0x40>,
|
||||
<0x0 0x1fe01048 0x0 0x8>,
|
||||
<0x0 0x1fe01148 0x0 0x8>;
|
||||
reg-names = "main", "isr0", "isr1";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&cpuintc>;
|
||||
interrupts = <3>;
|
||||
interrupt-names = "int1";
|
||||
loongson,parent_int_map = <0x00000000>, /* int0 */
|
||||
<0xffffffff>, /* int1 */
|
||||
<0x00000000>, /* int2 */
|
||||
<0x00000000>; /* int3 */
|
||||
};
|
||||
|
||||
chipid@1fe00000 {
|
||||
compatible = "loongson,ls2k-chipid";
|
||||
reg = <0x0 0x1fe00000 0x0 0x30>;
|
||||
little-endian;
|
||||
};
|
||||
|
||||
pctrl: pinctrl@1fe00420 {
|
||||
compatible = "loongson,ls2k-pinctrl";
|
||||
reg = <0x0 0x1fe00420 0x0 0x18>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
clk: clock-controller@1fe00480 {
|
||||
compatible = "loongson,ls2k-clk";
|
||||
reg = <0x0 0x1fe00480 0x0 0x58>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&ref_100m>;
|
||||
clock-names = "ref_100m";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpio0: gpio@1fe00500 {
|
||||
compatible = "loongson,ls2k-gpio";
|
||||
reg = <0x0 0x1fe00500 0x0 0x38>;
|
||||
ngpios = <64>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
gpio-ranges = <&pctrl 0x0 0x0 15>,
|
||||
<&pctrl 16 16 15>,
|
||||
<&pctrl 32 32 10>,
|
||||
<&pctrl 44 44 20>;
|
||||
interrupt-parent = <&liointc1>;
|
||||
interrupts = <28 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<29 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<30 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<30 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<>,
|
||||
<>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<27 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
tsensor: thermal-sensor@1fe01500 {
|
||||
compatible = "loongson,ls2k1000-thermal";
|
||||
reg = <0x0 0x1fe01500 0x0 0x30>;
|
||||
interrupt-parent = <&liointc0>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
};
|
||||
|
||||
dma-controller@1fe00c00 {
|
||||
compatible = "loongson,ls2k1000-apbdma";
|
||||
reg = <0x0 0x1fe00c00 0x0 0x8>;
|
||||
interrupt-parent = <&liointc1>;
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk LOONGSON2_APB_CLK>;
|
||||
#dma-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dma-controller@1fe00c10 {
|
||||
compatible = "loongson,ls2k1000-apbdma";
|
||||
reg = <0x0 0x1fe00c10 0x0 0x8>;
|
||||
interrupt-parent = <&liointc1>;
|
||||
interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk LOONGSON2_APB_CLK>;
|
||||
#dma-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dma-controller@1fe00c20 {
|
||||
compatible = "loongson,ls2k1000-apbdma";
|
||||
reg = <0x0 0x1fe00c20 0x0 0x8>;
|
||||
interrupt-parent = <&liointc1>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk LOONGSON2_APB_CLK>;
|
||||
#dma-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dma-controller@1fe00c30 {
|
||||
compatible = "loongson,ls2k1000-apbdma";
|
||||
reg = <0x0 0x1fe00c30 0x0 0x8>;
|
||||
interrupt-parent = <&liointc1>;
|
||||
interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk LOONGSON2_APB_CLK>;
|
||||
#dma-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dma-controller@1fe00c40 {
|
||||
compatible = "loongson,ls2k1000-apbdma";
|
||||
reg = <0x0 0x1fe00c40 0x0 0x8>;
|
||||
interrupt-parent = <&liointc1>;
|
||||
interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk LOONGSON2_APB_CLK>;
|
||||
#dma-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart0: serial@1fe20000 {
|
||||
compatible = "ns16550a";
|
||||
reg = <0x0 0x1fe20000 0x0 0x10>;
|
||||
clock-frequency = <125000000>;
|
||||
interrupt-parent = <&liointc0>;
|
||||
interrupts = <0x0 IRQ_TYPE_LEVEL_HIGH>;
|
||||
no-loopback-test;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c2: i2c@1fe21000 {
|
||||
compatible = "loongson,ls2k-i2c";
|
||||
reg = <0x0 0x1fe21000 0x0 0x8>;
|
||||
interrupt-parent = <&liointc0>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c3: i2c@1fe21800 {
|
||||
compatible = "loongson,ls2k-i2c";
|
||||
reg = <0x0 0x1fe21800 0x0 0x8>;
|
||||
interrupt-parent = <&liointc0>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pmc: power-management@1fe27000 {
|
||||
compatible = "loongson,ls2k1000-pmc", "loongson,ls2k0500-pmc", "syscon";
|
||||
reg = <0x0 0x1fe27000 0x0 0x58>;
|
||||
interrupt-parent = <&liointc1>;
|
||||
interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
loongson,suspend-address = <0x0 0x1c000500>;
|
||||
|
||||
syscon-reboot {
|
||||
compatible = "syscon-reboot";
|
||||
offset = <0x30>;
|
||||
mask = <0x1>;
|
||||
};
|
||||
|
||||
syscon-poweroff {
|
||||
compatible = "syscon-poweroff";
|
||||
regmap = <&pmc>;
|
||||
offset = <0x14>;
|
||||
mask = <0x3c00>;
|
||||
value = <0x3c00>;
|
||||
};
|
||||
};
|
||||
|
||||
rtc0: rtc@1fe27800 {
|
||||
compatible = "loongson,ls2k1000-rtc";
|
||||
reg = <0x0 0x1fe27800 0x0 0x100>;
|
||||
interrupt-parent = <&liointc1>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@1fff0220 {
|
||||
compatible = "loongson,ls2k1000-spi";
|
||||
reg = <0x0 0x1fff0220 0x0 0x10>;
|
||||
clocks = <&clk LOONGSON2_BOOT_CLK>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@1a000000 {
|
||||
compatible = "loongson,ls2k-pci";
|
||||
reg = <0x0 0x1a000000 0x0 0x02000000>,
|
||||
<0xfe 0x0 0x0 0x20000000>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
bus-range = <0x0 0xff>;
|
||||
ranges = <0x01000000 0x0 0x00008000 0x0 0x18008000 0x0 0x00008000>,
|
||||
<0x02000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>;
|
||||
|
||||
gmac0: ethernet@3,0 {
|
||||
reg = <0x1800 0x0 0x0 0x0 0x0>;
|
||||
interrupt-parent = <&liointc0>;
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq", "eth_lpi";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gmac1: ethernet@3,1 {
|
||||
reg = <0x1900 0x0 0x0 0x0 0x0>;
|
||||
interrupt-parent = <&liointc0>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "macirq", "eth_lpi";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehci0: usb@4,1 {
|
||||
reg = <0x2100 0x0 0x0 0x0 0x0>;
|
||||
interrupt-parent = <&liointc1>;
|
||||
interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ohci0: usb@4,2 {
|
||||
reg = <0x2200 0x0 0x0 0x0 0x0>;
|
||||
interrupt-parent = <&liointc1>;
|
||||
interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
display@6,0 {
|
||||
reg = <0x3000 0x0 0x0 0x0 0x0>;
|
||||
interrupt-parent = <&liointc0>;
|
||||
interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hda@7,0 {
|
||||
reg = <0x3800 0x0 0x0 0x0 0x0>;
|
||||
interrupt-parent = <&liointc0>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sata: sata@8,0 {
|
||||
reg = <0x4000 0x0 0x0 0x0 0x0>;
|
||||
interrupt-parent = <&liointc0>;
|
||||
interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@9,0 {
|
||||
reg = <0x4800 0x0 0x0 0x0 0x0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 0x0 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
pcie@a,0 {
|
||||
reg = <0x5000 0x0 0x0 0x0 0x0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&liointc1>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 1 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
pcie@b,0 {
|
||||
reg = <0x5800 0x0 0x0 0x0 0x0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&liointc1>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 2 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
pcie@c,0 {
|
||||
reg = <0x6000 0x0 0x0 0x0 0x0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&liointc1>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 3 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
pcie@d,0 {
|
||||
reg = <0x6800 0x0 0x0 0x0 0x0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&liointc1>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
pcie@e,0 {
|
||||
reg = <0x7000 0x0 0x0 0x0 0x0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&liointc1>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x0 &liointc1 5 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ranges;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
72
arch/loongarch/boot/dts/loongson-2k2000-ref.dts
Normal file
72
arch/loongarch/boot/dts/loongson-2k2000-ref.dts
Normal file
@ -0,0 +1,72 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2023 Loongson Technology Corporation Limited
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "loongson-2k2000.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "loongson,ls2k2000-ref", "loongson,ls2k2000";
|
||||
model = "Loongson-2K2000 Reference Board";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@200000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x00200000 0x0 0x0ee00000>,
|
||||
<0x0 0x90000000 0x0 0x70000000>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
linux,cma {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
size = <0x0 0x2000000>;
|
||||
linux,cma-default;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rtc0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&xhci0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&xhci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gmac0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gmac1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gmac2 {
|
||||
status = "okay";
|
||||
};
|
||||
300
arch/loongarch/boot/dts/loongson-2k2000.dtsi
Normal file
300
arch/loongarch/boot/dts/loongson-2k2000.dtsi
Normal file
@ -0,0 +1,300 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2023 Loongson Technology Corporation Limited
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu0: cpu@1 {
|
||||
compatible = "loongson,la364";
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
clocks = <&cpu_clk>;
|
||||
};
|
||||
|
||||
cpu1: cpu@2 {
|
||||
compatible = "loongson,la364";
|
||||
device_type = "cpu";
|
||||
reg = <0x1>;
|
||||
clocks = <&cpu_clk>;
|
||||
};
|
||||
};
|
||||
|
||||
cpu_clk: cpu-clk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <1400000000>;
|
||||
};
|
||||
|
||||
cpuintc: interrupt-controller {
|
||||
compatible = "loongson,cpu-interrupt-controller";
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
bus@10000000 {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
|
||||
<0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>,
|
||||
<0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
|
||||
<0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
pmc: power-management@100d0000 {
|
||||
compatible = "loongson,ls2k2000-pmc", "loongson,ls2k0500-pmc", "syscon";
|
||||
reg = <0x0 0x100d0000 0x0 0x58>;
|
||||
interrupt-parent = <&eiointc>;
|
||||
interrupts = <47>;
|
||||
loongson,suspend-address = <0x0 0x1c000500>;
|
||||
|
||||
syscon-reboot {
|
||||
compatible = "syscon-reboot";
|
||||
offset = <0x30>;
|
||||
mask = <0x1>;
|
||||
};
|
||||
|
||||
syscon-poweroff {
|
||||
compatible = "syscon-poweroff";
|
||||
regmap = <&pmc>;
|
||||
offset = <0x14>;
|
||||
mask = <0x3c00>;
|
||||
value = <0x3c00>;
|
||||
};
|
||||
};
|
||||
|
||||
liointc: interrupt-controller@1fe01400 {
|
||||
compatible = "loongson,liointc-1.0";
|
||||
reg = <0x0 0x1fe01400 0x0 0x64>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&cpuintc>;
|
||||
interrupts = <2>;
|
||||
interrupt-names = "int0";
|
||||
loongson,parent_int_map = <0xffffffff>, /* int0 */
|
||||
<0x00000000>, /* int1 */
|
||||
<0x00000000>, /* int2 */
|
||||
<0x00000000>; /* int3 */
|
||||
};
|
||||
|
||||
eiointc: interrupt-controller@1fe01600 {
|
||||
compatible = "loongson,ls2k2000-eiointc";
|
||||
reg = <0x0 0x1fe01600 0x0 0xea00>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-parent = <&cpuintc>;
|
||||
interrupts = <3>;
|
||||
};
|
||||
|
||||
pic: interrupt-controller@10000000 {
|
||||
compatible = "loongson,pch-pic-1.0";
|
||||
reg = <0x0 0x10000000 0x0 0x400>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
loongson,pic-base-vec = <0>;
|
||||
interrupt-parent = <&eiointc>;
|
||||
};
|
||||
|
||||
msi: msi-controller@1fe01140 {
|
||||
compatible = "loongson,pch-msi-1.0";
|
||||
reg = <0x0 0x1fe01140 0x0 0x8>;
|
||||
msi-controller;
|
||||
loongson,msi-base-vec = <64>;
|
||||
loongson,msi-num-vecs = <192>;
|
||||
interrupt-parent = <&eiointc>;
|
||||
};
|
||||
|
||||
rtc0: rtc@100d0100 {
|
||||
compatible = "loongson,ls2k2000-rtc", "loongson,ls7a-rtc";
|
||||
reg = <0x0 0x100d0100 0x0 0x100>;
|
||||
interrupt-parent = <&pic>;
|
||||
interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart0: serial@1fe001e0 {
|
||||
compatible = "ns16550a";
|
||||
reg = <0x0 0x1fe001e0 0x0 0x10>;
|
||||
clock-frequency = <100000000>;
|
||||
interrupt-parent = <&liointc>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
|
||||
no-loopback-test;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@1a000000 {
|
||||
compatible = "loongson,ls2k-pci";
|
||||
reg = <0x0 0x1a000000 0x0 0x02000000>,
|
||||
<0xfe 0x0 0x0 0x20000000>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
bus-range = <0x0 0xff>;
|
||||
ranges = <0x01000000 0x0 0x00008000 0x0 0x18400000 0x0 0x00008000>,
|
||||
<0x02000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>;
|
||||
|
||||
gmac0: ethernet@3,0 {
|
||||
reg = <0x1800 0x0 0x0 0x0 0x0>;
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&pic>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gmac1: ethernet@3,1 {
|
||||
reg = <0x1900 0x0 0x0 0x0 0x0>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&pic>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gmac2: ethernet@3,2 {
|
||||
reg = <0x1a00 0x0 0x0 0x0 0x0>;
|
||||
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&pic>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
xhci0: usb@4,0 {
|
||||
reg = <0x2000 0x0 0x0 0x0 0x0>;
|
||||
interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&pic>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
xhci1: usb@19,0 {
|
||||
reg = <0xc800 0x0 0x0 0x0 0x0>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&pic>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
display@6,1 {
|
||||
reg = <0x3100 0x0 0x0 0x0 0x0>;
|
||||
interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&pic>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hda@7,0 {
|
||||
reg = <0x3800 0x0 0x0 0x0 0x0>;
|
||||
interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&pic>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sata: sata@8,0 {
|
||||
reg = <0x4000 0x0 0x0 0x0 0x0>;
|
||||
interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&pic>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie@9,0 {
|
||||
reg = <0x4800 0x0 0x0 0x0 0x0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&pic>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
pcie@a,0 {
|
||||
reg = <0x5000 0x0 0x0 0x0 0x0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&pic>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
pcie@b,0 {
|
||||
reg = <0x5800 0x0 0x0 0x0 0x0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&pic>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
pcie@c,0 {
|
||||
reg = <0x6000 0x0 0x0 0x0 0x0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&pic>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
pcie@d,0 {
|
||||
reg = <0x6800 0x0 0x0 0x0 0x0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&pic>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
pcie@e,0 {
|
||||
reg = <0x7000 0x0 0x0 0x0 0x0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&pic>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
pcie@f,0 {
|
||||
reg = <0x7800 0x0 0x0 0x0 0x0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&pic>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
pcie@10,0 {
|
||||
reg = <0x8000 0x0 0x0 0x0 0x0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&pic>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x0>;
|
||||
interrupt-map = <0x0 0x0 0x0 0x0 &pic 30 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ranges;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -6,6 +6,8 @@ CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_BPF_SYSCALL=y
|
||||
CONFIG_BPF_JIT=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_PREEMPT_DYNAMIC=y
|
||||
CONFIG_SCHED_CORE=y
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
CONFIG_BSD_PROCESS_ACCT_V3=y
|
||||
CONFIG_TASKSTATS=y
|
||||
@ -19,6 +21,7 @@ CONFIG_BLK_CGROUP=y
|
||||
CONFIG_CFS_BANDWIDTH=y
|
||||
CONFIG_RT_GROUP_SCHED=y
|
||||
CONFIG_CGROUP_PIDS=y
|
||||
CONFIG_CGROUP_RDMA=y
|
||||
CONFIG_CGROUP_FREEZER=y
|
||||
CONFIG_CGROUP_HUGETLB=y
|
||||
CONFIG_CPUSETS=y
|
||||
@ -26,6 +29,7 @@ CONFIG_CGROUP_DEVICE=y
|
||||
CONFIG_CGROUP_CPUACCT=y
|
||||
CONFIG_CGROUP_PERF=y
|
||||
CONFIG_CGROUP_BPF=y
|
||||
CONFIG_CGROUP_MISC=y
|
||||
CONFIG_NAMESPACES=y
|
||||
CONFIG_USER_NS=y
|
||||
CONFIG_CHECKPOINT_RESTORE=y
|
||||
@ -35,6 +39,8 @@ CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_EXPERT=y
|
||||
CONFIG_KALLSYMS_ALL=y
|
||||
CONFIG_PERF_EVENTS=y
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_CRASH_DUMP=y
|
||||
CONFIG_LOONGARCH=y
|
||||
CONFIG_64BIT=y
|
||||
CONFIG_MACH_LOONGSON64=y
|
||||
@ -44,13 +50,11 @@ CONFIG_DMI=y
|
||||
CONFIG_EFI=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_HOTPLUG_CPU=y
|
||||
CONFIG_NR_CPUS=64
|
||||
CONFIG_NR_CPUS=256
|
||||
CONFIG_NUMA=y
|
||||
CONFIG_CPU_HAS_FPU=y
|
||||
CONFIG_CPU_HAS_LSX=y
|
||||
CONFIG_CPU_HAS_LASX=y
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_CRASH_DUMP=y
|
||||
CONFIG_RANDOMIZE_BASE=y
|
||||
CONFIG_SUSPEND=y
|
||||
CONFIG_HIBERNATION=y
|
||||
@ -62,10 +66,6 @@ CONFIG_ACPI_IPMI=m
|
||||
CONFIG_ACPI_HOTPLUG_CPU=y
|
||||
CONFIG_ACPI_PCI_SLOT=y
|
||||
CONFIG_ACPI_HOTPLUG_MEMORY=y
|
||||
CONFIG_EFI_ZBOOT=y
|
||||
CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER=y
|
||||
CONFIG_EFI_CAPSULE_LOADER=m
|
||||
CONFIG_EFI_TEST=m
|
||||
CONFIG_VIRTUALIZATION=y
|
||||
CONFIG_KVM=m
|
||||
CONFIG_JUMP_LABEL=y
|
||||
@ -74,10 +74,18 @@ CONFIG_MODULE_FORCE_LOAD=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
CONFIG_MODVERSIONS=y
|
||||
CONFIG_BLK_DEV_ZONED=y
|
||||
CONFIG_BLK_DEV_THROTTLING=y
|
||||
CONFIG_BLK_DEV_THROTTLING_LOW=y
|
||||
CONFIG_BLK_WBT=y
|
||||
CONFIG_BLK_CGROUP_IOLATENCY=y
|
||||
CONFIG_BLK_CGROUP_FC_APPID=y
|
||||
CONFIG_BLK_CGROUP_IOCOST=y
|
||||
CONFIG_BLK_CGROUP_IOPRIO=y
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
CONFIG_BSD_DISKLABEL=y
|
||||
CONFIG_UNIXWARE_DISKLABEL=y
|
||||
CONFIG_CMDLINE_PARTITION=y
|
||||
CONFIG_IOSCHED_BFQ=y
|
||||
CONFIG_BFQ_GROUP_IOSCHED=y
|
||||
CONFIG_BINFMT_MISC=m
|
||||
@ -93,6 +101,8 @@ CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y
|
||||
CONFIG_MEMORY_HOTREMOVE=y
|
||||
CONFIG_KSM=y
|
||||
CONFIG_TRANSPARENT_HUGEPAGE=y
|
||||
CONFIG_CMA=y
|
||||
CONFIG_CMA_SYSFS=y
|
||||
CONFIG_USERFAULTFD=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
@ -128,6 +138,7 @@ CONFIG_IPV6_ROUTER_PREF=y
|
||||
CONFIG_IPV6_ROUTE_INFO=y
|
||||
CONFIG_INET6_ESP=m
|
||||
CONFIG_IPV6_MROUTE=y
|
||||
CONFIG_MPTCP=y
|
||||
CONFIG_NETWORK_PHY_TIMESTAMPING=y
|
||||
CONFIG_NETFILTER=y
|
||||
CONFIG_BRIDGE_NETFILTER=m
|
||||
@ -352,6 +363,7 @@ CONFIG_PCIEAER=y
|
||||
CONFIG_PCI_IOV=y
|
||||
CONFIG_HOTPLUG_PCI=y
|
||||
CONFIG_HOTPLUG_PCI_SHPC=y
|
||||
CONFIG_PCI_HOST_GENERIC=y
|
||||
CONFIG_PCCARD=m
|
||||
CONFIG_YENTA=m
|
||||
CONFIG_RAPIDIO=y
|
||||
@ -365,6 +377,10 @@ CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
CONFIG_FW_LOADER_COMPRESS=y
|
||||
CONFIG_FW_LOADER_COMPRESS_ZSTD=y
|
||||
CONFIG_EFI_ZBOOT=y
|
||||
CONFIG_EFI_BOOTLOADER_CONTROL=m
|
||||
CONFIG_EFI_CAPSULE_LOADER=m
|
||||
CONFIG_EFI_TEST=m
|
||||
CONFIG_MTD=m
|
||||
CONFIG_MTD_BLOCK=m
|
||||
CONFIG_MTD_CFI=m
|
||||
@ -586,6 +602,7 @@ CONFIG_RTW89_8852AE=m
|
||||
CONFIG_RTW89_8852CE=m
|
||||
CONFIG_ZD1211RW=m
|
||||
CONFIG_USB_NET_RNDIS_WLAN=m
|
||||
CONFIG_USB4_NET=m
|
||||
CONFIG_INPUT_MOUSEDEV=y
|
||||
CONFIG_INPUT_MOUSEDEV_PSAUX=y
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
@ -691,6 +708,9 @@ CONFIG_SND_HDA_CODEC_SIGMATEL=y
|
||||
CONFIG_SND_HDA_CODEC_HDMI=y
|
||||
CONFIG_SND_HDA_CODEC_CONEXANT=y
|
||||
CONFIG_SND_USB_AUDIO=m
|
||||
CONFIG_SND_SOC=m
|
||||
CONFIG_SND_SOC_LOONGSON_CARD=m
|
||||
CONFIG_SND_VIRTIO=m
|
||||
CONFIG_HIDRAW=y
|
||||
CONFIG_UHID=m
|
||||
CONFIG_HID_A4TECH=m
|
||||
@ -738,6 +758,11 @@ CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_EFI=y
|
||||
CONFIG_RTC_DRV_LOONGSON=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_LS2X_APB_DMA=y
|
||||
CONFIG_UDMABUF=y
|
||||
CONFIG_DMABUF_HEAPS=y
|
||||
CONFIG_DMABUF_HEAPS_SYSTEM=y
|
||||
CONFIG_DMABUF_HEAPS_CMA=y
|
||||
CONFIG_UIO=m
|
||||
CONFIG_UIO_PDRV_GENIRQ=m
|
||||
CONFIG_UIO_DMEM_GENIRQ=m
|
||||
@ -778,7 +803,15 @@ CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
|
||||
CONFIG_DEVFREQ_GOV_PERFORMANCE=y
|
||||
CONFIG_DEVFREQ_GOV_POWERSAVE=y
|
||||
CONFIG_DEVFREQ_GOV_USERSPACE=y
|
||||
CONFIG_NTB=m
|
||||
CONFIG_NTB_MSI=y
|
||||
CONFIG_NTB_IDT=m
|
||||
CONFIG_NTB_EPF=m
|
||||
CONFIG_NTB_SWITCHTEC=m
|
||||
CONFIG_NTB_PERF=m
|
||||
CONFIG_NTB_TRANSPORT=m
|
||||
CONFIG_PWM=y
|
||||
CONFIG_USB4=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_EXT2_FS_POSIX_ACL=y
|
||||
@ -797,6 +830,10 @@ CONFIG_GFS2_FS_LOCKING_DLM=y
|
||||
CONFIG_OCFS2_FS=m
|
||||
CONFIG_BTRFS_FS=y
|
||||
CONFIG_BTRFS_FS_POSIX_ACL=y
|
||||
CONFIG_F2FS_FS=m
|
||||
CONFIG_F2FS_FS_SECURITY=y
|
||||
CONFIG_F2FS_CHECK_FS=y
|
||||
CONFIG_F2FS_FS_COMPRESSION=y
|
||||
CONFIG_FANOTIFY=y
|
||||
CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
|
||||
CONFIG_QUOTA=y
|
||||
@ -883,7 +920,6 @@ CONFIG_KEY_DH_OPERATIONS=y
|
||||
CONFIG_SECURITY=y
|
||||
CONFIG_SECURITY_SELINUX=y
|
||||
CONFIG_SECURITY_SELINUX_BOOTPARAM=y
|
||||
CONFIG_SECURITY_SELINUX_DISABLE=y
|
||||
CONFIG_SECURITY_APPARMOR=y
|
||||
CONFIG_SECURITY_YAMA=y
|
||||
CONFIG_DEFAULT_SECURITY_DAC=y
|
||||
@ -914,6 +950,9 @@ CONFIG_CRYPTO_USER_API_RNG=m
|
||||
CONFIG_CRYPTO_USER_API_AEAD=m
|
||||
CONFIG_CRYPTO_CRC32_LOONGARCH=m
|
||||
CONFIG_CRYPTO_DEV_VIRTIO=m
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_DMA_NUMA_CMA=y
|
||||
CONFIG_CMA_SIZE_MBYTES=0
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_STRIP_ASM_SYMS=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
|
||||
@ -24,13 +24,15 @@ struct loongson_board_info {
|
||||
const char *board_vendor;
|
||||
};
|
||||
|
||||
#define NR_WORDS DIV_ROUND_UP(NR_CPUS, BITS_PER_LONG)
|
||||
|
||||
struct loongson_system_configuration {
|
||||
int nr_cpus;
|
||||
int nr_nodes;
|
||||
int boot_cpu_id;
|
||||
int cores_per_node;
|
||||
int cores_per_package;
|
||||
unsigned long cores_io_master;
|
||||
unsigned long cores_io_master[NR_WORDS];
|
||||
unsigned long suspend_addr;
|
||||
const char *cpuname;
|
||||
};
|
||||
@ -42,7 +44,7 @@ extern struct loongson_system_configuration loongson_sysconf;
|
||||
|
||||
static inline bool io_master(int cpu)
|
||||
{
|
||||
return test_bit(cpu, &loongson_sysconf.cores_io_master);
|
||||
return test_bit(cpu, loongson_sysconf.cores_io_master);
|
||||
}
|
||||
|
||||
#endif /* _ASM_BOOTINFO_H */
|
||||
|
||||
12
arch/loongarch/include/asm/crash_core.h
Normal file
12
arch/loongarch/include/asm/crash_core.h
Normal file
@ -0,0 +1,12 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
#ifndef _LOONGARCH_CRASH_CORE_H
|
||||
#define _LOONGARCH_CRASH_CORE_H
|
||||
|
||||
#define CRASH_ALIGN SZ_2M
|
||||
|
||||
#define CRASH_ADDR_LOW_MAX SZ_4G
|
||||
#define CRASH_ADDR_HIGH_MAX memblock_end_of_DRAM()
|
||||
|
||||
extern phys_addr_t memblock_end_of_DRAM(void);
|
||||
|
||||
#endif
|
||||
@ -241,8 +241,6 @@ void loongarch_dump_regs64(u64 *uregs, const struct pt_regs *regs);
|
||||
do { \
|
||||
current->thread.vdso = &vdso_info; \
|
||||
\
|
||||
loongarch_set_personality_fcsr(state); \
|
||||
\
|
||||
if (personality(current->personality) != PER_LINUX) \
|
||||
set_personality(PER_LINUX); \
|
||||
} while (0)
|
||||
@ -259,7 +257,6 @@ do { \
|
||||
clear_thread_flag(TIF_32BIT_ADDR); \
|
||||
\
|
||||
current->thread.vdso = &vdso_info; \
|
||||
loongarch_set_personality_fcsr(state); \
|
||||
\
|
||||
p = personality(current->personality); \
|
||||
if (p != PER_LINUX32 && p != PER_LINUX) \
|
||||
@ -340,6 +337,4 @@ extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf,
|
||||
extern int arch_check_elf(void *ehdr, bool has_interpreter, void *interp_ehdr,
|
||||
struct arch_elf_state *state);
|
||||
|
||||
extern void loongarch_set_personality_fcsr(struct arch_elf_state *state);
|
||||
|
||||
#endif /* _ASM_ELF_H */
|
||||
|
||||
@ -63,7 +63,7 @@ ftrace_regs_get_instruction_pointer(struct ftrace_regs *fregs)
|
||||
static __always_inline void
|
||||
ftrace_regs_set_instruction_pointer(struct ftrace_regs *fregs, unsigned long ip)
|
||||
{
|
||||
regs_set_return_value(&fregs->regs, ip);
|
||||
instruction_pointer_set(&fregs->regs, ip);
|
||||
}
|
||||
|
||||
#define ftrace_regs_get_argument(fregs, n) \
|
||||
|
||||
@ -1,12 +0,0 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
|
||||
*/
|
||||
#ifndef _ASM_SHMPARAM_H
|
||||
#define _ASM_SHMPARAM_H
|
||||
|
||||
#define __ARCH_FORCE_SHMLBA 1
|
||||
|
||||
#define SHMLBA SZ_64K /* attach addr a multiple of this */
|
||||
|
||||
#endif /* _ASM_SHMPARAM_H */
|
||||
@ -119,7 +119,7 @@ acpi_parse_eio_master(union acpi_subtable_headers *header, const unsigned long e
|
||||
return -EINVAL;
|
||||
|
||||
core = eiointc->node * CORES_PER_EIO_NODE;
|
||||
set_bit(core, &(loongson_sysconf.cores_io_master));
|
||||
set_bit(core, loongson_sysconf.cores_io_master);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -140,4 +140,6 @@ void __init efi_init(void)
|
||||
|
||||
early_memunmap(tbl, sizeof(*tbl));
|
||||
}
|
||||
|
||||
efi_esrt_init();
|
||||
}
|
||||
|
||||
@ -23,8 +23,3 @@ int arch_check_elf(void *_ehdr, bool has_interpreter, void *_interp_ehdr,
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
void loongarch_set_personality_fcsr(struct arch_elf_state *state)
|
||||
{
|
||||
current->thread.fpu.fcsr = boot_cpu_data.fpu_csr0;
|
||||
}
|
||||
|
||||
@ -5,13 +5,16 @@
|
||||
* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
|
||||
*/
|
||||
#include <linux/acpi.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/efi.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/memblock.h>
|
||||
#include <linux/of_clk.h>
|
||||
#include <asm/early_ioremap.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/loongson.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/time.h>
|
||||
|
||||
u64 efi_system_table;
|
||||
struct loongson_system_configuration loongson_sysconf;
|
||||
@ -36,7 +39,16 @@ void __init init_environ(void)
|
||||
|
||||
static int __init init_cpu_fullname(void)
|
||||
{
|
||||
int cpu;
|
||||
struct device_node *root;
|
||||
int cpu, ret;
|
||||
char *model;
|
||||
|
||||
/* Parsing cpuname from DTS model property */
|
||||
root = of_find_node_by_path("/");
|
||||
ret = of_property_read_string(root, "model", (const char **)&model);
|
||||
of_node_put(root);
|
||||
if (ret == 0)
|
||||
loongson_sysconf.cpuname = strsep(&model, " ");
|
||||
|
||||
if (loongson_sysconf.cpuname && !strncmp(loongson_sysconf.cpuname, "Loongson", 8)) {
|
||||
for (cpu = 0; cpu < NR_CPUS; cpu++)
|
||||
@ -46,6 +58,26 @@ static int __init init_cpu_fullname(void)
|
||||
}
|
||||
arch_initcall(init_cpu_fullname);
|
||||
|
||||
static int __init fdt_cpu_clk_init(void)
|
||||
{
|
||||
struct clk *clk;
|
||||
struct device_node *np;
|
||||
|
||||
np = of_get_cpu_node(0, NULL);
|
||||
if (!np)
|
||||
return -ENODEV;
|
||||
|
||||
clk = of_clk_get(np, 0);
|
||||
if (IS_ERR(clk))
|
||||
return -ENODEV;
|
||||
|
||||
cpu_clock_freq = clk_get_rate(clk);
|
||||
clk_put(clk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
late_initcall(fdt_cpu_clk_init);
|
||||
|
||||
static ssize_t boardinfo_show(struct kobject *kobj,
|
||||
struct kobj_attribute *attr, char *buf)
|
||||
{
|
||||
|
||||
@ -74,6 +74,11 @@ SYM_CODE_START(kernel_entry) # kernel entry point
|
||||
la.pcrel t0, fw_arg2
|
||||
st.d a2, t0, 0
|
||||
|
||||
#ifdef CONFIG_PAGE_SIZE_4KB
|
||||
li.d t0, 0
|
||||
li.d t1, CSR_STFILL
|
||||
csrxchg t0, t1, LOONGARCH_CSR_IMPCTL1
|
||||
#endif
|
||||
/* KSave3 used for percpu base, initialized as 0 */
|
||||
csrwr zero, PERCPU_BASE_KS
|
||||
/* GPR21 used for percpu base (runtime), initialized as 0 */
|
||||
@ -126,6 +131,11 @@ SYM_CODE_START(smpboot_entry)
|
||||
|
||||
JUMP_VIRT_ADDR t0, t1
|
||||
|
||||
#ifdef CONFIG_PAGE_SIZE_4KB
|
||||
li.d t0, 0
|
||||
li.d t1, CSR_STFILL
|
||||
csrxchg t0, t1, LOONGARCH_CSR_IMPCTL1
|
||||
#endif
|
||||
/* Enable PG */
|
||||
li.w t0, 0xb0 # PLV=0, IE=0, PG=1
|
||||
csrwr t0, LOONGARCH_CSR_CRMD
|
||||
|
||||
@ -85,6 +85,7 @@ void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long sp)
|
||||
regs->csr_euen = euen;
|
||||
lose_fpu(0);
|
||||
lose_lbt(0);
|
||||
current->thread.fpu.fcsr = boot_cpu_data.fpu_csr0;
|
||||
|
||||
clear_thread_flag(TIF_LSX_CTX_LIVE);
|
||||
clear_thread_flag(TIF_LASX_CTX_LIVE);
|
||||
|
||||
@ -252,38 +252,23 @@ static void __init arch_reserve_vmcore(void)
|
||||
#endif
|
||||
}
|
||||
|
||||
/* 2MB alignment for crash kernel regions */
|
||||
#define CRASH_ALIGN SZ_2M
|
||||
#define CRASH_ADDR_MAX SZ_4G
|
||||
|
||||
static void __init arch_parse_crashkernel(void)
|
||||
static void __init arch_reserve_crashkernel(void)
|
||||
{
|
||||
#ifdef CONFIG_KEXEC
|
||||
int ret;
|
||||
unsigned long long total_mem;
|
||||
unsigned long long low_size = 0;
|
||||
unsigned long long crash_base, crash_size;
|
||||
char *cmdline = boot_command_line;
|
||||
bool high = false;
|
||||
|
||||
total_mem = memblock_phys_mem_size();
|
||||
ret = parse_crashkernel(boot_command_line, total_mem,
|
||||
&crash_size, &crash_base,
|
||||
NULL, NULL);
|
||||
if (ret < 0 || crash_size <= 0)
|
||||
if (!IS_ENABLED(CONFIG_KEXEC_CORE))
|
||||
return;
|
||||
|
||||
if (crash_base <= 0) {
|
||||
crash_base = memblock_phys_alloc_range(crash_size, CRASH_ALIGN, CRASH_ALIGN, CRASH_ADDR_MAX);
|
||||
if (!crash_base) {
|
||||
pr_warn("crashkernel reservation failed - No suitable area found.\n");
|
||||
return;
|
||||
}
|
||||
} else if (!memblock_phys_alloc_range(crash_size, CRASH_ALIGN, crash_base, crash_base + crash_size)) {
|
||||
pr_warn("Invalid memory region reserved for crash kernel\n");
|
||||
ret = parse_crashkernel(cmdline, memblock_phys_mem_size(),
|
||||
&crash_size, &crash_base, &low_size, &high);
|
||||
if (ret)
|
||||
return;
|
||||
}
|
||||
|
||||
crashk_res.start = crash_base;
|
||||
crashk_res.end = crash_base + crash_size - 1;
|
||||
#endif
|
||||
reserve_crashkernel_generic(cmdline, crash_size, crash_base, low_size, high);
|
||||
}
|
||||
|
||||
static void __init fdt_setup(void)
|
||||
@ -295,8 +280,12 @@ static void __init fdt_setup(void)
|
||||
if (acpi_os_get_root_pointer())
|
||||
return;
|
||||
|
||||
/* Look for a device tree configuration table entry */
|
||||
fdt_pointer = efi_fdt_pointer();
|
||||
/* Prefer to use built-in dtb, checking its legality first. */
|
||||
if (!fdt_check_header(__dtb_start))
|
||||
fdt_pointer = __dtb_start;
|
||||
else
|
||||
fdt_pointer = efi_fdt_pointer(); /* Fallback to firmware dtb */
|
||||
|
||||
if (!fdt_pointer || fdt_check_header(fdt_pointer))
|
||||
return;
|
||||
|
||||
@ -330,7 +319,9 @@ static void __init bootcmdline_init(char **cmdline_p)
|
||||
if (boot_command_line[0])
|
||||
strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
|
||||
|
||||
strlcat(boot_command_line, init_command_line, COMMAND_LINE_SIZE);
|
||||
if (!strstr(boot_command_line, init_command_line))
|
||||
strlcat(boot_command_line, init_command_line, COMMAND_LINE_SIZE);
|
||||
|
||||
goto out;
|
||||
}
|
||||
#endif
|
||||
@ -357,7 +348,7 @@ out:
|
||||
void __init platform_init(void)
|
||||
{
|
||||
arch_reserve_vmcore();
|
||||
arch_parse_crashkernel();
|
||||
arch_reserve_crashkernel();
|
||||
|
||||
#ifdef CONFIG_ACPI_TABLE_UPGRADE
|
||||
acpi_table_upgrade();
|
||||
@ -467,15 +458,6 @@ static void __init resource_init(void)
|
||||
request_resource(res, &data_resource);
|
||||
request_resource(res, &bss_resource);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_KEXEC
|
||||
if (crashk_res.start < crashk_res.end) {
|
||||
insert_resource(&iomem_resource, &crashk_res);
|
||||
pr_info("Reserving %ldMB of memory at %ldMB for crashkernel\n",
|
||||
(unsigned long)((crashk_res.end - crashk_res.start + 1) >> 20),
|
||||
(unsigned long)(crashk_res.start >> 20));
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
static int __init add_legacy_isa_io(struct fwnode_handle *fwnode,
|
||||
|
||||
@ -208,7 +208,7 @@ static void __init fdt_smp_setup(void)
|
||||
}
|
||||
|
||||
loongson_sysconf.nr_cpus = num_processors;
|
||||
set_bit(0, &(loongson_sysconf.cores_io_master));
|
||||
set_bit(0, loongson_sysconf.cores_io_master);
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -216,6 +216,9 @@ void __init loongson_smp_setup(void)
|
||||
{
|
||||
fdt_smp_setup();
|
||||
|
||||
if (loongson_sysconf.cores_per_package == 0)
|
||||
loongson_sysconf.cores_per_package = num_processors;
|
||||
|
||||
cpu_data[0].core = cpu_logical_map(0) % loongson_sysconf.cores_per_package;
|
||||
cpu_data[0].package = cpu_logical_map(0) / loongson_sysconf.cores_per_package;
|
||||
|
||||
|
||||
@ -201,6 +201,11 @@ bool bpf_jit_supports_kfunc_call(void)
|
||||
return true;
|
||||
}
|
||||
|
||||
bool bpf_jit_supports_far_kfunc_call(void)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
/* initialized on the first pass of build_body() */
|
||||
static int out_offset = -1;
|
||||
static int emit_bpf_tail_call(struct jit_ctx *ctx)
|
||||
@ -465,7 +470,6 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
|
||||
const u8 dst = regmap[insn->dst_reg];
|
||||
const s16 off = insn->off;
|
||||
const s32 imm = insn->imm;
|
||||
const u64 imm64 = (u64)(insn + 1)->imm << 32 | (u32)insn->imm;
|
||||
const bool is32 = BPF_CLASS(insn->code) == BPF_ALU || BPF_CLASS(insn->code) == BPF_JMP32;
|
||||
|
||||
switch (code) {
|
||||
@ -923,8 +927,12 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
|
||||
|
||||
/* dst = imm64 */
|
||||
case BPF_LD | BPF_IMM | BPF_DW:
|
||||
{
|
||||
const u64 imm64 = (u64)(insn + 1)->imm << 32 | (u32)insn->imm;
|
||||
|
||||
move_imm(ctx, dst, imm64, is32);
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* dst = *(size *)(src + off) */
|
||||
case BPF_LDX | BPF_MEM | BPF_B:
|
||||
|
||||
@ -287,7 +287,8 @@ CONFIG_BTRFS_FS_POSIX_ACL=y
|
||||
CONFIG_QUOTA_NETLINK_INTERFACE=y
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_CUSE=m
|
||||
CONFIG_FSCACHE=m
|
||||
CONFIG_NETFS_SUPPORT=m
|
||||
CONFIG_FSCACHE=y
|
||||
CONFIG_FSCACHE_STATS=y
|
||||
CONFIG_CACHEFILES=m
|
||||
CONFIG_PROC_KCORE=y
|
||||
|
||||
@ -238,7 +238,8 @@ CONFIG_BTRFS_FS=m
|
||||
CONFIG_QUOTA=y
|
||||
CONFIG_QFMT_V2=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FSCACHE=m
|
||||
CONFIG_NETFS_SUPPORT=m
|
||||
CONFIG_FSCACHE=y
|
||||
CONFIG_CACHEFILES=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
|
||||
@ -356,7 +356,8 @@ CONFIG_QFMT_V2=m
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_VIRTIO_FS=m
|
||||
CONFIG_FSCACHE=m
|
||||
CONFIG_NETFS_SUPPORT=m
|
||||
CONFIG_FSCACHE=y
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_MSDOS_FS=m
|
||||
|
||||
@ -68,7 +68,8 @@ CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_EXT4_FS_SECURITY=y
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_FSCACHE=m
|
||||
CONFIG_NETFS_SUPPORT=m
|
||||
CONFIG_FSCACHE=y
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_ZISOFS=y
|
||||
|
||||
@ -859,6 +859,7 @@ config THREAD_SHIFT
|
||||
int "Thread shift" if EXPERT
|
||||
range 13 15
|
||||
default "15" if PPC_256K_PAGES
|
||||
default "15" if PPC_PSERIES || PPC_POWERNV
|
||||
default "14" if PPC64
|
||||
default "13"
|
||||
help
|
||||
|
||||
@ -53,6 +53,7 @@ config RISCV
|
||||
select ARCH_USE_MEMTEST
|
||||
select ARCH_USE_QUEUED_RWLOCKS
|
||||
select ARCH_USES_CFI_TRAPS if CFI_CLANG
|
||||
select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH if SMP && MMU
|
||||
select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
|
||||
select ARCH_WANT_FRAME_POINTERS
|
||||
select ARCH_WANT_GENERAL_HUGETLB if !RISCV_ISA_SVNAPOT
|
||||
@ -66,9 +67,10 @@ config RISCV
|
||||
select CLINT_TIMER if !MMU
|
||||
select CLONE_BACKWARDS
|
||||
select COMMON_CLK
|
||||
select CPU_PM if CPU_IDLE || HIBERNATION
|
||||
select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND
|
||||
select EDAC_SUPPORT
|
||||
select FRAME_POINTER if PERF_EVENTS || (FUNCTION_TRACER && !DYNAMIC_FTRACE)
|
||||
select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY if DYNAMIC_FTRACE
|
||||
select GENERIC_ARCH_TOPOLOGY
|
||||
select GENERIC_ATOMIC64 if !64BIT
|
||||
select GENERIC_CLOCKEVENTS_BROADCAST if SMP
|
||||
@ -115,6 +117,7 @@ config RISCV
|
||||
select HAVE_DEBUG_KMEMLEAK
|
||||
select HAVE_DMA_CONTIGUOUS if MMU
|
||||
select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && MMU && (CLANG_SUPPORTS_DYNAMIC_FTRACE || GCC_SUPPORTS_DYNAMIC_FTRACE)
|
||||
select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS
|
||||
select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE
|
||||
select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL
|
||||
select HAVE_FUNCTION_GRAPH_TRACER
|
||||
@ -142,6 +145,8 @@ config RISCV
|
||||
select HAVE_REGS_AND_STACK_ACCESS_API
|
||||
select HAVE_RETHOOK if !XIP_KERNEL
|
||||
select HAVE_RSEQ
|
||||
select HAVE_SAMPLE_FTRACE_DIRECT
|
||||
select HAVE_SAMPLE_FTRACE_DIRECT_MULTI
|
||||
select HAVE_STACKPROTECTOR
|
||||
select HAVE_SYSCALL_TRACEPOINTS
|
||||
select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
|
||||
@ -183,6 +188,20 @@ config HAVE_SHADOW_CALL_STACK
|
||||
# https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/a484e843e6eeb51f0cb7b8819e50da6d2444d769
|
||||
depends on $(ld-option,--no-relax-gp)
|
||||
|
||||
config RISCV_USE_LINKER_RELAXATION
|
||||
def_bool y
|
||||
# https://github.com/llvm/llvm-project/commit/6611d58f5bbcbec77262d392e2923e1d680f6985
|
||||
depends on !LD_IS_LLD || LLD_VERSION >= 150000
|
||||
|
||||
# https://github.com/llvm/llvm-project/commit/bbc0f99f3bc96f1db16f649fc21dd18e5b0918f6
|
||||
config ARCH_HAS_BROKEN_DWARF5
|
||||
def_bool y
|
||||
depends on RISCV_USE_LINKER_RELAXATION
|
||||
# https://github.com/llvm/llvm-project/commit/1df5ea29b43690b6622db2cad7b745607ca4de6a
|
||||
depends on AS_IS_LLVM && AS_VERSION < 180000
|
||||
# https://github.com/llvm/llvm-project/commit/7ffabb61a5569444b5ac9322e22e5471cc5e4a77
|
||||
depends on LD_IS_LLD && LLD_VERSION < 180000
|
||||
|
||||
config ARCH_MMAP_RND_BITS_MIN
|
||||
default 18 if 64BIT
|
||||
default 8
|
||||
@ -529,6 +548,28 @@ config RISCV_ISA_V_DEFAULT_ENABLE
|
||||
|
||||
If you don't know what to do here, say Y.
|
||||
|
||||
config RISCV_ISA_V_UCOPY_THRESHOLD
|
||||
int "Threshold size for vectorized user copies"
|
||||
depends on RISCV_ISA_V
|
||||
default 768
|
||||
help
|
||||
Prefer using vectorized copy_to_user()/copy_from_user() when the
|
||||
workload size exceeds this value.
|
||||
|
||||
config RISCV_ISA_V_PREEMPTIVE
|
||||
bool "Run kernel-mode Vector with kernel preemption"
|
||||
depends on PREEMPTION
|
||||
depends on RISCV_ISA_V
|
||||
default y
|
||||
help
|
||||
Usually, in-kernel SIMD routines are run with preemption disabled.
|
||||
Functions which envoke long running SIMD thus must yield core's
|
||||
vector unit to prevent blocking other tasks for too long.
|
||||
|
||||
This config allows kernel to run SIMD without explicitly disable
|
||||
preemption. Enabling this config will result in higher memory
|
||||
consumption due to the allocation of per-task's kernel Vector context.
|
||||
|
||||
config TOOLCHAIN_HAS_ZBB
|
||||
bool
|
||||
default y
|
||||
@ -655,6 +696,20 @@ config RISCV_MISALIGNED
|
||||
load/store for both kernel and userspace. When disable, misaligned
|
||||
accesses will generate SIGBUS in userspace and panic in kernel.
|
||||
|
||||
config RISCV_EFFICIENT_UNALIGNED_ACCESS
|
||||
bool "Assume the CPU supports fast unaligned memory accesses"
|
||||
depends on NONPORTABLE
|
||||
select DCACHE_WORD_ACCESS if MMU
|
||||
select HAVE_EFFICIENT_UNALIGNED_ACCESS
|
||||
help
|
||||
Say Y here if you want the kernel to assume that the CPU supports
|
||||
efficient unaligned memory accesses. When enabled, this option
|
||||
improves the performance of the kernel on such CPUs. However, the
|
||||
kernel will run much more slowly, or will not be able to run at all,
|
||||
on CPUs that do not support efficient unaligned memory accesses.
|
||||
|
||||
If unsure what to do here, say N.
|
||||
|
||||
endmenu # "Platform type"
|
||||
|
||||
menu "Kernel features"
|
||||
|
||||
@ -98,6 +98,7 @@ config ERRATA_THEAD_CMO
|
||||
depends on ERRATA_THEAD && MMU
|
||||
select DMA_DIRECT_REMAP
|
||||
select RISCV_DMA_NONCOHERENT
|
||||
select RISCV_NONSTANDARD_CACHE_OPS
|
||||
default y
|
||||
help
|
||||
This will apply the cache management errata to handle the
|
||||
|
||||
@ -43,8 +43,7 @@ else
|
||||
KBUILD_LDFLAGS += -melf32lriscv
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_LD_IS_LLD),y)
|
||||
ifeq ($(call test-lt, $(CONFIG_LLD_VERSION), 150000),y)
|
||||
ifndef CONFIG_RISCV_USE_LINKER_RELAXATION
|
||||
KBUILD_CFLAGS += -mno-relax
|
||||
KBUILD_AFLAGS += -mno-relax
|
||||
ifndef CONFIG_AS_IS_LLVM
|
||||
@ -52,7 +51,6 @@ ifndef CONFIG_AS_IS_LLVM
|
||||
KBUILD_AFLAGS += -Wa,-mno-relax
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_SHADOW_CALL_STACK),y)
|
||||
KBUILD_LDFLAGS += --no-relax-gp
|
||||
@ -108,7 +106,9 @@ KBUILD_AFLAGS_MODULE += $(call as-option,-Wa$(comma)-mno-relax)
|
||||
# unaligned accesses. While unaligned accesses are explicitly allowed in the
|
||||
# RISC-V ISA, they're emulated by machine mode traps on all extant
|
||||
# architectures. It's faster to have GCC emit only aligned accesses.
|
||||
ifneq ($(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS),y)
|
||||
KBUILD_CFLAGS += $(call cc-option,-mstrict-align)
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_STACKPROTECTOR_PER_TASK),y)
|
||||
prepare: stack_protector_prepare
|
||||
@ -163,6 +163,8 @@ BOOT_TARGETS := Image Image.gz loader loader.bin xipImage vmlinuz.efi
|
||||
|
||||
all: $(notdir $(KBUILD_IMAGE))
|
||||
|
||||
loader.bin: loader
|
||||
Image.gz loader vmlinuz.efi: Image
|
||||
$(BOOT_TARGETS): vmlinux
|
||||
$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
|
||||
@$(kecho) ' Kernel: $(boot)/$@ is ready'
|
||||
|
||||
@ -149,6 +149,7 @@ CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_DW=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SERIAL_SH_SCI=y
|
||||
CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
|
||||
CONFIG_VIRTIO_CONSOLE=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HW_RANDOM_VIRTIO=y
|
||||
|
||||
@ -12,8 +12,10 @@
|
||||
#include <asm/alternative.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/cpufeature.h>
|
||||
#include <asm/dma-noncoherent.h>
|
||||
#include <asm/errata_list.h>
|
||||
#include <asm/hwprobe.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/patch.h>
|
||||
#include <asm/vendorid_list.h>
|
||||
|
||||
@ -33,6 +35,69 @@ static bool errata_probe_pbmt(unsigned int stage,
|
||||
return false;
|
||||
}
|
||||
|
||||
/*
|
||||
* th.dcache.ipa rs1 (invalidate, physical address)
|
||||
* | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
|
||||
* 0000001 01010 rs1 000 00000 0001011
|
||||
* th.dcache.iva rs1 (invalidate, virtual address)
|
||||
* 0000001 00110 rs1 000 00000 0001011
|
||||
*
|
||||
* th.dcache.cpa rs1 (clean, physical address)
|
||||
* | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
|
||||
* 0000001 01001 rs1 000 00000 0001011
|
||||
* th.dcache.cva rs1 (clean, virtual address)
|
||||
* 0000001 00101 rs1 000 00000 0001011
|
||||
*
|
||||
* th.dcache.cipa rs1 (clean then invalidate, physical address)
|
||||
* | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
|
||||
* 0000001 01011 rs1 000 00000 0001011
|
||||
* th.dcache.civa rs1 (clean then invalidate, virtual address)
|
||||
* 0000001 00111 rs1 000 00000 0001011
|
||||
*
|
||||
* th.sync.s (make sure all cache operations finished)
|
||||
* | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
|
||||
* 0000000 11001 00000 000 00000 0001011
|
||||
*/
|
||||
#define THEAD_INVAL_A0 ".long 0x02a5000b"
|
||||
#define THEAD_CLEAN_A0 ".long 0x0295000b"
|
||||
#define THEAD_FLUSH_A0 ".long 0x02b5000b"
|
||||
#define THEAD_SYNC_S ".long 0x0190000b"
|
||||
|
||||
#define THEAD_CMO_OP(_op, _start, _size, _cachesize) \
|
||||
asm volatile("mv a0, %1\n\t" \
|
||||
"j 2f\n\t" \
|
||||
"3:\n\t" \
|
||||
THEAD_##_op##_A0 "\n\t" \
|
||||
"add a0, a0, %0\n\t" \
|
||||
"2:\n\t" \
|
||||
"bltu a0, %2, 3b\n\t" \
|
||||
THEAD_SYNC_S \
|
||||
: : "r"(_cachesize), \
|
||||
"r"((unsigned long)(_start) & ~((_cachesize) - 1UL)), \
|
||||
"r"((unsigned long)(_start) + (_size)) \
|
||||
: "a0")
|
||||
|
||||
static void thead_errata_cache_inv(phys_addr_t paddr, size_t size)
|
||||
{
|
||||
THEAD_CMO_OP(INVAL, paddr, size, riscv_cbom_block_size);
|
||||
}
|
||||
|
||||
static void thead_errata_cache_wback(phys_addr_t paddr, size_t size)
|
||||
{
|
||||
THEAD_CMO_OP(CLEAN, paddr, size, riscv_cbom_block_size);
|
||||
}
|
||||
|
||||
static void thead_errata_cache_wback_inv(phys_addr_t paddr, size_t size)
|
||||
{
|
||||
THEAD_CMO_OP(FLUSH, paddr, size, riscv_cbom_block_size);
|
||||
}
|
||||
|
||||
static const struct riscv_nonstd_cache_ops thead_errata_cmo_ops = {
|
||||
.wback = &thead_errata_cache_wback,
|
||||
.inv = &thead_errata_cache_inv,
|
||||
.wback_inv = &thead_errata_cache_wback_inv,
|
||||
};
|
||||
|
||||
static bool errata_probe_cmo(unsigned int stage,
|
||||
unsigned long arch_id, unsigned long impid)
|
||||
{
|
||||
@ -48,6 +113,7 @@ static bool errata_probe_cmo(unsigned int stage,
|
||||
if (stage == RISCV_ALTERNATIVES_BOOT) {
|
||||
riscv_cbom_block_size = L1_CACHE_BYTES;
|
||||
riscv_noncoherent_supported();
|
||||
riscv_noncoherent_register_cache_ops(&thead_errata_cmo_ops);
|
||||
}
|
||||
|
||||
return true;
|
||||
@ -77,8 +143,7 @@ static u32 thead_errata_probe(unsigned int stage,
|
||||
if (errata_probe_pbmt(stage, archid, impid))
|
||||
cpu_req_errata |= BIT(ERRATA_THEAD_PBMT);
|
||||
|
||||
if (errata_probe_cmo(stage, archid, impid))
|
||||
cpu_req_errata |= BIT(ERRATA_THEAD_CMO);
|
||||
errata_probe_cmo(stage, archid, impid);
|
||||
|
||||
if (errata_probe_pmu(stage, archid, impid))
|
||||
cpu_req_errata |= BIT(ERRATA_THEAD_PMU);
|
||||
|
||||
78
arch/riscv/include/asm/arch_hweight.h
Normal file
78
arch/riscv/include/asm/arch_hweight.h
Normal file
@ -0,0 +1,78 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Based on arch/x86/include/asm/arch_hweight.h
|
||||
*/
|
||||
|
||||
#ifndef _ASM_RISCV_HWEIGHT_H
|
||||
#define _ASM_RISCV_HWEIGHT_H
|
||||
|
||||
#include <asm/alternative-macros.h>
|
||||
#include <asm/hwcap.h>
|
||||
|
||||
#if (BITS_PER_LONG == 64)
|
||||
#define CPOPW "cpopw "
|
||||
#elif (BITS_PER_LONG == 32)
|
||||
#define CPOPW "cpop "
|
||||
#else
|
||||
#error "Unexpected BITS_PER_LONG"
|
||||
#endif
|
||||
|
||||
static __always_inline unsigned int __arch_hweight32(unsigned int w)
|
||||
{
|
||||
#ifdef CONFIG_RISCV_ISA_ZBB
|
||||
asm_volatile_goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
|
||||
RISCV_ISA_EXT_ZBB, 1)
|
||||
: : : : legacy);
|
||||
|
||||
asm (".option push\n"
|
||||
".option arch,+zbb\n"
|
||||
CPOPW "%0, %0\n"
|
||||
".option pop\n"
|
||||
: "+r" (w) : :);
|
||||
|
||||
return w;
|
||||
|
||||
legacy:
|
||||
#endif
|
||||
return __sw_hweight32(w);
|
||||
}
|
||||
|
||||
static inline unsigned int __arch_hweight16(unsigned int w)
|
||||
{
|
||||
return __arch_hweight32(w & 0xffff);
|
||||
}
|
||||
|
||||
static inline unsigned int __arch_hweight8(unsigned int w)
|
||||
{
|
||||
return __arch_hweight32(w & 0xff);
|
||||
}
|
||||
|
||||
#if BITS_PER_LONG == 64
|
||||
static __always_inline unsigned long __arch_hweight64(__u64 w)
|
||||
{
|
||||
# ifdef CONFIG_RISCV_ISA_ZBB
|
||||
asm_volatile_goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
|
||||
RISCV_ISA_EXT_ZBB, 1)
|
||||
: : : : legacy);
|
||||
|
||||
asm (".option push\n"
|
||||
".option arch,+zbb\n"
|
||||
"cpop %0, %0\n"
|
||||
".option pop\n"
|
||||
: "+r" (w) : :);
|
||||
|
||||
return w;
|
||||
|
||||
legacy:
|
||||
# endif
|
||||
return __sw_hweight64(w);
|
||||
}
|
||||
#else /* BITS_PER_LONG == 64 */
|
||||
static inline unsigned long __arch_hweight64(__u64 w)
|
||||
{
|
||||
return __arch_hweight32((u32)w) +
|
||||
__arch_hweight32((u32)(w >> 32));
|
||||
}
|
||||
#endif /* !(BITS_PER_LONG == 64) */
|
||||
|
||||
#endif /* _ASM_RISCV_HWEIGHT_H */
|
||||
72
arch/riscv/include/asm/archrandom.h
Normal file
72
arch/riscv/include/asm/archrandom.h
Normal file
@ -0,0 +1,72 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Kernel interface for the RISCV arch_random_* functions
|
||||
*
|
||||
* Copyright (c) 2023 Rivos Inc.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef ASM_RISCV_ARCHRANDOM_H
|
||||
#define ASM_RISCV_ARCHRANDOM_H
|
||||
|
||||
#include <asm/csr.h>
|
||||
#include <asm/processor.h>
|
||||
|
||||
#define SEED_RETRY_LOOPS 100
|
||||
|
||||
static inline bool __must_check csr_seed_long(unsigned long *v)
|
||||
{
|
||||
unsigned int retry = SEED_RETRY_LOOPS, valid_seeds = 0;
|
||||
const int needed_seeds = sizeof(long) / sizeof(u16);
|
||||
u16 *entropy = (u16 *)v;
|
||||
|
||||
do {
|
||||
/*
|
||||
* The SEED CSR must be accessed with a read-write instruction.
|
||||
*/
|
||||
unsigned long csr_seed = csr_swap(CSR_SEED, 0);
|
||||
unsigned long opst = csr_seed & SEED_OPST_MASK;
|
||||
|
||||
switch (opst) {
|
||||
case SEED_OPST_ES16:
|
||||
entropy[valid_seeds++] = csr_seed & SEED_ENTROPY_MASK;
|
||||
if (valid_seeds == needed_seeds)
|
||||
return true;
|
||||
break;
|
||||
|
||||
case SEED_OPST_DEAD:
|
||||
pr_err_once("archrandom: Unrecoverable error\n");
|
||||
return false;
|
||||
|
||||
case SEED_OPST_BIST:
|
||||
case SEED_OPST_WAIT:
|
||||
default:
|
||||
cpu_relax();
|
||||
continue;
|
||||
}
|
||||
} while (--retry);
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
static inline size_t __must_check arch_get_random_longs(unsigned long *v, size_t max_longs)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline size_t __must_check arch_get_random_seed_longs(unsigned long *v, size_t max_longs)
|
||||
{
|
||||
if (!max_longs)
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* If Zkr is supported and csr_seed_long succeeds, we return one long
|
||||
* worth of entropy.
|
||||
*/
|
||||
if (riscv_has_extension_likely(RISCV_ISA_EXT_ZKR) && csr_seed_long(v))
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* ASM_RISCV_ARCHRANDOM_H */
|
||||
@ -6,6 +6,7 @@
|
||||
#define EX_TYPE_FIXUP 1
|
||||
#define EX_TYPE_BPF 2
|
||||
#define EX_TYPE_UACCESS_ERR_ZERO 3
|
||||
#define EX_TYPE_LOAD_UNALIGNED_ZEROPAD 4
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
|
||||
@ -47,6 +48,11 @@
|
||||
#define EX_DATA_REG_ZERO_SHIFT 5
|
||||
#define EX_DATA_REG_ZERO GENMASK(9, 5)
|
||||
|
||||
#define EX_DATA_REG_DATA_SHIFT 0
|
||||
#define EX_DATA_REG_DATA GENMASK(4, 0)
|
||||
#define EX_DATA_REG_ADDR_SHIFT 5
|
||||
#define EX_DATA_REG_ADDR GENMASK(9, 5)
|
||||
|
||||
#define EX_DATA_REG(reg, gpr) \
|
||||
"((.L__gpr_num_" #gpr ") << " __stringify(EX_DATA_REG_##reg##_SHIFT) ")"
|
||||
|
||||
@ -62,6 +68,15 @@
|
||||
#define _ASM_EXTABLE_UACCESS_ERR(insn, fixup, err) \
|
||||
_ASM_EXTABLE_UACCESS_ERR_ZERO(insn, fixup, err, zero)
|
||||
|
||||
#define _ASM_EXTABLE_LOAD_UNALIGNED_ZEROPAD(insn, fixup, data, addr) \
|
||||
__DEFINE_ASM_GPR_NUMS \
|
||||
__ASM_EXTABLE_RAW(#insn, #fixup, \
|
||||
__stringify(EX_TYPE_LOAD_UNALIGNED_ZEROPAD), \
|
||||
"(" \
|
||||
EX_DATA_REG(DATA, data) " | " \
|
||||
EX_DATA_REG(ADDR, addr) \
|
||||
")")
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#else /* CONFIG_MMU */
|
||||
|
||||
@ -9,6 +9,33 @@ long long __lshrti3(long long a, int b);
|
||||
long long __ashrti3(long long a, int b);
|
||||
long long __ashlti3(long long a, int b);
|
||||
|
||||
#ifdef CONFIG_RISCV_ISA_V
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
asmlinkage int enter_vector_usercopy(void *dst, void *src, size_t n);
|
||||
#endif /* CONFIG_MMU */
|
||||
|
||||
void xor_regs_2_(unsigned long bytes, unsigned long *__restrict p1,
|
||||
const unsigned long *__restrict p2);
|
||||
void xor_regs_3_(unsigned long bytes, unsigned long *__restrict p1,
|
||||
const unsigned long *__restrict p2,
|
||||
const unsigned long *__restrict p3);
|
||||
void xor_regs_4_(unsigned long bytes, unsigned long *__restrict p1,
|
||||
const unsigned long *__restrict p2,
|
||||
const unsigned long *__restrict p3,
|
||||
const unsigned long *__restrict p4);
|
||||
void xor_regs_5_(unsigned long bytes, unsigned long *__restrict p1,
|
||||
const unsigned long *__restrict p2,
|
||||
const unsigned long *__restrict p3,
|
||||
const unsigned long *__restrict p4,
|
||||
const unsigned long *__restrict p5);
|
||||
|
||||
#ifdef CONFIG_RISCV_ISA_V_PREEMPTIVE
|
||||
asmlinkage void riscv_v_context_nesting_start(struct pt_regs *regs);
|
||||
asmlinkage void riscv_v_context_nesting_end(struct pt_regs *regs);
|
||||
#endif /* CONFIG_RISCV_ISA_V_PREEMPTIVE */
|
||||
|
||||
#endif /* CONFIG_RISCV_ISA_V */
|
||||
|
||||
#define DECLARE_DO_ERROR_INFO(name) asmlinkage void name(struct pt_regs *regs)
|
||||
|
||||
|
||||
@ -271,7 +271,9 @@ legacy:
|
||||
#include <asm-generic/bitops/fls64.h>
|
||||
#include <asm-generic/bitops/sched.h>
|
||||
|
||||
#include <asm-generic/bitops/hweight.h>
|
||||
#include <asm/arch_hweight.h>
|
||||
|
||||
#include <asm-generic/bitops/const_hweight.h>
|
||||
|
||||
#if (BITS_PER_LONG == 64)
|
||||
#define __AMO(op) "amo" #op ".d"
|
||||
|
||||
93
arch/riscv/include/asm/checksum.h
Normal file
93
arch/riscv/include/asm/checksum.h
Normal file
@ -0,0 +1,93 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Checksum routines
|
||||
*
|
||||
* Copyright (C) 2023 Rivos Inc.
|
||||
*/
|
||||
#ifndef __ASM_RISCV_CHECKSUM_H
|
||||
#define __ASM_RISCV_CHECKSUM_H
|
||||
|
||||
#include <linux/in6.h>
|
||||
#include <linux/uaccess.h>
|
||||
|
||||
#define ip_fast_csum ip_fast_csum
|
||||
|
||||
extern unsigned int do_csum(const unsigned char *buff, int len);
|
||||
#define do_csum do_csum
|
||||
|
||||
/* Default version is sufficient for 32 bit */
|
||||
#ifndef CONFIG_32BIT
|
||||
#define _HAVE_ARCH_IPV6_CSUM
|
||||
__sum16 csum_ipv6_magic(const struct in6_addr *saddr,
|
||||
const struct in6_addr *daddr,
|
||||
__u32 len, __u8 proto, __wsum sum);
|
||||
#endif
|
||||
|
||||
/* Define riscv versions of functions before importing asm-generic/checksum.h */
|
||||
#include <asm-generic/checksum.h>
|
||||
|
||||
/**
|
||||
* Quickly compute an IP checksum with the assumption that IPv4 headers will
|
||||
* always be in multiples of 32-bits, and have an ihl of at least 5.
|
||||
*
|
||||
* @ihl: the number of 32 bit segments and must be greater than or equal to 5.
|
||||
* @iph: assumed to be word aligned given that NET_IP_ALIGN is set to 2 on
|
||||
* riscv, defining IP headers to be aligned.
|
||||
*/
|
||||
static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
|
||||
{
|
||||
unsigned long csum = 0;
|
||||
int pos = 0;
|
||||
|
||||
do {
|
||||
csum += ((const unsigned int *)iph)[pos];
|
||||
if (IS_ENABLED(CONFIG_32BIT))
|
||||
csum += csum < ((const unsigned int *)iph)[pos];
|
||||
} while (++pos < ihl);
|
||||
|
||||
/*
|
||||
* ZBB only saves three instructions on 32-bit and five on 64-bit so not
|
||||
* worth checking if supported without Alternatives.
|
||||
*/
|
||||
if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) &&
|
||||
IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) {
|
||||
unsigned long fold_temp;
|
||||
|
||||
asm_volatile_goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0,
|
||||
RISCV_ISA_EXT_ZBB, 1)
|
||||
:
|
||||
:
|
||||
:
|
||||
: no_zbb);
|
||||
|
||||
if (IS_ENABLED(CONFIG_32BIT)) {
|
||||
asm(".option push \n\
|
||||
.option arch,+zbb \n\
|
||||
not %[fold_temp], %[csum] \n\
|
||||
rori %[csum], %[csum], 16 \n\
|
||||
sub %[csum], %[fold_temp], %[csum] \n\
|
||||
.option pop"
|
||||
: [csum] "+r" (csum), [fold_temp] "=&r" (fold_temp));
|
||||
} else {
|
||||
asm(".option push \n\
|
||||
.option arch,+zbb \n\
|
||||
rori %[fold_temp], %[csum], 32 \n\
|
||||
add %[csum], %[fold_temp], %[csum] \n\
|
||||
srli %[csum], %[csum], 32 \n\
|
||||
not %[fold_temp], %[csum] \n\
|
||||
roriw %[csum], %[csum], 16 \n\
|
||||
subw %[csum], %[fold_temp], %[csum] \n\
|
||||
.option pop"
|
||||
: [csum] "+r" (csum), [fold_temp] "=&r" (fold_temp));
|
||||
}
|
||||
return (__force __sum16)(csum >> 16);
|
||||
}
|
||||
no_zbb:
|
||||
#ifndef CONFIG_32BIT
|
||||
csum += ror64(csum, 32);
|
||||
csum >>= 32;
|
||||
#endif
|
||||
return csum_fold((__force __wsum)csum);
|
||||
}
|
||||
|
||||
#endif /* __ASM_RISCV_CHECKSUM_H */
|
||||
@ -135,4 +135,6 @@ static __always_inline bool riscv_cpu_has_extension_unlikely(int cpu, const unsi
|
||||
return __riscv_isa_extension_available(hart_isa[cpu].isa, ext);
|
||||
}
|
||||
|
||||
DECLARE_STATIC_KEY_FALSE(fast_misaligned_access_speed_key);
|
||||
|
||||
#endif
|
||||
|
||||
@ -411,6 +411,15 @@
|
||||
#define CSR_VTYPE 0xc21
|
||||
#define CSR_VLENB 0xc22
|
||||
|
||||
/* Scalar Crypto Extension - Entropy */
|
||||
#define CSR_SEED 0x015
|
||||
#define SEED_OPST_MASK _AC(0xC0000000, UL)
|
||||
#define SEED_OPST_BIST _AC(0x00000000, UL)
|
||||
#define SEED_OPST_WAIT _AC(0x40000000, UL)
|
||||
#define SEED_OPST_ES16 _AC(0x80000000, UL)
|
||||
#define SEED_OPST_DEAD _AC(0xC0000000, UL)
|
||||
#define SEED_ENTROPY_MASK _AC(0xFFFF, UL)
|
||||
|
||||
#ifdef CONFIG_RISCV_M_MODE
|
||||
# define CSR_STATUS CSR_MSTATUS
|
||||
# define CSR_IE CSR_MIE
|
||||
|
||||
@ -4,6 +4,23 @@
|
||||
#define _ASM_RISCV_ENTRY_COMMON_H
|
||||
|
||||
#include <asm/stacktrace.h>
|
||||
#include <asm/thread_info.h>
|
||||
#include <asm/vector.h>
|
||||
|
||||
static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs,
|
||||
unsigned long ti_work)
|
||||
{
|
||||
if (ti_work & _TIF_RISCV_V_DEFER_RESTORE) {
|
||||
clear_thread_flag(TIF_RISCV_V_DEFER_RESTORE);
|
||||
/*
|
||||
* We are already called with irq disabled, so go without
|
||||
* keeping track of riscv_v_flags.
|
||||
*/
|
||||
riscv_v_vstate_restore(¤t->thread.vstate, regs);
|
||||
}
|
||||
}
|
||||
|
||||
#define arch_exit_to_user_mode_prepare arch_exit_to_user_mode_prepare
|
||||
|
||||
void handle_page_fault(struct pt_regs *regs);
|
||||
void handle_break(struct pt_regs *regs);
|
||||
|
||||
@ -24,9 +24,8 @@
|
||||
|
||||
#ifdef CONFIG_ERRATA_THEAD
|
||||
#define ERRATA_THEAD_PBMT 0
|
||||
#define ERRATA_THEAD_CMO 1
|
||||
#define ERRATA_THEAD_PMU 2
|
||||
#define ERRATA_THEAD_NUMBER 3
|
||||
#define ERRATA_THEAD_PMU 1
|
||||
#define ERRATA_THEAD_NUMBER 2
|
||||
#endif
|
||||
|
||||
#ifdef __ASSEMBLY__
|
||||
@ -94,54 +93,17 @@ asm volatile(ALTERNATIVE( \
|
||||
#define ALT_THEAD_PMA(_val)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* th.dcache.ipa rs1 (invalidate, physical address)
|
||||
* | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
|
||||
* 0000001 01010 rs1 000 00000 0001011
|
||||
* th.dache.iva rs1 (invalida, virtual address)
|
||||
* 0000001 00110 rs1 000 00000 0001011
|
||||
*
|
||||
* th.dcache.cpa rs1 (clean, physical address)
|
||||
* | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
|
||||
* 0000001 01001 rs1 000 00000 0001011
|
||||
* th.dcache.cva rs1 (clean, virtual address)
|
||||
* 0000001 00101 rs1 000 00000 0001011
|
||||
*
|
||||
* th.dcache.cipa rs1 (clean then invalidate, physical address)
|
||||
* | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
|
||||
* 0000001 01011 rs1 000 00000 0001011
|
||||
* th.dcache.civa rs1 (... virtual address)
|
||||
* 0000001 00111 rs1 000 00000 0001011
|
||||
*
|
||||
* th.sync.s (make sure all cache operations finished)
|
||||
* | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 |
|
||||
* 0000000 11001 00000 000 00000 0001011
|
||||
*/
|
||||
#define THEAD_INVAL_A0 ".long 0x0265000b"
|
||||
#define THEAD_CLEAN_A0 ".long 0x0255000b"
|
||||
#define THEAD_FLUSH_A0 ".long 0x0275000b"
|
||||
#define THEAD_SYNC_S ".long 0x0190000b"
|
||||
|
||||
#define ALT_CMO_OP(_op, _start, _size, _cachesize) \
|
||||
asm volatile(ALTERNATIVE_2( \
|
||||
__nops(6), \
|
||||
asm volatile(ALTERNATIVE( \
|
||||
__nops(5), \
|
||||
"mv a0, %1\n\t" \
|
||||
"j 2f\n\t" \
|
||||
"3:\n\t" \
|
||||
CBO_##_op(a0) \
|
||||
"add a0, a0, %0\n\t" \
|
||||
"2:\n\t" \
|
||||
"bltu a0, %2, 3b\n\t" \
|
||||
"nop", 0, RISCV_ISA_EXT_ZICBOM, CONFIG_RISCV_ISA_ZICBOM, \
|
||||
"mv a0, %1\n\t" \
|
||||
"j 2f\n\t" \
|
||||
"3:\n\t" \
|
||||
THEAD_##_op##_A0 "\n\t" \
|
||||
"add a0, a0, %0\n\t" \
|
||||
"2:\n\t" \
|
||||
"bltu a0, %2, 3b\n\t" \
|
||||
THEAD_SYNC_S, THEAD_VENDOR_ID, \
|
||||
ERRATA_THEAD_CMO, CONFIG_ERRATA_THEAD_CMO) \
|
||||
"bltu a0, %2, 3b\n\t", \
|
||||
0, RISCV_ISA_EXT_ZICBOM, CONFIG_RISCV_ISA_ZICBOM) \
|
||||
: : "r"(_cachesize), \
|
||||
"r"((unsigned long)(_start) & ~((_cachesize) - 1UL)), \
|
||||
"r"((unsigned long)(_start) + (_size)) \
|
||||
|
||||
@ -128,7 +128,23 @@ do { \
|
||||
struct dyn_ftrace;
|
||||
int ftrace_init_nop(struct module *mod, struct dyn_ftrace *rec);
|
||||
#define ftrace_init_nop ftrace_init_nop
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DYNAMIC_FTRACE_WITH_REGS
|
||||
struct ftrace_ops;
|
||||
struct ftrace_regs;
|
||||
void ftrace_graph_func(unsigned long ip, unsigned long parent_ip,
|
||||
struct ftrace_ops *op, struct ftrace_regs *fregs);
|
||||
#define ftrace_graph_func ftrace_graph_func
|
||||
|
||||
static inline void __arch_ftrace_set_direct_caller(struct pt_regs *regs, unsigned long addr)
|
||||
{
|
||||
regs->t1 = addr;
|
||||
}
|
||||
#define arch_ftrace_set_direct_caller(fregs, addr) \
|
||||
__arch_ftrace_set_direct_caller(&(fregs)->regs, addr)
|
||||
#endif /* CONFIG_DYNAMIC_FTRACE_WITH_REGS */
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* CONFIG_DYNAMIC_FTRACE */
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user