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[PATCH] KVM: Replace __x86_64__ with CONFIG_X86_64
As per akpm's request. Signed-off-by: Avi Kivity <avi@qumranet.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
parent
5aff458e9c
commit
05b3e0c2c7
@ -140,7 +140,7 @@ enum {
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VCPU_REGS_RBP = 5,
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VCPU_REGS_RSI = 6,
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VCPU_REGS_RDI = 7,
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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VCPU_REGS_R8 = 8,
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VCPU_REGS_R9 = 9,
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VCPU_REGS_R10 = 10,
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@ -375,7 +375,7 @@ void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
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void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
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void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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void set_efer(struct kvm_vcpu *vcpu, u64 efer);
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#endif
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@ -485,7 +485,7 @@ static inline unsigned long read_tr_base(void)
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return segment_base(tr);
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}
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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static inline unsigned long read_msr(unsigned long msr)
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{
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u64 value;
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@ -533,7 +533,7 @@ static inline u32 get_rdx_init_val(void)
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#define TSS_REDIRECTION_SIZE (256 / 8)
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#define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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/*
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* When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. Therefore
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@ -83,7 +83,7 @@ struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
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}
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EXPORT_SYMBOL_GPL(find_msr_entry);
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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// LDT or TSS descriptor in the GDT. 16 bytes.
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struct segment_descriptor_64 {
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struct segment_descriptor s;
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@ -115,7 +115,7 @@ unsigned long segment_base(u16 selector)
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}
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d = (struct segment_descriptor *)(table_base + (selector & ~7));
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v = d->base_low | ((ul)d->base_mid << 16) | ((ul)d->base_high << 24);
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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if (d->system == 0
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&& (d->type == 2 || d->type == 9 || d->type == 11))
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v |= ((ul)((struct segment_descriptor_64 *)d)->base_higher) << 32;
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@ -351,7 +351,7 @@ void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
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}
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if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK)) {
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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if ((vcpu->shadow_efer & EFER_LME)) {
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int cs_db, cs_l;
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@ -1120,7 +1120,7 @@ static int get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
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return kvm_arch_ops->get_msr(vcpu, msr_index, pdata);
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}
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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void set_efer(struct kvm_vcpu *vcpu, u64 efer)
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{
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@ -1243,7 +1243,7 @@ static int kvm_dev_ioctl_get_regs(struct kvm *kvm, struct kvm_regs *regs)
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regs->rdi = vcpu->regs[VCPU_REGS_RDI];
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regs->rsp = vcpu->regs[VCPU_REGS_RSP];
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regs->rbp = vcpu->regs[VCPU_REGS_RBP];
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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regs->r8 = vcpu->regs[VCPU_REGS_R8];
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regs->r9 = vcpu->regs[VCPU_REGS_R9];
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regs->r10 = vcpu->regs[VCPU_REGS_R10];
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@ -1287,7 +1287,7 @@ static int kvm_dev_ioctl_set_regs(struct kvm *kvm, struct kvm_regs *regs)
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vcpu->regs[VCPU_REGS_RDI] = regs->rdi;
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vcpu->regs[VCPU_REGS_RSP] = regs->rsp;
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vcpu->regs[VCPU_REGS_RBP] = regs->rbp;
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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vcpu->regs[VCPU_REGS_R8] = regs->r8;
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vcpu->regs[VCPU_REGS_R9] = regs->r9;
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vcpu->regs[VCPU_REGS_R10] = regs->r10;
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@ -1401,7 +1401,7 @@ static int kvm_dev_ioctl_set_sregs(struct kvm *kvm, struct kvm_sregs *sregs)
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vcpu->cr8 = sregs->cr8;
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mmu_reset_needed |= vcpu->shadow_efer != sregs->efer;
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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kvm_arch_ops->set_efer(vcpu, sregs->efer);
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#endif
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vcpu->apic_base = sregs->apic_base;
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@ -1434,7 +1434,7 @@ static int kvm_dev_ioctl_set_sregs(struct kvm *kvm, struct kvm_sregs *sregs)
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static u32 msrs_to_save[] = {
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MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
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MSR_K6_STAR,
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
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#endif
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MSR_IA32_TIME_STAMP_COUNTER,
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@ -9,7 +9,7 @@
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#include "kvm.h"
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static const u32 host_save_msrs[] = {
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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MSR_STAR, MSR_LSTAR, MSR_CSTAR, MSR_SYSCALL_MASK, MSR_KERNEL_GS_BASE,
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MSR_FS_BASE, MSR_GS_BASE,
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#endif
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@ -1,7 +1,7 @@
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#ifndef __KVM_VMX_H
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#define __KVM_VMX_H
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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/*
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* avoid save/load MSR_SYSCALL_MASK and MSR_LSTAR by std vt
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* mechanism (cpu bug AA24)
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@ -287,7 +287,7 @@ static void svm_hardware_enable(void *garbage)
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struct svm_cpu_data *svm_data;
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uint64_t efer;
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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struct desc_ptr gdt_descr;
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#else
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struct Xgt_desc_struct gdt_descr;
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@ -397,7 +397,7 @@ static __init int svm_hardware_setup(void)
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memset(msrpm_va, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));
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msrpm_base = page_to_pfn(msrpm_pages) << PAGE_SHIFT;
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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set_msr_interception(msrpm_va, MSR_GS_BASE, 1, 1);
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set_msr_interception(msrpm_va, MSR_FS_BASE, 1, 1);
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set_msr_interception(msrpm_va, MSR_KERNEL_GS_BASE, 1, 1);
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@ -704,7 +704,7 @@ static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
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static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
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{
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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if (vcpu->shadow_efer & KVM_EFER_LME) {
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if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK)) {
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vcpu->shadow_efer |= KVM_EFER_LMA;
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@ -1097,7 +1097,7 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
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case MSR_IA32_APICBASE:
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*data = vcpu->apic_base;
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break;
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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case MSR_STAR:
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*data = vcpu->svm->vmcb->save.star;
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break;
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@ -1149,7 +1149,7 @@ static int rdmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
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static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
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{
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switch (ecx) {
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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case MSR_EFER:
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set_efer(vcpu, data);
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break;
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@ -1172,7 +1172,7 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
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case MSR_IA32_APICBASE:
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vcpu->apic_base = data;
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break;
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#ifdef __x86_64___
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#ifdef CONFIG_X86_64_
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case MSR_STAR:
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vcpu->svm->vmcb->save.star = data;
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break;
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@ -1387,7 +1387,7 @@ again:
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load_db_regs(vcpu->svm->db_regs);
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}
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asm volatile (
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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"push %%rbx; push %%rcx; push %%rdx;"
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"push %%rsi; push %%rdi; push %%rbp;"
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"push %%r8; push %%r9; push %%r10; push %%r11;"
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@ -1397,7 +1397,7 @@ again:
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"push %%esi; push %%edi; push %%ebp;"
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#endif
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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"mov %c[rbx](%[vcpu]), %%rbx \n\t"
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"mov %c[rcx](%[vcpu]), %%rcx \n\t"
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"mov %c[rdx](%[vcpu]), %%rdx \n\t"
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@ -1421,7 +1421,7 @@ again:
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"mov %c[rbp](%[vcpu]), %%ebp \n\t"
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#endif
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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/* Enter guest mode */
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"push %%rax \n\t"
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"mov %c[svm](%[vcpu]), %%rax \n\t"
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@ -1442,7 +1442,7 @@ again:
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#endif
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/* Save guest registers, load host registers */
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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"mov %%rbx, %c[rbx](%[vcpu]) \n\t"
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"mov %%rcx, %c[rcx](%[vcpu]) \n\t"
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"mov %%rdx, %c[rdx](%[vcpu]) \n\t"
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@ -1483,7 +1483,7 @@ again:
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[rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
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[rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
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[rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP]))
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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,[r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
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[r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
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[r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
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@ -34,7 +34,7 @@ MODULE_LICENSE("GPL");
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static DEFINE_PER_CPU(struct vmcs *, vmxarea);
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static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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#define HOST_IS_64 1
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#else
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#define HOST_IS_64 0
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@ -71,7 +71,7 @@ static struct kvm_vmx_segment_field {
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};
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static const u32 vmx_msr_index[] = {
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
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#endif
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MSR_EFER, MSR_K6_STAR,
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@ -138,7 +138,7 @@ static u32 vmcs_read32(unsigned long field)
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static u64 vmcs_read64(unsigned long field)
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{
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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return vmcs_readl(field);
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#else
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return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
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@ -168,7 +168,7 @@ static void vmcs_write32(unsigned long field, u32 value)
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static void vmcs_write64(unsigned long field, u64 value)
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{
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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vmcs_writel(field, value);
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#else
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vmcs_writel(field, value);
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@ -297,7 +297,7 @@ static void guest_write_tsc(u64 guest_tsc)
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static void reload_tss(void)
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{
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#ifndef __x86_64__
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#ifndef CONFIG_X86_64
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/*
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* VT restores TR but not its size. Useless.
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@ -328,7 +328,7 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
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}
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switch (msr_index) {
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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case MSR_FS_BASE:
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data = vmcs_readl(GUEST_FS_BASE);
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break;
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@ -391,7 +391,7 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
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{
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struct vmx_msr_entry *msr;
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switch (msr_index) {
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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case MSR_FS_BASE:
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vmcs_writel(GUEST_FS_BASE, data);
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break;
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@ -726,7 +726,7 @@ static void enter_rmode(struct kvm_vcpu *vcpu)
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fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
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}
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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static void enter_lmode(struct kvm_vcpu *vcpu)
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{
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@ -768,7 +768,7 @@ static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
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if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
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enter_rmode(vcpu);
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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if (vcpu->shadow_efer & EFER_LME) {
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if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
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enter_lmode(vcpu);
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@ -809,7 +809,7 @@ static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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vcpu->cr4 = cr4;
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}
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
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{
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@ -1096,7 +1096,7 @@ static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
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vmcs_write16(HOST_FS_SELECTOR, read_fs()); /* 22.2.4 */
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vmcs_write16(HOST_GS_SELECTOR, read_gs()); /* 22.2.4 */
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vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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rdmsrl(MSR_FS_BASE, a);
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vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
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rdmsrl(MSR_GS_BASE, a);
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@ -1174,7 +1174,7 @@ static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
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vcpu->cr0 = 0x60000010;
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vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
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vmx_set_cr4(vcpu, 0);
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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vmx_set_efer(vcpu, 0);
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#endif
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@ -1690,7 +1690,7 @@ again:
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vmcs_write16(HOST_GS_SELECTOR, 0);
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}
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
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vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
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#else
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@ -1714,7 +1714,7 @@ again:
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asm (
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/* Store host registers */
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"pushf \n\t"
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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"push %%rax; push %%rbx; push %%rdx;"
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"push %%rsi; push %%rdi; push %%rbp;"
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"push %%r8; push %%r9; push %%r10; push %%r11;"
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@ -1728,7 +1728,7 @@ again:
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/* Check if vmlaunch of vmresume is needed */
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"cmp $0, %1 \n\t"
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/* Load guest registers. Don't clobber flags. */
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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"mov %c[cr2](%3), %%rax \n\t"
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"mov %%rax, %%cr2 \n\t"
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"mov %c[rax](%3), %%rax \n\t"
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@ -1765,7 +1765,7 @@ again:
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".globl kvm_vmx_return \n\t"
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"kvm_vmx_return: "
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/* Save guest registers, load host registers, keep flags */
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#ifdef __x86_64__
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#ifdef CONFIG_X86_64
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"xchg %3, 0(%%rsp) \n\t"
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"mov %%rax, %c[rax](%3) \n\t"
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"mov %%rbx, %c[rbx](%3) \n\t"
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@ -1817,7 +1817,7 @@ again:
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[rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
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[rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
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[rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
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#ifdef __x86_64__
|
||||
#ifdef CONFIG_X86_64
|
||||
[r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
|
||||
[r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
|
||||
[r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
|
||||
@ -1838,7 +1838,7 @@ again:
|
||||
fx_save(vcpu->guest_fx_image);
|
||||
fx_restore(vcpu->host_fx_image);
|
||||
|
||||
#ifndef __x86_64__
|
||||
#ifndef CONFIG_X86_64
|
||||
asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
|
||||
#endif
|
||||
|
||||
@ -1856,7 +1856,7 @@ again:
|
||||
*/
|
||||
local_irq_disable();
|
||||
load_gs(gs_sel);
|
||||
#ifdef __x86_64__
|
||||
#ifdef CONFIG_X86_64
|
||||
wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
|
||||
#endif
|
||||
local_irq_enable();
|
||||
@ -1966,7 +1966,7 @@ static struct kvm_arch_ops vmx_arch_ops = {
|
||||
.set_cr0_no_modeswitch = vmx_set_cr0_no_modeswitch,
|
||||
.set_cr3 = vmx_set_cr3,
|
||||
.set_cr4 = vmx_set_cr4,
|
||||
#ifdef __x86_64__
|
||||
#ifdef CONFIG_X86_64
|
||||
.set_efer = vmx_set_efer,
|
||||
#endif
|
||||
.get_idt = vmx_get_idt,
|
||||
|
@ -238,7 +238,7 @@ struct operand {
|
||||
* any modified flags.
|
||||
*/
|
||||
|
||||
#if defined(__x86_64__)
|
||||
#if defined(CONFIG_X86_64)
|
||||
#define _LO32 "k" /* force 32-bit operand */
|
||||
#define _STK "%%rsp" /* stack pointer */
|
||||
#elif defined(__i386__)
|
||||
@ -385,7 +385,7 @@ struct operand {
|
||||
} while (0)
|
||||
|
||||
/* Emulate an instruction with quadword operands (x86/64 only). */
|
||||
#if defined(__x86_64__)
|
||||
#if defined(CONFIG_X86_64)
|
||||
#define __emulate_2op_8byte(_op, _src, _dst, _eflags, _qx, _qy) \
|
||||
do { \
|
||||
__asm__ __volatile__ ( \
|
||||
@ -495,7 +495,7 @@ x86_emulate_memop(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
|
||||
case X86EMUL_MODE_PROT32:
|
||||
op_bytes = ad_bytes = 4;
|
||||
break;
|
||||
#ifdef __x86_64__
|
||||
#ifdef CONFIG_X86_64
|
||||
case X86EMUL_MODE_PROT64:
|
||||
op_bytes = 4;
|
||||
ad_bytes = 8;
|
||||
@ -1341,7 +1341,7 @@ twobyte_special_insn:
|
||||
}
|
||||
break;
|
||||
}
|
||||
#elif defined(__x86_64__)
|
||||
#elif defined(CONFIG_X86_64)
|
||||
{
|
||||
unsigned long old, new;
|
||||
if ((rc = ops->read_emulated(cr2, &old, 8, ctxt)) != 0)
|
||||
|
@ -162,7 +162,7 @@ struct x86_emulate_ctxt {
|
||||
/* Host execution mode. */
|
||||
#if defined(__i386__)
|
||||
#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
|
||||
#elif defined(__x86_64__)
|
||||
#elif defined(CONFIG_X86_64)
|
||||
#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
|
||||
#endif
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user