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[SCSI] lpfc 8.3.24: Miscellaneous Fixes and Corrections
Miscellaneous Fixes and Corrections - Remove the memset in the lpfc_sli4_remove_rpi_hdrs call. - Correct swapping of SGE word 2 relative to offset value - Reorganize CQ and EQ usage to comply with SLI4 Specification. - Expand the driver to check the rn bit. Only detect an error if the error bit is set and the RN bit is NOT set. - If mailbox completion code is not success AND the mailbox status is success, then and only then will the driver overwrite the mailbox status. - When driver initializing device, if the device is on a PCIe bus, set PCI's "needs fundamental reset" bit so that EEH uses fundamental reset instead of hot reset for recovery. - Prevent driver from using new WWN when changed in firmware (until driver reload) - When HBA reports maximum SGE size > 0xffffffff (infinite), override with 0x80000000. - Fixed potential missed SLI4 device initialization failure conditions. - Added 100ms delay before driver action following IF_TYPE_2 function reset. - Reverted patch to UNREG/REG on PLOGI to mapped/unmapped node. - Add a check for the CVL received flag in the fcf inuse routine to avoid unregistering the fcf if Devloss fires before Delay discover timer fires. Signed-off-by: Alex Iannicelli <alex.iannicelli@emulex.com> Signed-off-by: James Smart <james.smart@emulex.com> Signed-off-by: James Bottomley <jbottomley@parallels.com>
This commit is contained in:
James Smart
James Bottomley
parent
1ca1e43e55
commit
0558056c1e
@ -41,6 +41,7 @@ struct lpfc_sli2_slim;
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downloads using bsg */
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#define LPFC_DEFAULT_PROT_SG_SEG_CNT 4096 /* sg protection elements count */
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#define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */
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#define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */
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#define LPFC_MAX_PROT_SG_SEG_CNT 4096 /* prot sg element count per scsi cmd*/
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#define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
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#define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */
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@ -171,6 +171,7 @@ void lpfc_delayed_disc_tmo(unsigned long);
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void lpfc_delayed_disc_timeout_handler(struct lpfc_vport *);
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int lpfc_config_port_prep(struct lpfc_hba *);
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void lpfc_update_vport_wwn(struct lpfc_vport *vport);
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int lpfc_config_port_post(struct lpfc_hba *);
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int lpfc_hba_down_prep(struct lpfc_hba *);
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int lpfc_hba_down_post(struct lpfc_hba *);
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@ -1665,7 +1665,8 @@ lpfc_idiag_queinfo_read(struct file *file, char __user *buf, size_t nbytes,
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/* Get fast-path complete queue information */
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len += snprintf(pbuffer+len, LPFC_QUE_INFO_GET_BUF_SIZE-len,
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"Fast-path FCP CQ information:\n");
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for (fcp_qidx = 0; fcp_qidx < phba->cfg_fcp_eq_count; fcp_qidx++) {
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fcp_qidx = 0;
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do {
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len += snprintf(pbuffer+len, LPFC_QUE_INFO_GET_BUF_SIZE-len,
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"Associated EQID[%02d]:\n",
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phba->sli4_hba.fcp_cq[fcp_qidx]->assoc_qid);
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@ -1678,7 +1679,7 @@ lpfc_idiag_queinfo_read(struct file *file, char __user *buf, size_t nbytes,
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phba->sli4_hba.fcp_cq[fcp_qidx]->entry_size,
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phba->sli4_hba.fcp_cq[fcp_qidx]->host_index,
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phba->sli4_hba.fcp_cq[fcp_qidx]->hba_index);
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}
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} while (++fcp_qidx < phba->cfg_fcp_eq_count);
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len += snprintf(pbuffer+len, LPFC_QUE_INFO_GET_BUF_SIZE-len, "\n");
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/* Get mailbox queue information */
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@ -2012,7 +2013,8 @@ lpfc_idiag_queacc_write(struct file *file, const char __user *buf,
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goto pass_check;
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}
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/* FCP complete queue */
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for (qidx = 0; qidx < phba->cfg_fcp_eq_count; qidx++) {
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qidx = 0;
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do {
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if (phba->sli4_hba.fcp_cq[qidx]->queue_id == queid) {
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/* Sanity check */
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rc = lpfc_idiag_que_param_check(
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@ -2024,7 +2026,7 @@ lpfc_idiag_queacc_write(struct file *file, const char __user *buf,
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phba->sli4_hba.fcp_cq[qidx];
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goto pass_check;
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}
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}
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} while (++qidx < phba->cfg_fcp_eq_count);
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goto error_out;
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break;
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case LPFC_IDIAG_MQ:
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@ -2690,16 +2690,7 @@ lpfc_mbx_cmpl_read_sparam(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
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memcpy((uint8_t *) &vport->fc_sparam, (uint8_t *) mp->virt,
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sizeof (struct serv_parm));
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if (phba->cfg_soft_wwnn)
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u64_to_wwn(phba->cfg_soft_wwnn,
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vport->fc_sparam.nodeName.u.wwn);
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if (phba->cfg_soft_wwpn)
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u64_to_wwn(phba->cfg_soft_wwpn,
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vport->fc_sparam.portName.u.wwn);
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memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
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sizeof(vport->fc_nodename));
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memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
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sizeof(vport->fc_portname));
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lpfc_update_vport_wwn(vport);
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if (vport->port_type == LPFC_PHYSICAL_PORT) {
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memcpy(&phba->wwnn, &vport->fc_nodename, sizeof(phba->wwnn));
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memcpy(&phba->wwpn, &vport->fc_portname, sizeof(phba->wwnn));
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@ -5354,6 +5345,17 @@ lpfc_fcf_inuse(struct lpfc_hba *phba)
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for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
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shost = lpfc_shost_from_vport(vports[i]);
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spin_lock_irq(shost->host_lock);
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/*
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* IF the CVL_RCVD bit is not set then we have sent the
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* flogi.
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* If dev_loss fires while we are waiting we do not want to
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* unreg the fcf.
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*/
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if (!(vports[i]->fc_flag & FC_VPORT_CVL_RCVD)) {
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spin_unlock_irq(shost->host_lock);
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ret = 1;
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goto out;
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}
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list_for_each_entry(ndlp, &vports[i]->fc_nodes, nlp_listp) {
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if (NLP_CHK_NODE_ACT(ndlp) && ndlp->rport &&
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(ndlp->rport->roles & FC_RPORT_ROLE_FCP_TARGET)) {
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@ -1229,7 +1229,7 @@ struct sli4_sge { /* SLI-4 */
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uint32_t word2;
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#define lpfc_sli4_sge_offset_SHIFT 0 /* Offset of buffer - Not used*/
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#define lpfc_sli4_sge_offset_MASK 0x00FFFFFF
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#define lpfc_sli4_sge_offset_MASK 0x1FFFFFFF
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#define lpfc_sli4_sge_offset_WORD word2
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#define lpfc_sli4_sge_last_SHIFT 31 /* Last SEG in the SGL sets
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this flag !! */
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@ -308,6 +308,45 @@ lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
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return;
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}
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/**
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* lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
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* cfg_soft_wwnn, cfg_soft_wwpn
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* @vport: pointer to lpfc vport data structure.
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*
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*
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* Return codes
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* None.
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**/
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void
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lpfc_update_vport_wwn(struct lpfc_vport *vport)
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{
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/* If the soft name exists then update it using the service params */
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if (vport->phba->cfg_soft_wwnn)
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u64_to_wwn(vport->phba->cfg_soft_wwnn,
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vport->fc_sparam.nodeName.u.wwn);
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if (vport->phba->cfg_soft_wwpn)
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u64_to_wwn(vport->phba->cfg_soft_wwpn,
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vport->fc_sparam.portName.u.wwn);
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/*
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* If the name is empty or there exists a soft name
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* then copy the service params name, otherwise use the fc name
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*/
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if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
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memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
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sizeof(struct lpfc_name));
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else
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memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
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sizeof(struct lpfc_name));
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if (vport->fc_portname.u.wwn[0] == 0 || vport->phba->cfg_soft_wwpn)
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memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
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sizeof(struct lpfc_name));
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else
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memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
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sizeof(struct lpfc_name));
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}
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/**
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* lpfc_config_port_post - Perform lpfc initialization after config port
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* @phba: pointer to lpfc hba data structure.
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@ -377,17 +416,7 @@ lpfc_config_port_post(struct lpfc_hba *phba)
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lpfc_mbuf_free(phba, mp->virt, mp->phys);
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kfree(mp);
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pmb->context1 = NULL;
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if (phba->cfg_soft_wwnn)
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u64_to_wwn(phba->cfg_soft_wwnn,
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vport->fc_sparam.nodeName.u.wwn);
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if (phba->cfg_soft_wwpn)
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u64_to_wwn(phba->cfg_soft_wwpn,
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vport->fc_sparam.portName.u.wwn);
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memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
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sizeof (struct lpfc_name));
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memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
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sizeof (struct lpfc_name));
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lpfc_update_vport_wwn(vport);
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/* Update the fc_host data structures with new wwn. */
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fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
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@ -3935,6 +3964,10 @@ lpfc_enable_pci_dev(struct lpfc_hba *phba)
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pci_try_set_mwi(pdev);
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pci_save_state(pdev);
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/* PCIe EEH recovery on powerpc platforms needs fundamental reset */
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if (pci_find_capability(pdev, PCI_CAP_ID_EXP))
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pdev->needs_freset = 1;
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return 0;
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out_disable_device:
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@ -4366,6 +4399,7 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
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lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
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"2759 Failed allocate memory for FCF round "
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"robin failover bmask\n");
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rc = -ENOMEM;
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goto out_remove_rpi_hdrs;
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}
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@ -4375,6 +4409,7 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
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lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
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"2572 Failed allocate memory for fast-path "
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"per-EQ handle array\n");
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rc = -ENOMEM;
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goto out_free_fcf_rr_bmask;
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}
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@ -4384,6 +4419,7 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
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lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
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"2573 Failed allocate memory for msi-x "
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"interrupt vector entries\n");
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rc = -ENOMEM;
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goto out_free_fcp_eq_hdl;
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}
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@ -4998,9 +5034,7 @@ lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
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kfree(rpi_hdr->dmabuf);
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kfree(rpi_hdr);
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}
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phba->sli4_hba.next_rpi = phba->sli4_hba.max_cfg_param.rpi_base;
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memset(phba->sli4_hba.rpi_bmask, 0, sizeof(*phba->sli4_hba.rpi_bmask));
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}
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/**
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@ -5487,7 +5521,8 @@ lpfc_sli4_post_status_check(struct lpfc_hba *phba)
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/* Final checks. The port status should be clean. */
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if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
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®_data.word0) ||
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bf_get(lpfc_sliport_status_err, ®_data)) {
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(bf_get(lpfc_sliport_status_err, ®_data) &&
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!bf_get(lpfc_sliport_status_rn, ®_data))) {
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phba->work_status[0] =
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readl(phba->sli4_hba.u.if_type2.
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ERR1regaddr);
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@ -6229,8 +6264,10 @@ lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
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phba->sli4_hba.mbx_cq = NULL;
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/* Release FCP response complete queue */
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for (fcp_qidx = 0; fcp_qidx < phba->cfg_fcp_eq_count; fcp_qidx++)
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fcp_qidx = 0;
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do
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lpfc_sli4_queue_free(phba->sli4_hba.fcp_cq[fcp_qidx]);
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while (++fcp_qidx < phba->cfg_fcp_eq_count);
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kfree(phba->sli4_hba.fcp_cq);
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phba->sli4_hba.fcp_cq = NULL;
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@ -6353,16 +6390,24 @@ lpfc_sli4_queue_setup(struct lpfc_hba *phba)
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phba->sli4_hba.sp_eq->queue_id);
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/* Set up fast-path FCP Response Complete Queue */
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for (fcp_cqidx = 0; fcp_cqidx < phba->cfg_fcp_eq_count; fcp_cqidx++) {
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fcp_cqidx = 0;
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do {
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if (!phba->sli4_hba.fcp_cq[fcp_cqidx]) {
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lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
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"0526 Fast-path FCP CQ (%d) not "
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"allocated\n", fcp_cqidx);
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goto out_destroy_fcp_cq;
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}
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rc = lpfc_cq_create(phba, phba->sli4_hba.fcp_cq[fcp_cqidx],
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phba->sli4_hba.fp_eq[fcp_cqidx],
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LPFC_WCQ, LPFC_FCP);
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if (phba->cfg_fcp_eq_count)
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rc = lpfc_cq_create(phba,
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phba->sli4_hba.fcp_cq[fcp_cqidx],
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phba->sli4_hba.fp_eq[fcp_cqidx],
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LPFC_WCQ, LPFC_FCP);
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else
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rc = lpfc_cq_create(phba,
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phba->sli4_hba.fcp_cq[fcp_cqidx],
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phba->sli4_hba.sp_eq,
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LPFC_WCQ, LPFC_FCP);
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if (rc) {
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lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
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"0527 Failed setup of fast-path FCP "
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@ -6371,12 +6416,15 @@ lpfc_sli4_queue_setup(struct lpfc_hba *phba)
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}
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lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
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"2588 FCP CQ setup: cq[%d]-id=%d, "
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"parent eq[%d]-id=%d\n",
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"parent %seq[%d]-id=%d\n",
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fcp_cqidx,
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phba->sli4_hba.fcp_cq[fcp_cqidx]->queue_id,
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(phba->cfg_fcp_eq_count) ? "" : "sp_",
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fcp_cqidx,
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phba->sli4_hba.fp_eq[fcp_cqidx]->queue_id);
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}
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(phba->cfg_fcp_eq_count) ?
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phba->sli4_hba.fp_eq[fcp_cqidx]->queue_id :
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phba->sli4_hba.sp_eq->queue_id);
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} while (++fcp_cqidx < phba->cfg_fcp_eq_count);
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/*
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* Set up all the Work Queues (WQs)
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@ -6445,7 +6493,9 @@ lpfc_sli4_queue_setup(struct lpfc_hba *phba)
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fcp_cq_index,
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phba->sli4_hba.fcp_cq[fcp_cq_index]->queue_id);
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/* Round robin FCP Work Queue's Completion Queue assignment */
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fcp_cq_index = ((fcp_cq_index + 1) % phba->cfg_fcp_eq_count);
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if (phba->cfg_fcp_eq_count)
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fcp_cq_index = ((fcp_cq_index + 1) %
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phba->cfg_fcp_eq_count);
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}
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/*
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@ -6827,6 +6877,8 @@ lpfc_pci_function_reset(struct lpfc_hba *phba)
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if (rdy_chk < 1000)
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break;
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}
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/* delay driver action following IF_TYPE_2 function reset */
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msleep(100);
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break;
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case LPFC_SLI_INTF_IF_TYPE_1:
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default:
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@ -7419,11 +7471,15 @@ enable_msix_vectors:
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/*
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* Assign MSI-X vectors to interrupt handlers
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*/
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/* The first vector must associated to slow-path handler for MQ */
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rc = request_irq(phba->sli4_hba.msix_entries[0].vector,
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&lpfc_sli4_sp_intr_handler, IRQF_SHARED,
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LPFC_SP_DRIVER_HANDLER_NAME, phba);
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if (vectors > 1)
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rc = request_irq(phba->sli4_hba.msix_entries[0].vector,
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&lpfc_sli4_sp_intr_handler, IRQF_SHARED,
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LPFC_SP_DRIVER_HANDLER_NAME, phba);
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else
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/* All Interrupts need to be handled by one EQ */
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rc = request_irq(phba->sli4_hba.msix_entries[0].vector,
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&lpfc_sli4_intr_handler, IRQF_SHARED,
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LPFC_DRIVER_NAME, phba);
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if (rc) {
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lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
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"0485 MSI-X slow-path request_irq failed "
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@ -7878,6 +7934,11 @@ lpfc_pc_sli4_params_get(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
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sli4_params->hdr_pp_align = bf_get(hdr_pp_align, &mqe->un.sli4_params);
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sli4_params->sgl_pages_max = bf_get(sgl_pages, &mqe->un.sli4_params);
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sli4_params->sgl_pp_align = bf_get(sgl_pp_align, &mqe->un.sli4_params);
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/* Make sure that sge_supp_len can be handled by the driver */
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if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
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||||
sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
@ -7938,6 +7999,11 @@ lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
|
||||
mbx_sli4_parameters);
|
||||
sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
|
||||
mbx_sli4_parameters);
|
||||
|
||||
/* Make sure that sge_supp_len can be handled by the driver */
|
||||
if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
|
||||
sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -8591,6 +8657,8 @@ lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
|
||||
int error;
|
||||
uint32_t cfg_mode, intr_mode;
|
||||
int mcnt;
|
||||
int adjusted_fcp_eq_count;
|
||||
int fcp_qidx;
|
||||
|
||||
/* Allocate memory for HBA structure */
|
||||
phba = lpfc_hba_alloc(pdev);
|
||||
@ -8688,11 +8756,25 @@ lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
|
||||
error = -ENODEV;
|
||||
goto out_free_sysfs_attr;
|
||||
}
|
||||
/* Default to single FCP EQ for non-MSI-X */
|
||||
/* Default to single EQ for non-MSI-X */
|
||||
if (phba->intr_type != MSIX)
|
||||
phba->cfg_fcp_eq_count = 1;
|
||||
else if (phba->sli4_hba.msix_vec_nr < phba->cfg_fcp_eq_count)
|
||||
phba->cfg_fcp_eq_count = phba->sli4_hba.msix_vec_nr - 1;
|
||||
adjusted_fcp_eq_count = 0;
|
||||
else if (phba->sli4_hba.msix_vec_nr <
|
||||
phba->cfg_fcp_eq_count + 1)
|
||||
adjusted_fcp_eq_count = phba->sli4_hba.msix_vec_nr - 1;
|
||||
else
|
||||
adjusted_fcp_eq_count = phba->cfg_fcp_eq_count;
|
||||
/* Free unused EQs */
|
||||
for (fcp_qidx = adjusted_fcp_eq_count;
|
||||
fcp_qidx < phba->cfg_fcp_eq_count;
|
||||
fcp_qidx++) {
|
||||
lpfc_sli4_queue_free(phba->sli4_hba.fp_eq[fcp_qidx]);
|
||||
/* do not delete the first fcp_cq */
|
||||
if (fcp_qidx)
|
||||
lpfc_sli4_queue_free(
|
||||
phba->sli4_hba.fcp_cq[fcp_qidx]);
|
||||
}
|
||||
phba->cfg_fcp_eq_count = adjusted_fcp_eq_count;
|
||||
/* Set up SLI-4 HBA */
|
||||
if (lpfc_sli4_hba_setup(phba)) {
|
||||
lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
|
||||
|
||||
@ -350,11 +350,7 @@ lpfc_rcv_plogi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
|
||||
ndlp->nlp_maxframe =
|
||||
((sp->cmn.bbRcvSizeMsb & 0x0F) << 8) | sp->cmn.bbRcvSizeLsb;
|
||||
|
||||
/*
|
||||
* Need to unreg_login if we are already in one of these states and
|
||||
* change to NPR state. This will block the port until after the ACC
|
||||
* completes and the reg_login is issued and completed.
|
||||
*/
|
||||
/* no need to reg_login if we are already in one of these states */
|
||||
switch (ndlp->nlp_state) {
|
||||
case NLP_STE_NPR_NODE:
|
||||
if (!(ndlp->nlp_flag & NLP_NPR_ADISC))
|
||||
@ -363,9 +359,8 @@ lpfc_rcv_plogi(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
|
||||
case NLP_STE_PRLI_ISSUE:
|
||||
case NLP_STE_UNMAPPED_NODE:
|
||||
case NLP_STE_MAPPED_NODE:
|
||||
lpfc_unreg_rpi(vport, ndlp);
|
||||
ndlp->nlp_prev_state = ndlp->nlp_state;
|
||||
lpfc_nlp_set_state(vport, ndlp, NLP_STE_NPR_NODE);
|
||||
lpfc_els_rsp_acc(vport, ELS_CMD_PLOGI, cmdiocb, ndlp, NULL);
|
||||
return 1;
|
||||
}
|
||||
|
||||
if ((vport->fc_flag & FC_PT2PT) &&
|
||||
|
||||
@ -861,6 +861,7 @@ lpfc_new_scsi_buf_s4(struct lpfc_vport *vport, int num_to_alloc)
|
||||
*/
|
||||
sgl->addr_hi = cpu_to_le32(putPaddrHigh(pdma_phys_fcp_cmd));
|
||||
sgl->addr_lo = cpu_to_le32(putPaddrLow(pdma_phys_fcp_cmd));
|
||||
sgl->word2 = le32_to_cpu(sgl->word2);
|
||||
bf_set(lpfc_sli4_sge_last, sgl, 0);
|
||||
sgl->word2 = cpu_to_le32(sgl->word2);
|
||||
sgl->sge_len = cpu_to_le32(sizeof(struct fcp_cmnd));
|
||||
@ -869,6 +870,7 @@ lpfc_new_scsi_buf_s4(struct lpfc_vport *vport, int num_to_alloc)
|
||||
/* Setup the physical region for the FCP RSP */
|
||||
sgl->addr_hi = cpu_to_le32(putPaddrHigh(pdma_phys_fcp_rsp));
|
||||
sgl->addr_lo = cpu_to_le32(putPaddrLow(pdma_phys_fcp_rsp));
|
||||
sgl->word2 = le32_to_cpu(sgl->word2);
|
||||
bf_set(lpfc_sli4_sge_last, sgl, 1);
|
||||
sgl->word2 = cpu_to_le32(sgl->word2);
|
||||
sgl->sge_len = cpu_to_le32(sizeof(struct fcp_rsp));
|
||||
@ -2081,6 +2083,7 @@ lpfc_scsi_prep_dma_buf_s4(struct lpfc_hba *phba, struct lpfc_scsi_buf *lpfc_cmd)
|
||||
dma_len = sg_dma_len(sgel);
|
||||
sgl->addr_lo = cpu_to_le32(putPaddrLow(physaddr));
|
||||
sgl->addr_hi = cpu_to_le32(putPaddrHigh(physaddr));
|
||||
sgl->word2 = le32_to_cpu(sgl->word2);
|
||||
if ((num_bde + 1) == nseg)
|
||||
bf_set(lpfc_sli4_sge_last, sgl, 1);
|
||||
else
|
||||
|
||||
@ -65,6 +65,9 @@ static struct lpfc_iocbq *lpfc_sli4_els_wcqe_to_rspiocbq(struct lpfc_hba *,
|
||||
struct lpfc_iocbq *);
|
||||
static void lpfc_sli4_send_seq_to_ulp(struct lpfc_vport *,
|
||||
struct hbq_dmabuf *);
|
||||
static int lpfc_sli4_fp_handle_wcqe(struct lpfc_hba *, struct lpfc_queue *,
|
||||
struct lpfc_cqe *);
|
||||
|
||||
static IOCB_t *
|
||||
lpfc_get_iocb_from_iocbq(struct lpfc_iocbq *iocbq)
|
||||
{
|
||||
@ -3881,8 +3884,10 @@ lpfc_sli4_brdreset(struct lpfc_hba *phba)
|
||||
list_del_init(&phba->sli4_hba.els_cq->list);
|
||||
for (qindx = 0; qindx < phba->cfg_fcp_wq_count; qindx++)
|
||||
list_del_init(&phba->sli4_hba.fcp_wq[qindx]->list);
|
||||
for (qindx = 0; qindx < phba->cfg_fcp_eq_count; qindx++)
|
||||
qindx = 0;
|
||||
do
|
||||
list_del_init(&phba->sli4_hba.fcp_cq[qindx]->list);
|
||||
while (++qindx < phba->cfg_fcp_eq_count);
|
||||
spin_unlock_irq(&phba->hbalock);
|
||||
|
||||
/* Now physically reset the device */
|
||||
@ -4677,9 +4682,11 @@ lpfc_sli4_arm_cqeq_intr(struct lpfc_hba *phba)
|
||||
|
||||
lpfc_sli4_cq_release(phba->sli4_hba.mbx_cq, LPFC_QUEUE_REARM);
|
||||
lpfc_sli4_cq_release(phba->sli4_hba.els_cq, LPFC_QUEUE_REARM);
|
||||
for (fcp_eqidx = 0; fcp_eqidx < phba->cfg_fcp_eq_count; fcp_eqidx++)
|
||||
fcp_eqidx = 0;
|
||||
do
|
||||
lpfc_sli4_cq_release(phba->sli4_hba.fcp_cq[fcp_eqidx],
|
||||
LPFC_QUEUE_REARM);
|
||||
while (++fcp_eqidx < phba->cfg_fcp_eq_count);
|
||||
lpfc_sli4_eq_release(phba->sli4_hba.sp_eq, LPFC_QUEUE_REARM);
|
||||
for (fcp_eqidx = 0; fcp_eqidx < phba->cfg_fcp_eq_count; fcp_eqidx++)
|
||||
lpfc_sli4_eq_release(phba->sli4_hba.fp_eq[fcp_eqidx],
|
||||
@ -4740,7 +4747,7 @@ lpfc_sli4_hba_setup(struct lpfc_hba *phba)
|
||||
* to read FCoE param config regions
|
||||
*/
|
||||
if (lpfc_sli4_read_fcoe_params(phba, mboxq))
|
||||
lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_INIT,
|
||||
lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_INIT,
|
||||
"2570 Failed to read FCoE parameters\n");
|
||||
|
||||
/* Issue READ_REV to collect vpd and FW information. */
|
||||
@ -4906,16 +4913,7 @@ lpfc_sli4_hba_setup(struct lpfc_hba *phba)
|
||||
goto out_free_mbox;
|
||||
}
|
||||
|
||||
if (phba->cfg_soft_wwnn)
|
||||
u64_to_wwn(phba->cfg_soft_wwnn,
|
||||
vport->fc_sparam.nodeName.u.wwn);
|
||||
if (phba->cfg_soft_wwpn)
|
||||
u64_to_wwn(phba->cfg_soft_wwpn,
|
||||
vport->fc_sparam.portName.u.wwn);
|
||||
memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
|
||||
sizeof(struct lpfc_name));
|
||||
memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
|
||||
sizeof(struct lpfc_name));
|
||||
lpfc_update_vport_wwn(vport);
|
||||
|
||||
/* Update the fc_host data structures with new wwn. */
|
||||
fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
|
||||
@ -5747,10 +5745,15 @@ lpfc_sli4_post_sync_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
|
||||
lpfc_sli_pcimem_bcopy(&mbox_rgn->mcqe, &mboxq->mcqe,
|
||||
sizeof(struct lpfc_mcqe));
|
||||
mcqe_status = bf_get(lpfc_mcqe_status, &mbox_rgn->mcqe);
|
||||
|
||||
/* Prefix the mailbox status with range x4000 to note SLI4 status. */
|
||||
/*
|
||||
* When the CQE status indicates a failure and the mailbox status
|
||||
* indicates success then copy the CQE status into the mailbox status
|
||||
* (and prefix it with x4000).
|
||||
*/
|
||||
if (mcqe_status != MB_CQE_STATUS_SUCCESS) {
|
||||
bf_set(lpfc_mqe_status, mb, LPFC_MBX_ERROR_RANGE | mcqe_status);
|
||||
if (bf_get(lpfc_mqe_status, mb) == MBX_SUCCESS)
|
||||
bf_set(lpfc_mqe_status, mb,
|
||||
(LPFC_MBX_ERROR_RANGE | mcqe_status));
|
||||
rc = MBXERR_ERROR;
|
||||
} else
|
||||
lpfc_sli4_swap_str(phba, mboxq);
|
||||
@ -5819,7 +5822,7 @@ lpfc_sli_issue_mbox_s4(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
|
||||
else
|
||||
rc = -EIO;
|
||||
if (rc != MBX_SUCCESS)
|
||||
lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
|
||||
lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX | LOG_SLI,
|
||||
"(%d):2541 Mailbox command x%x "
|
||||
"(x%x) cannot issue Data: x%x x%x\n",
|
||||
mboxq->vport ? mboxq->vport->vpi : 0,
|
||||
@ -6307,6 +6310,7 @@ lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq,
|
||||
sgl->addr_hi = bpl->addrHigh;
|
||||
sgl->addr_lo = bpl->addrLow;
|
||||
|
||||
sgl->word2 = le32_to_cpu(sgl->word2);
|
||||
if ((i+1) == numBdes)
|
||||
bf_set(lpfc_sli4_sge_last, sgl, 1);
|
||||
else
|
||||
@ -6343,6 +6347,7 @@ lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq,
|
||||
cpu_to_le32(icmd->un.genreq64.bdl.addrHigh);
|
||||
sgl->addr_lo =
|
||||
cpu_to_le32(icmd->un.genreq64.bdl.addrLow);
|
||||
sgl->word2 = le32_to_cpu(sgl->word2);
|
||||
bf_set(lpfc_sli4_sge_last, sgl, 1);
|
||||
sgl->word2 = cpu_to_le32(sgl->word2);
|
||||
sgl->sge_len =
|
||||
@ -9799,7 +9804,12 @@ lpfc_sli4_sp_handle_eqe(struct lpfc_hba *phba, struct lpfc_eqe *eqe)
|
||||
break;
|
||||
case LPFC_WCQ:
|
||||
while ((cqe = lpfc_sli4_cq_get(cq))) {
|
||||
workposted |= lpfc_sli4_sp_handle_cqe(phba, cq, cqe);
|
||||
if (cq->subtype == LPFC_FCP)
|
||||
workposted |= lpfc_sli4_fp_handle_wcqe(phba, cq,
|
||||
cqe);
|
||||
else
|
||||
workposted |= lpfc_sli4_sp_handle_cqe(phba, cq,
|
||||
cqe);
|
||||
if (!(++ecount % LPFC_GET_QE_REL_INT))
|
||||
lpfc_sli4_cq_release(cq, LPFC_QUEUE_NOARM);
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user