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[TG3]: add support for bcm5752 rev a1
Replace existing ASIC_REV_5752 definition with ASIC_REV_5752_A0, and add definition for ASIC_REV_5752_A1. Then, add ASIC_REV_5752_A1 to check for setting TG3_FLG2_5750_PLUS in tg3_get_invariants. Signed-off-by: John W. Linville <linville@tuxdriver.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -7929,7 +7929,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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tp->pci_bist = (cacheline_sz_reg >> 24) & 0xff;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752_A0 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752_A1)
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tp->tg3_flags2 |= TG3_FLG2_5750_PLUS;
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if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) ||
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@ -125,6 +125,8 @@
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#define CHIPREV_ID_5750_A0 0x4000
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#define CHIPREV_ID_5750_A1 0x4001
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#define CHIPREV_ID_5750_A3 0x4003
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#define CHIPREV_ID_5752_A0 0x5000
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#define CHIPREV_ID_5752_A1 0x6001
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#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12)
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#define ASIC_REV_5700 0x07
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#define ASIC_REV_5701 0x00
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@ -132,7 +134,8 @@
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#define ASIC_REV_5704 0x02
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#define ASIC_REV_5705 0x03
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#define ASIC_REV_5750 0x04
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#define ASIC_REV_5752 0x05
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#define ASIC_REV_5752_A0 0x05
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#define ASIC_REV_5752_A1 0x06
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#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
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#define CHIPREV_5700_AX 0x70
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#define CHIPREV_5700_BX 0x71
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