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RDMA/vmw_pvrdma: Add RoCEv2 support
The driver version is bumped for compatibility purposes. Also, send correct GID type during register to device. Added compatibility check macros for the device. Reviewed-by: Jorgen Hansen <jhansen@vmware.com> Reviewed-by: Aditya Sarwade <asarwade@vmware.com> Signed-off-by: Bryan Tan <bryantan@vmware.com> Signed-off-by: Adit Ranadive <aditr@vmware.com> Reviewed-by: Leon Romanovsky <leonro@mellanox.com> Reviewed-by: Yuval Shaia <yuval.shaia@oracle.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -194,6 +194,7 @@ struct pvrdma_dev {
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void *resp_slot;
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unsigned long flags;
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struct list_head device_link;
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unsigned int dsr_version;
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/* Locking and interrupt information. */
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spinlock_t cmd_lock; /* Command lock. */
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@ -444,6 +445,7 @@ void pvrdma_ah_attr_to_rdma(struct rdma_ah_attr *dst,
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const struct pvrdma_ah_attr *src);
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void rdma_ah_attr_to_pvrdma(struct pvrdma_ah_attr *dst,
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const struct rdma_ah_attr *src);
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u8 ib_gid_type_to_pvrdma(enum ib_gid_type gid_type);
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int pvrdma_uar_table_init(struct pvrdma_dev *dev);
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void pvrdma_uar_table_cleanup(struct pvrdma_dev *dev);
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@ -50,7 +50,15 @@
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#include "pvrdma_verbs.h"
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#define PVRDMA_VERSION 17
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/*
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* PVRDMA version macros. Some new features require updates to PVRDMA_VERSION.
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* These macros allow us to check for different features if necessary.
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*/
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#define PVRDMA_ROCEV1_VERSION 17
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#define PVRDMA_ROCEV2_VERSION 18
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#define PVRDMA_VERSION PVRDMA_ROCEV2_VERSION
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#define PVRDMA_BOARD_ID 1
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#define PVRDMA_REV_ID 1
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@ -123,6 +131,24 @@
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#define PVRDMA_GID_TYPE_FLAG_ROCE_V1 BIT(0)
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#define PVRDMA_GID_TYPE_FLAG_ROCE_V2 BIT(1)
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/*
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* Version checks. This checks whether each version supports specific
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* capabilities from the device.
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*/
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#define PVRDMA_IS_VERSION17(_dev) \
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(_dev->dsr_version == PVRDMA_ROCEV1_VERSION && \
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_dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V1)
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#define PVRDMA_IS_VERSION18(_dev) \
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(_dev->dsr_version >= PVRDMA_ROCEV2_VERSION && \
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(_dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V1 || \
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_dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V2)) \
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#define PVRDMA_SUPPORTED(_dev) \
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((_dev->dsr->caps.mode == PVRDMA_DEVICE_MODE_ROCE) && \
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(PVRDMA_IS_VERSION17(_dev) || PVRDMA_IS_VERSION18(_dev)))
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enum pvrdma_pci_resource {
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PVRDMA_PCI_RESOURCE_MSIX, /* BAR0: MSI-X, MMIO. */
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PVRDMA_PCI_RESOURCE_REG, /* BAR1: Registers, MMIO. */
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@ -128,10 +128,14 @@ static int pvrdma_init_device(struct pvrdma_dev *dev)
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static int pvrdma_port_immutable(struct ib_device *ibdev, u8 port_num,
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struct ib_port_immutable *immutable)
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{
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struct pvrdma_dev *dev = to_vdev(ibdev);
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struct ib_port_attr attr;
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int err;
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immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
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if (dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V1)
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immutable->core_cap_flags |= RDMA_CORE_PORT_IBA_ROCE;
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else if (dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V2)
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immutable->core_cap_flags |= RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
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err = ib_query_port(ibdev, port_num, &attr);
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if (err)
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@ -569,6 +573,7 @@ static void pvrdma_free_slots(struct pvrdma_dev *dev)
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static int pvrdma_add_gid_at_index(struct pvrdma_dev *dev,
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const union ib_gid *gid,
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u8 gid_type,
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int index)
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{
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int ret;
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@ -586,7 +591,7 @@ static int pvrdma_add_gid_at_index(struct pvrdma_dev *dev,
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cmd_bind->mtu = ib_mtu_enum_to_int(IB_MTU_1024);
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cmd_bind->vlan = 0xfff;
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cmd_bind->index = index;
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cmd_bind->gid_type = PVRDMA_GID_TYPE_FLAG_ROCE_V1;
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cmd_bind->gid_type = gid_type;
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ret = pvrdma_cmd_post(dev, &req, NULL, 0);
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if (ret < 0) {
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@ -607,7 +612,9 @@ static int pvrdma_add_gid(struct ib_device *ibdev,
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{
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struct pvrdma_dev *dev = to_vdev(ibdev);
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return pvrdma_add_gid_at_index(dev, gid, index);
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return pvrdma_add_gid_at_index(dev, gid,
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ib_gid_type_to_pvrdma(attr->gid_type),
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index);
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}
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static int pvrdma_del_gid_at_index(struct pvrdma_dev *dev, int index)
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@ -722,7 +729,6 @@ static int pvrdma_pci_probe(struct pci_dev *pdev,
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int ret;
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unsigned long start;
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unsigned long len;
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unsigned int version;
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dma_addr_t slot_dma = 0;
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dev_dbg(&pdev->dev, "initializing driver %s\n", pci_name(pdev));
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@ -819,13 +825,9 @@ static int pvrdma_pci_probe(struct pci_dev *pdev,
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goto err_unmap_regs;
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}
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version = pvrdma_read_reg(dev, PVRDMA_REG_VERSION);
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dev->dsr_version = pvrdma_read_reg(dev, PVRDMA_REG_VERSION);
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dev_info(&pdev->dev, "device version %d, driver version %d\n",
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version, PVRDMA_VERSION);
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if (version < PVRDMA_VERSION) {
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dev_err(&pdev->dev, "incompatible device version\n");
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goto err_uar_unmap;
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}
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dev->dsr_version, PVRDMA_VERSION);
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dev->dsr = dma_alloc_coherent(&pdev->dev, sizeof(*dev->dsr),
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&dev->dsrbase, GFP_KERNEL);
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@ -896,17 +898,9 @@ static int pvrdma_pci_probe(struct pci_dev *pdev,
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/* Make sure the write is complete before reading status. */
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mb();
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/* Currently, the driver only supports RoCE mode. */
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if (dev->dsr->caps.mode != PVRDMA_DEVICE_MODE_ROCE) {
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dev_err(&pdev->dev, "unsupported transport %d\n",
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dev->dsr->caps.mode);
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ret = -EFAULT;
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goto err_free_cq_ring;
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}
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/* Currently, the driver only supports RoCE V1. */
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if (!(dev->dsr->caps.gid_types & PVRDMA_GID_TYPE_FLAG_ROCE_V1)) {
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dev_err(&pdev->dev, "driver needs RoCE v1 support\n");
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/* The driver supports RoCE V1 and V2. */
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if (!PVRDMA_SUPPORTED(dev)) {
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dev_err(&pdev->dev, "driver needs RoCE v1 or v2 support\n");
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ret = -EFAULT;
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goto err_free_cq_ring;
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}
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@ -303,3 +303,10 @@ void rdma_ah_attr_to_pvrdma(struct pvrdma_ah_attr *dst,
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dst->port_num = rdma_ah_get_port_num(src);
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memcpy(&dst->dmac, src->roce.dmac, sizeof(dst->dmac));
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}
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u8 ib_gid_type_to_pvrdma(enum ib_gid_type gid_type)
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{
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return (gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) ?
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PVRDMA_GID_TYPE_FLAG_ROCE_V2 :
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PVRDMA_GID_TYPE_FLAG_ROCE_V1;
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}
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