i40e: Extend PHY access with page change flag

Currently FW use MDIO I/F number corresponded with current PF for PHY
access. This code allow to specify used MDIO I/F number.

Add new field - command flags with only one flag for now. Added flag
tells FW that it shouldn't change page while accessing QSFP module, as
it was set manually.

Signed-off-by: Piotr Azarewicz <piotr.azarewicz@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Piotr Azarewicz 2019-09-20 02:17:19 -07:00 committed by Jeff Kirsher
parent a3e09ded6a
commit 0514db37dd
5 changed files with 87 additions and 26 deletions

View File

@ -2249,7 +2249,13 @@ struct i40e_aqc_phy_register_access {
#define I40E_AQ_PHY_REG_ACCESS_EXTERNAL 1 #define I40E_AQ_PHY_REG_ACCESS_EXTERNAL 1
#define I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE 2 #define I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE 2
u8 dev_address; u8 dev_address;
u8 reserved1[2]; u8 cmd_flags;
#define I40E_AQ_PHY_REG_ACCESS_DONT_CHANGE_QSFP_PAGE 0x01
#define I40E_AQ_PHY_REG_ACCESS_SET_MDIO_IF_NUMBER 0x02
#define I40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_SHIFT 2
#define I40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_MASK (0x3 << \
I40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_SHIFT)
u8 reserved1;
__le32 reg_address; __le32 reg_address;
__le32 reg_value; __le32 reg_value;
u8 reserved2[4]; u8 reserved2[4];

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@ -5046,7 +5046,7 @@ static enum i40e_status_code i40e_led_get_reg(struct i40e_hw *hw, u16 led_addr,
status = status =
i40e_aq_get_phy_register(hw, i40e_aq_get_phy_register(hw,
I40E_AQ_PHY_REG_ACCESS_EXTERNAL, I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
I40E_PHY_COM_REG_PAGE, I40E_PHY_COM_REG_PAGE, true,
I40E_PHY_LED_PROV_REG_1, I40E_PHY_LED_PROV_REG_1,
reg_val, NULL); reg_val, NULL);
} else { } else {
@ -5079,7 +5079,7 @@ static enum i40e_status_code i40e_led_set_reg(struct i40e_hw *hw, u16 led_addr,
status = status =
i40e_aq_set_phy_register(hw, i40e_aq_set_phy_register(hw,
I40E_AQ_PHY_REG_ACCESS_EXTERNAL, I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
I40E_PHY_COM_REG_PAGE, I40E_PHY_COM_REG_PAGE, true,
I40E_PHY_LED_PROV_REG_1, I40E_PHY_LED_PROV_REG_1,
reg_val, NULL); reg_val, NULL);
} else { } else {
@ -5118,7 +5118,7 @@ i40e_status i40e_led_get_phy(struct i40e_hw *hw, u16 *led_addr,
status = status =
i40e_aq_get_phy_register(hw, i40e_aq_get_phy_register(hw,
I40E_AQ_PHY_REG_ACCESS_EXTERNAL, I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
I40E_PHY_COM_REG_PAGE, I40E_PHY_COM_REG_PAGE, true,
I40E_PHY_LED_PROV_REG_1, I40E_PHY_LED_PROV_REG_1,
&reg_val_aq, NULL); &reg_val_aq, NULL);
if (status == I40E_SUCCESS) if (status == I40E_SUCCESS)
@ -5323,18 +5323,47 @@ do_retry:
} }
/** /**
* i40e_aq_set_phy_register * i40e_mdio_if_number_selection - MDIO I/F number selection
* @hw: pointer to the hw struct
* @set_mdio: use MDIO I/F number specified by mdio_num
* @mdio_num: MDIO I/F number
* @cmd: pointer to PHY Register command structure
**/
static void i40e_mdio_if_number_selection(struct i40e_hw *hw, bool set_mdio,
u8 mdio_num,
struct i40e_aqc_phy_register_access *cmd)
{
if (set_mdio && cmd->phy_interface == I40E_AQ_PHY_REG_ACCESS_EXTERNAL) {
if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_EXTENDED)
cmd->cmd_flags |=
I40E_AQ_PHY_REG_ACCESS_SET_MDIO_IF_NUMBER |
((mdio_num <<
I40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_SHIFT) &
I40E_AQ_PHY_REG_ACCESS_MDIO_IF_NUMBER_MASK);
else
i40e_debug(hw, I40E_DEBUG_PHY,
"MDIO I/F number selection not supported by current FW version.\n");
}
}
/**
* i40e_aq_set_phy_register_ext
* @hw: pointer to the hw struct * @hw: pointer to the hw struct
* @phy_select: select which phy should be accessed * @phy_select: select which phy should be accessed
* @dev_addr: PHY device address * @dev_addr: PHY device address
* @set_mdio: use MDIO I/F number specified by mdio_num
* @mdio_num: MDIO I/F number
* @reg_addr: PHY register address * @reg_addr: PHY register address
* @reg_val: new register value * @reg_val: new register value
* @cmd_details: pointer to command details structure or NULL * @cmd_details: pointer to command details structure or NULL
* *
* Write the external PHY register. * Write the external PHY register.
* NOTE: In common cases MDIO I/F number should not be changed, thats why you
* may use simple wrapper i40e_aq_set_phy_register.
**/ **/
i40e_status i40e_aq_set_phy_register(struct i40e_hw *hw, enum i40e_status_code i40e_aq_set_phy_register_ext(struct i40e_hw *hw,
u8 phy_select, u8 dev_addr, u8 phy_select, u8 dev_addr, bool page_change,
bool set_mdio, u8 mdio_num,
u32 reg_addr, u32 reg_val, u32 reg_addr, u32 reg_val,
struct i40e_asq_cmd_details *cmd_details) struct i40e_asq_cmd_details *cmd_details)
{ {
@ -5351,24 +5380,34 @@ i40e_status i40e_aq_set_phy_register(struct i40e_hw *hw,
cmd->reg_address = cpu_to_le32(reg_addr); cmd->reg_address = cpu_to_le32(reg_addr);
cmd->reg_value = cpu_to_le32(reg_val); cmd->reg_value = cpu_to_le32(reg_val);
i40e_mdio_if_number_selection(hw, set_mdio, mdio_num, cmd);
if (!page_change)
cmd->cmd_flags = I40E_AQ_PHY_REG_ACCESS_DONT_CHANGE_QSFP_PAGE;
status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
return status; return status;
} }
/** /**
* i40e_aq_get_phy_register * i40e_aq_get_phy_register_ext
* @hw: pointer to the hw struct * @hw: pointer to the hw struct
* @phy_select: select which phy should be accessed * @phy_select: select which phy should be accessed
* @dev_addr: PHY device address * @dev_addr: PHY device address
* @set_mdio: use MDIO I/F number specified by mdio_num
* @mdio_num: MDIO I/F number
* @reg_addr: PHY register address * @reg_addr: PHY register address
* @reg_val: read register value * @reg_val: read register value
* @cmd_details: pointer to command details structure or NULL * @cmd_details: pointer to command details structure or NULL
* *
* Read the external PHY register. * Read the external PHY register.
* NOTE: In common cases MDIO I/F number should not be changed, thats why you
* may use simple wrapper i40e_aq_get_phy_register.
**/ **/
i40e_status i40e_aq_get_phy_register(struct i40e_hw *hw, enum i40e_status_code i40e_aq_get_phy_register_ext(struct i40e_hw *hw,
u8 phy_select, u8 dev_addr, u8 phy_select, u8 dev_addr, bool page_change,
bool set_mdio, u8 mdio_num,
u32 reg_addr, u32 *reg_val, u32 reg_addr, u32 *reg_val,
struct i40e_asq_cmd_details *cmd_details) struct i40e_asq_cmd_details *cmd_details)
{ {
@ -5384,6 +5423,11 @@ i40e_status i40e_aq_get_phy_register(struct i40e_hw *hw,
cmd->dev_address = dev_addr; cmd->dev_address = dev_addr;
cmd->reg_address = cpu_to_le32(reg_addr); cmd->reg_address = cpu_to_le32(reg_addr);
i40e_mdio_if_number_selection(hw, set_mdio, mdio_num, cmd);
if (!page_change)
cmd->cmd_flags = I40E_AQ_PHY_REG_ACCESS_DONT_CHANGE_QSFP_PAGE;
status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
if (!status) if (!status)
*reg_val = le32_to_cpu(cmd->reg_value); *reg_val = le32_to_cpu(cmd->reg_value);

View File

@ -5112,7 +5112,7 @@ static int i40e_get_module_info(struct net_device *netdev,
case I40E_MODULE_TYPE_SFP: case I40E_MODULE_TYPE_SFP:
status = i40e_aq_get_phy_register(hw, status = i40e_aq_get_phy_register(hw,
I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
I40E_I2C_EEPROM_DEV_ADDR, I40E_I2C_EEPROM_DEV_ADDR, true,
I40E_MODULE_SFF_8472_COMP, I40E_MODULE_SFF_8472_COMP,
&sff8472_comp, NULL); &sff8472_comp, NULL);
if (status) if (status)
@ -5120,7 +5120,7 @@ static int i40e_get_module_info(struct net_device *netdev,
status = i40e_aq_get_phy_register(hw, status = i40e_aq_get_phy_register(hw,
I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
I40E_I2C_EEPROM_DEV_ADDR, I40E_I2C_EEPROM_DEV_ADDR, true,
I40E_MODULE_SFF_8472_SWAP, I40E_MODULE_SFF_8472_SWAP,
&sff8472_swap, NULL); &sff8472_swap, NULL);
if (status) if (status)
@ -5152,7 +5152,7 @@ static int i40e_get_module_info(struct net_device *netdev,
/* Read from memory page 0. */ /* Read from memory page 0. */
status = i40e_aq_get_phy_register(hw, status = i40e_aq_get_phy_register(hw,
I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
0, 0, true,
I40E_MODULE_REVISION_ADDR, I40E_MODULE_REVISION_ADDR,
&sff8636_rev, NULL); &sff8636_rev, NULL);
if (status) if (status)
@ -5223,7 +5223,7 @@ static int i40e_get_module_eeprom(struct net_device *netdev,
status = i40e_aq_get_phy_register(hw, status = i40e_aq_get_phy_register(hw,
I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
addr, offset, &value, NULL); true, addr, offset, &value, NULL);
if (status) if (status)
return -EIO; return -EIO;
data[i] = value; data[i] = value;

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@ -411,15 +411,25 @@ i40e_status i40e_aq_rx_ctl_write_register(struct i40e_hw *hw,
u32 reg_addr, u32 reg_val, u32 reg_addr, u32 reg_val,
struct i40e_asq_cmd_details *cmd_details); struct i40e_asq_cmd_details *cmd_details);
void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val); void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val);
i40e_status i40e_aq_set_phy_register(struct i40e_hw *hw, enum i40e_status_code
u8 phy_select, u8 dev_addr, i40e_aq_set_phy_register_ext(struct i40e_hw *hw,
u8 phy_select, u8 dev_addr, bool page_change,
bool set_mdio, u8 mdio_num,
u32 reg_addr, u32 reg_val, u32 reg_addr, u32 reg_val,
struct i40e_asq_cmd_details *cmd_details); struct i40e_asq_cmd_details *cmd_details);
i40e_status i40e_aq_get_phy_register(struct i40e_hw *hw, enum i40e_status_code
u8 phy_select, u8 dev_addr, i40e_aq_get_phy_register_ext(struct i40e_hw *hw,
u8 phy_select, u8 dev_addr, bool page_change,
bool set_mdio, u8 mdio_num,
u32 reg_addr, u32 *reg_val, u32 reg_addr, u32 *reg_val,
struct i40e_asq_cmd_details *cmd_details); struct i40e_asq_cmd_details *cmd_details);
/* Convenience wrappers for most common use case */
#define i40e_aq_set_phy_register(hw, ps, da, pc, ra, rv, cd) \
i40e_aq_set_phy_register_ext(hw, ps, da, pc, false, 0, ra, rv, cd)
#define i40e_aq_get_phy_register(hw, ps, da, pc, ra, rv, cd) \
i40e_aq_get_phy_register_ext(hw, ps, da, pc, false, 0, ra, rv, cd)
i40e_status i40e_read_phy_register_clause22(struct i40e_hw *hw, i40e_status i40e_read_phy_register_clause22(struct i40e_hw *hw,
u16 reg, u8 phy_addr, u16 *value); u16 reg, u8 phy_addr, u16 *value);
i40e_status i40e_write_phy_register_clause22(struct i40e_hw *hw, i40e_status i40e_write_phy_register_clause22(struct i40e_hw *hw,

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@ -624,6 +624,7 @@ struct i40e_hw {
#define I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK BIT_ULL(3) #define I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK BIT_ULL(3)
#define I40E_HW_FLAG_FW_LLDP_STOPPABLE BIT_ULL(4) #define I40E_HW_FLAG_FW_LLDP_STOPPABLE BIT_ULL(4)
#define I40E_HW_FLAG_FW_LLDP_PERSISTENT BIT_ULL(5) #define I40E_HW_FLAG_FW_LLDP_PERSISTENT BIT_ULL(5)
#define I40E_HW_FLAG_AQ_PHY_ACCESS_EXTENDED BIT_ULL(6)
#define I40E_HW_FLAG_DROP_MODE BIT_ULL(7) #define I40E_HW_FLAG_DROP_MODE BIT_ULL(7)
u64 flags; u64 flags;