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async_xor: permit callers to pass in a 'dma/page scribble' region
async_xor() needs space to perform dma and page address conversions. In most cases the code can simply reuse the struct page * array because the size of the native pointer matches the size of a dma/page address. In order to support archs where sizeof(dma_addr_t) is larger than sizeof(struct page *), or to preserve the input parameters, we utilize a memory region passed in by the caller. Since the code is now prepared to handle the case where it cannot perform address conversions on the stack, we no longer need the !HIGHMEM64G dependency in drivers/dma/Kconfig. [ Impact: don't clobber input buffers for address conversions ] Reviewed-by: Andre Noll <maan@systemlinux.org> Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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@ -115,29 +115,42 @@ of an operation.
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Perform a xor->copy->xor operation where each operation depends on the
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result from the previous operation:
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void complete_xor_copy_xor(void *param)
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void callback(void *param)
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{
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printk("complete\n");
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struct completion *cmp = param;
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complete(cmp);
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}
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int run_xor_copy_xor(struct page **xor_srcs,
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int xor_src_cnt,
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struct page *xor_dest,
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size_t xor_len,
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struct page *copy_src,
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struct page *copy_dest,
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size_t copy_len)
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void run_xor_copy_xor(struct page **xor_srcs,
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int xor_src_cnt,
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struct page *xor_dest,
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size_t xor_len,
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struct page *copy_src,
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struct page *copy_dest,
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size_t copy_len)
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{
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struct dma_async_tx_descriptor *tx;
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addr_conv_t addr_conv[xor_src_cnt];
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struct async_submit_ctl submit;
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addr_conv_t addr_conv[NDISKS];
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struct completion cmp;
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tx = async_xor(xor_dest, xor_srcs, 0, xor_src_cnt, xor_len,
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ASYNC_TX_XOR_DROP_DST, NULL, NULL, NULL);
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tx = async_memcpy(copy_dest, copy_src, 0, 0, copy_len, tx, NULL, NULL);
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tx = async_xor(xor_dest, xor_srcs, 0, xor_src_cnt, xor_len,
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ASYNC_TX_XOR_DROP_DST | ASYNC_TX_ACK,
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tx, complete_xor_copy_xor, NULL);
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init_async_submit(&submit, ASYNC_TX_XOR_DROP_DST, NULL, NULL, NULL,
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addr_conv);
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tx = async_xor(xor_dest, xor_srcs, 0, xor_src_cnt, xor_len, &submit)
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submit->depend_tx = tx;
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tx = async_memcpy(copy_dest, copy_src, 0, 0, copy_len, &submit);
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init_completion(&cmp);
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init_async_submit(&submit, ASYNC_TX_XOR_DROP_DST | ASYNC_TX_ACK, tx,
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callback, &cmp, addr_conv);
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tx = async_xor(xor_dest, xor_srcs, 0, xor_src_cnt, xor_len, &submit);
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async_tx_issue_pending_all();
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wait_for_completion(&cmp);
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}
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See include/linux/async_tx.h for more information on the flags. See the
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@ -33,11 +33,10 @@
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/* do_async_xor - dma map the pages and perform the xor with an engine */
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static __async_inline struct dma_async_tx_descriptor *
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do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list,
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unsigned int offset, int src_cnt, size_t len,
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unsigned int offset, int src_cnt, size_t len, dma_addr_t *dma_src,
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struct async_submit_ctl *submit)
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{
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struct dma_device *dma = chan->device;
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dma_addr_t *dma_src = (dma_addr_t *) src_list;
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struct dma_async_tx_descriptor *tx = NULL;
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int src_off = 0;
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int i;
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@ -125,9 +124,14 @@ do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset,
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int xor_src_cnt;
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int src_off = 0;
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void *dest_buf;
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void **srcs = (void **) src_list;
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void **srcs;
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/* reuse the 'src_list' array to convert to buffer pointers */
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if (submit->scribble)
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srcs = submit->scribble;
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else
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srcs = (void **) src_list;
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/* convert to buffer pointers */
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for (i = 0; i < src_cnt; i++)
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srcs[i] = page_address(src_list[i]) + offset;
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@ -178,17 +182,26 @@ async_xor(struct page *dest, struct page **src_list, unsigned int offset,
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struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR,
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&dest, 1, src_list,
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src_cnt, len);
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dma_addr_t *dma_src = NULL;
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BUG_ON(src_cnt <= 1);
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if (chan) {
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if (submit->scribble)
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dma_src = submit->scribble;
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else if (sizeof(dma_addr_t) <= sizeof(struct page *))
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dma_src = (dma_addr_t *) src_list;
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if (dma_src && chan) {
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/* run the xor asynchronously */
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pr_debug("%s (async): len: %zu\n", __func__, len);
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return do_async_xor(chan, dest, src_list, offset, src_cnt, len,
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submit);
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dma_src, submit);
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} else {
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/* run the xor synchronously */
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pr_debug("%s (sync): len: %zu\n", __func__, len);
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WARN_ONCE(chan, "%s: no space for dma address conversion\n",
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__func__);
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/* in the sync case the dest is an implied source
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* (assumes the dest is the first source)
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@ -241,11 +254,16 @@ async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
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src_cnt, len);
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struct dma_device *device = chan ? chan->device : NULL;
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struct dma_async_tx_descriptor *tx = NULL;
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dma_addr_t *dma_src = NULL;
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BUG_ON(src_cnt <= 1);
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if (device && src_cnt <= device->max_xor) {
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dma_addr_t *dma_src = (dma_addr_t *) src_list;
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if (submit->scribble)
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dma_src = submit->scribble;
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else if (sizeof(dma_addr_t) <= sizeof(struct page *))
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dma_src = (dma_addr_t *) src_list;
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if (dma_src && device && src_cnt <= device->max_xor) {
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unsigned long dma_prep_flags;
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int i;
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@ -275,6 +293,9 @@ async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
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enum async_tx_flags flags_orig = submit->flags;
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pr_debug("%s: (sync) len: %zu\n", __func__, len);
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WARN_ONCE(device && src_cnt <= device->max_xor,
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"%s: no space for dma address conversion\n",
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__func__);
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submit->flags |= ASYNC_TX_XOR_DROP_DST;
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submit->flags &= ~ASYNC_TX_ACK;
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@ -293,29 +314,6 @@ async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
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}
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EXPORT_SYMBOL_GPL(async_xor_val);
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static int __init async_xor_init(void)
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{
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#ifdef CONFIG_DMA_ENGINE
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/* To conserve stack space the input src_list (array of page pointers)
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* is reused to hold the array of dma addresses passed to the driver.
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* This conversion is only possible when dma_addr_t is less than the
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* the size of a pointer. HIGHMEM64G is known to violate this
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* assumption.
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*/
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BUILD_BUG_ON(sizeof(dma_addr_t) > sizeof(struct page *));
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#endif
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return 0;
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}
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static void __exit async_xor_exit(void)
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{
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do { } while (0);
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}
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module_init(async_xor_init);
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module_exit(async_xor_exit);
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MODULE_AUTHOR("Intel Corporation");
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MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api");
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MODULE_LICENSE("GPL");
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@ -4,7 +4,7 @@
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menuconfig DMADEVICES
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bool "DMA Engine support"
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depends on !HIGHMEM64G && HAS_DMA
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depends on HAS_DMA
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help
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DMA engines can do asynchronous data transfers without
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involving the host CPU. Currently, this framework can be
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