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[PATCH] genirq: x86_64 irq: Remove the msi assumption that irq == vector
This patch removes the change in behavior of the irq allocation code when CONFIG_PCI_MSI is defined. Removing all instances of the assumption that irq == vector. create_irq is rewritten to first allocate a free irq and then to assign that irq a vector. assign_irq_vector is made static and the AUTO_ASSIGN case which allocates an vector not bound to an irq is removed. The ioapic vector methods are removed, and everything now works with irqs. The definition of NR_IRQS no longer depends on CONFIG_PCI_MSI Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rajesh Shah <rajesh.shah@intel.com> Cc: Andi Kleen <ak@muc.de> Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Eric W. Biederman
Linus Torvalds
parent
4b2fabb9ec
commit
04b9267b15
@ -44,6 +44,8 @@
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#include <asm/nmi.h>
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#include <asm/msidef.h>
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static int assign_irq_vector(int irq);
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#define __apicdebuginit __init
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int sis_apic_bug; /* not actually supported, dummy for compile */
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@ -83,14 +85,6 @@ static struct irq_pin_list {
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short apic, pin, next;
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} irq_2_pin[PIN_MAP_SIZE];
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int vector_irq[NR_VECTORS] __read_mostly = { [0 ... NR_VECTORS - 1] = -1};
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#ifdef CONFIG_PCI_MSI
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#define vector_to_irq(vector) \
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(platform_legacy_irq(vector) ? vector : vector_irq[vector])
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#else
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#define vector_to_irq(vector) (vector)
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#endif
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#define __DO_ACTION(R, ACTION, FINAL) \
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\
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{ \
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@ -162,7 +156,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
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spin_lock_irqsave(&ioapic_lock, flags);
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__DO_ACTION(1, = dest, )
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set_irq_info(irq, mask);
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set_native_irq_info(irq, mask);
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spin_unlock_irqrestore(&ioapic_lock, flags);
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}
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#endif
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@ -599,18 +593,14 @@ static inline int IO_APIC_irq_trigger(int irq)
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/* irq_vectors is indexed by the sum of all RTEs in all I/O APICs. */
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u8 irq_vector[NR_IRQ_VECTORS] __read_mostly = { FIRST_DEVICE_VECTOR , 0 };
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int assign_irq_vector(int irq)
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static int __assign_irq_vector(int irq)
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{
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static int current_vector = FIRST_DEVICE_VECTOR, offset = 0;
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unsigned long flags;
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int vector;
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BUG_ON(irq != AUTO_ASSIGN && (unsigned)irq >= NR_IRQ_VECTORS);
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BUG_ON((unsigned)irq >= NR_IRQ_VECTORS);
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spin_lock_irqsave(&vector_lock, flags);
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if (irq != AUTO_ASSIGN && IO_APIC_VECTOR(irq) > 0) {
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spin_unlock_irqrestore(&vector_lock, flags);
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if (IO_APIC_VECTOR(irq) > 0) {
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return IO_APIC_VECTOR(irq);
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}
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next:
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@ -625,10 +615,18 @@ next:
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}
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vector = current_vector;
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vector_irq[vector] = irq;
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if (irq != AUTO_ASSIGN)
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IO_APIC_VECTOR(irq) = vector;
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IO_APIC_VECTOR(irq) = vector;
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return vector;
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}
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static int assign_irq_vector(int irq)
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{
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int vector;
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unsigned long flags;
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spin_lock_irqsave(&vector_lock, flags);
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vector = __assign_irq_vector(irq);
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spin_unlock_irqrestore(&vector_lock, flags);
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return vector;
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@ -644,18 +642,14 @@ static struct irq_chip ioapic_chip;
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static void ioapic_register_intr(int irq, int vector, unsigned long trigger)
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{
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unsigned idx;
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idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq;
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if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
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trigger == IOAPIC_LEVEL)
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set_irq_chip_and_handler(idx, &ioapic_chip,
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set_irq_chip_and_handler(irq, &ioapic_chip,
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handle_fasteoi_irq);
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else
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set_irq_chip_and_handler(idx, &ioapic_chip,
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set_irq_chip_and_handler(irq, &ioapic_chip,
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handle_edge_irq);
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set_intr_gate(vector, interrupt[idx]);
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set_intr_gate(vector, interrupt[irq]);
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}
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static void __init setup_IO_APIC_irqs(void)
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@ -872,17 +866,12 @@ void __apicdebuginit print_IO_APIC(void)
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);
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}
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}
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if (use_pci_vector())
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printk(KERN_INFO "Using vector-based indexing\n");
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printk(KERN_DEBUG "IRQ to pin mappings:\n");
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for (i = 0; i < NR_IRQS; i++) {
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struct irq_pin_list *entry = irq_2_pin + i;
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if (entry->pin < 0)
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continue;
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if (use_pci_vector() && !platform_legacy_irq(i))
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printk(KERN_DEBUG "IRQ%d ", IO_APIC_VECTOR(i));
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else
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printk(KERN_DEBUG "IRQ%d ", i);
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printk(KERN_DEBUG "IRQ%d ", i);
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for (;;) {
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printk("-> %d:%d", entry->apic, entry->pin);
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if (!entry->next)
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@ -1206,42 +1195,8 @@ static unsigned int startup_ioapic_irq(unsigned int irq)
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return was_pending;
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}
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static unsigned int startup_ioapic_vector(unsigned int vector)
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static int ioapic_retrigger_irq(unsigned int irq)
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{
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int irq = vector_to_irq(vector);
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return startup_ioapic_irq(irq);
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}
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static void mask_ioapic_vector (unsigned int vector)
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{
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int irq = vector_to_irq(vector);
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mask_IO_APIC_irq(irq);
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}
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static void unmask_ioapic_vector (unsigned int vector)
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{
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int irq = vector_to_irq(vector);
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unmask_IO_APIC_irq(irq);
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}
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#ifdef CONFIG_SMP
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static void set_ioapic_affinity_vector (unsigned int vector,
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cpumask_t cpu_mask)
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{
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int irq = vector_to_irq(vector);
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set_native_irq_info(vector, cpu_mask);
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set_ioapic_affinity_irq(irq, cpu_mask);
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}
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#endif // CONFIG_SMP
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static int ioapic_retrigger_vector(unsigned int vector)
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{
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int irq = vector_to_irq(vector);
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send_IPI_self(IO_APIC_VECTOR(irq));
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return 1;
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@ -1288,15 +1243,15 @@ static void ack_apic_level(unsigned int irq)
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static struct irq_chip ioapic_chip __read_mostly = {
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.name = "IO-APIC",
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.startup = startup_ioapic_vector,
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.mask = mask_ioapic_vector,
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.unmask = unmask_ioapic_vector,
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.startup = startup_ioapic_irq,
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.mask = mask_IO_APIC_irq,
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.unmask = unmask_IO_APIC_irq,
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.ack = ack_apic_edge,
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.eoi = ack_apic_level,
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#ifdef CONFIG_SMP
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.set_affinity = set_ioapic_affinity_vector,
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.set_affinity = set_ioapic_affinity_irq,
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#endif
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.retrigger = ioapic_retrigger_vector,
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.retrigger = ioapic_retrigger_irq,
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};
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static inline void init_IO_APIC_traps(void)
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@ -1316,11 +1271,6 @@ static inline void init_IO_APIC_traps(void)
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*/
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for (irq = 0; irq < NR_IRQS ; irq++) {
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int tmp = irq;
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if (use_pci_vector()) {
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if (!platform_legacy_irq(tmp))
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if ((tmp = vector_to_irq(tmp)) == -1)
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continue;
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}
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if (IO_APIC_IRQ(tmp) && !IO_APIC_VECTOR(tmp)) {
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/*
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* Hmm.. We don't have an entry for this,
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@ -1695,32 +1645,33 @@ static int __init ioapic_init_sysfs(void)
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device_initcall(ioapic_init_sysfs);
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#ifdef CONFIG_PCI_MSI
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/*
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* Dynamic irq allocate and deallocation for MSI
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* Dynamic irq allocate and deallocation
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*/
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int create_irq(void)
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{
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/* Hack of the day: irq == vector.
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*
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* Ultimately this will be be more general,
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* and not depend on the irq to vector identity mapping.
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* But this version is needed until msi.c can cope with
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* the more general form.
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*/
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int irq, vector;
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/* Allocate an unused irq */
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int irq;
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int new;
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int vector = 0;
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unsigned long flags;
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vector = assign_irq_vector(AUTO_ASSIGN);
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irq = vector;
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if (vector >= 0) {
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spin_lock_irqsave(&vector_lock, flags);
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vector_irq[vector] = irq;
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irq_vector[irq] = vector;
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spin_unlock_irqrestore(&vector_lock, flags);
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irq = -ENOSPC;
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spin_lock_irqsave(&vector_lock, flags);
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for (new = (NR_IRQS - 1); new >= 0; new--) {
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if (platform_legacy_irq(new))
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continue;
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if (irq_vector[new] != 0)
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continue;
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vector = __assign_irq_vector(new);
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if (likely(vector > 0))
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irq = new;
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break;
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}
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spin_unlock_irqrestore(&vector_lock, flags);
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if (irq >= 0) {
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set_intr_gate(vector, interrupt[irq]);
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dynamic_irq_init(irq);
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}
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return irq;
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@ -1729,17 +1680,13 @@ int create_irq(void)
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void destroy_irq(unsigned int irq)
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{
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unsigned long flags;
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unsigned int vector;
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dynamic_irq_cleanup(irq);
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spin_lock_irqsave(&vector_lock, flags);
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vector = irq_vector[irq];
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vector_irq[vector] = -1;
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irq_vector[irq] = 0;
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spin_unlock_irqrestore(&vector_lock, flags);
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}
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#endif
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/*
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* MSI mesage composition
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@ -1882,7 +1829,7 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int triggering, int p
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ioapic_write_entry(ioapic, pin, entry);
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spin_lock_irqsave(&ioapic_lock, flags);
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set_native_irq_info(use_pci_vector() ? entry.vector : irq, TARGET_CPUS);
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set_native_irq_info(irq, TARGET_CPUS);
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spin_unlock_irqrestore(&ioapic_lock, flags);
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return 0;
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@ -75,7 +75,6 @@
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#ifndef __ASSEMBLY__
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extern u8 irq_vector[NR_IRQ_VECTORS];
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#define IO_APIC_VECTOR(irq) (irq_vector[irq])
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#define AUTO_ASSIGN -1
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/*
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* Various low-level irq details needed by irq.c, process.c,
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@ -10,45 +10,7 @@
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* Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
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*/
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#ifdef CONFIG_PCI_MSI
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static inline int use_pci_vector(void) {return 1;}
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static inline void disable_edge_ioapic_vector(unsigned int vector) { }
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static inline void mask_and_ack_level_ioapic_vector(unsigned int vector) { }
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static inline void end_edge_ioapic_vector (unsigned int vector) { }
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#define startup_level_ioapic startup_level_ioapic_vector
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#define shutdown_level_ioapic mask_IO_APIC_vector
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#define enable_level_ioapic unmask_IO_APIC_vector
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#define disable_level_ioapic mask_IO_APIC_vector
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#define mask_and_ack_level_ioapic mask_and_ack_level_ioapic_vector
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#define end_level_ioapic end_level_ioapic_vector
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#define set_ioapic_affinity set_ioapic_affinity_vector
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#define startup_edge_ioapic startup_edge_ioapic_vector
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#define shutdown_edge_ioapic disable_edge_ioapic_vector
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#define enable_edge_ioapic unmask_IO_APIC_vector
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#define disable_edge_ioapic disable_edge_ioapic_vector
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#define ack_edge_ioapic ack_edge_ioapic_vector
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#define end_edge_ioapic end_edge_ioapic_vector
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#else
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static inline int use_pci_vector(void) {return 0;}
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static inline void disable_edge_ioapic_irq(unsigned int irq) { }
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static inline void mask_and_ack_level_ioapic_irq(unsigned int irq) { }
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static inline void end_edge_ioapic_irq (unsigned int irq) { }
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#define startup_level_ioapic startup_level_ioapic_irq
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#define shutdown_level_ioapic mask_IO_APIC_irq
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#define enable_level_ioapic unmask_IO_APIC_irq
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#define disable_level_ioapic mask_IO_APIC_irq
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#define mask_and_ack_level_ioapic mask_and_ack_level_ioapic_irq
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#define end_level_ioapic end_level_ioapic_irq
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#define set_ioapic_affinity set_ioapic_affinity_irq
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#define startup_edge_ioapic startup_edge_ioapic_irq
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#define shutdown_edge_ioapic disable_edge_ioapic_irq
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#define enable_edge_ioapic unmask_IO_APIC_irq
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#define disable_edge_ioapic disable_edge_ioapic_irq
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#define ack_edge_ioapic ack_edge_ioapic_irq
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#define end_edge_ioapic end_edge_ioapic_irq
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#endif
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#define APIC_MISMATCH_DEBUG
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@ -207,8 +169,6 @@ extern int timer_uses_ioapic_pin_0;
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extern int sis_apic_bug; /* dummy */
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extern int assign_irq_vector(int irq);
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void enable_NMI_through_LVT0 (void * dummy);
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extern spinlock_t i8259A_lock;
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@ -31,13 +31,8 @@
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#define FIRST_SYSTEM_VECTOR 0xef /* duplicated in hw_irq.h */
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#ifdef CONFIG_PCI_MSI
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#define NR_IRQS FIRST_SYSTEM_VECTOR
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#define NR_IRQ_VECTORS NR_IRQS
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#else
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#define NR_IRQS 224
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#define NR_IRQ_VECTORS (32 * NR_CPUS)
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#endif
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static __inline__ int irq_canonicalize(int irq)
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{
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