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arm64: KVM: Do not use pgd_index to index stage-2 pgd
The kernel's pgd_index macro is designed to index a normal, page sized array. KVM is a bit diffferent, as we can use concatenated pages to have a bigger address space (for example 40bit IPA with 4kB pages gives us an 8kB PGD. In the above case, the use of pgd_index will always return an index inside the first 4kB, which makes a guest that has memory above 0x8000000000 rather unhappy, as it spins forever in a page fault, whist the host happilly corrupts the lower pgd. The obvious fix is to get our own kvm_pgd_index that does the right thing(tm). Tested on X-Gene with a hacked kvmtool that put memory at a stupidly high address. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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@ -149,13 +149,14 @@ static inline bool kvm_s2pmd_readonly(pmd_t *pmd)
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(__boundary - 1 < (end) - 1)? __boundary: (end); \
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})
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#define kvm_pgd_index(addr) pgd_index(addr)
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static inline bool kvm_page_empty(void *ptr)
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{
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struct page *ptr_page = virt_to_page(ptr);
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return page_count(ptr_page) == 1;
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}
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#define kvm_pte_table_empty(kvm, ptep) kvm_page_empty(ptep)
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#define kvm_pmd_table_empty(kvm, pmdp) kvm_page_empty(pmdp)
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#define kvm_pud_table_empty(kvm, pudp) (0)
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@ -290,7 +290,7 @@ static void unmap_range(struct kvm *kvm, pgd_t *pgdp,
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phys_addr_t addr = start, end = start + size;
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phys_addr_t next;
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pgd = pgdp + pgd_index(addr);
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pgd = pgdp + kvm_pgd_index(addr);
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do {
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next = kvm_pgd_addr_end(addr, end);
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if (!pgd_none(*pgd))
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@ -355,7 +355,7 @@ static void stage2_flush_memslot(struct kvm *kvm,
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phys_addr_t next;
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pgd_t *pgd;
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pgd = kvm->arch.pgd + pgd_index(addr);
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pgd = kvm->arch.pgd + kvm_pgd_index(addr);
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do {
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next = kvm_pgd_addr_end(addr, end);
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stage2_flush_puds(kvm, pgd, addr, next);
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@ -830,7 +830,7 @@ static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache
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pgd_t *pgd;
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pud_t *pud;
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pgd = kvm->arch.pgd + pgd_index(addr);
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pgd = kvm->arch.pgd + kvm_pgd_index(addr);
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if (WARN_ON(pgd_none(*pgd))) {
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if (!cache)
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return NULL;
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@ -1120,7 +1120,7 @@ static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)
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pgd_t *pgd;
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phys_addr_t next;
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pgd = kvm->arch.pgd + pgd_index(addr);
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pgd = kvm->arch.pgd + kvm_pgd_index(addr);
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do {
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/*
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* Release kvm_mmu_lock periodically if the memory region is
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@ -158,6 +158,8 @@ static inline bool kvm_s2pmd_readonly(pmd_t *pmd)
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#define PTRS_PER_S2_PGD (1 << PTRS_PER_S2_PGD_SHIFT)
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#define S2_PGD_ORDER get_order(PTRS_PER_S2_PGD * sizeof(pgd_t))
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#define kvm_pgd_index(addr) (((addr) >> PGDIR_SHIFT) & (PTRS_PER_S2_PGD - 1))
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/*
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* If we are concatenating first level stage-2 page tables, we would have less
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* than or equal to 16 pointers in the fake PGD, because that's what the
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