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Merge patch series "Add PMEM support for RISC-V"
Anup Patel <apatel@ventanamicro.com> says: The Linux NVDIMM PEM drivers require arch support to map and access the persistent memory device. This series adds RISC-V PMEM support using recently added Svpbmt and Zicbom support. * b4-shazam-merge: RISC-V: Enable PMEM drivers RISC-V: Implement arch specific PMEM APIs RISC-V: Fix MEMREMAP_WB for systems with Svpbmt Link: https://lore.kernel.org/r/20221114090536.1662624-1-apatel@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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commit
049696a39d
@ -25,6 +25,7 @@ config RISCV
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select ARCH_HAS_GIGANTIC_PAGE
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select ARCH_HAS_KCOV
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select ARCH_HAS_MMIOWB
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select ARCH_HAS_PMEM_API
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select ARCH_HAS_PTE_SPECIAL
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select ARCH_HAS_SET_DIRECT_MAP if MMU
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select ARCH_HAS_SET_MEMORY if MMU
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@ -161,6 +161,7 @@ CONFIG_VIRTIO_MMIO=y
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CONFIG_RPMSG_CHAR=y
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CONFIG_RPMSG_CTRL=y
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CONFIG_RPMSG_VIRTIO=y
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CONFIG_LIBNVDIMM=y
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CONFIG_EXT4_FS=y
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CONFIG_EXT4_FS_POSIX_ACL=y
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CONFIG_EXT4_FS_SECURITY=y
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@ -135,4 +135,9 @@ __io_writes_outs(outs, u64, q, __io_pbr(), __io_paw())
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#include <asm-generic/io.h>
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#ifdef CONFIG_MMU
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#define arch_memremap_wb(addr, size) \
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((__force void *)ioremap_prot((addr), (size), _PAGE_KERNEL))
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#endif
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#endif /* _ASM_RISCV_IO_H */
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@ -14,6 +14,7 @@ obj-$(CONFIG_MMU) += fault.o pageattr.o
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obj-y += cacheflush.o
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obj-y += context.o
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obj-y += pgtable.o
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obj-y += pmem.o
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ifeq ($(CONFIG_MMU),y)
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obj-$(CONFIG_SMP) += tlbflush.o
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21
arch/riscv/mm/pmem.c
Normal file
21
arch/riscv/mm/pmem.c
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@ -0,0 +1,21 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022 Ventana Micro Systems Inc.
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*/
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#include <linux/export.h>
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#include <linux/libnvdimm.h>
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#include <asm/cacheflush.h>
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void arch_wb_cache_pmem(void *addr, size_t size)
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{
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ALT_CMO_OP(clean, addr, size, riscv_cbom_block_size);
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}
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EXPORT_SYMBOL_GPL(arch_wb_cache_pmem);
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void arch_invalidate_pmem(void *addr, size_t size)
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{
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ALT_CMO_OP(inval, addr, size, riscv_cbom_block_size);
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}
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EXPORT_SYMBOL_GPL(arch_invalidate_pmem);
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