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irqchip: Bulk conversion to generic_handle_domain_irq()
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
This commit is contained in:
parent
e1c054918c
commit
046a6ee234
@ -66,8 +66,9 @@ static void combiner_handle_cascade_irq(struct irq_desc *desc)
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{
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struct combiner_chip_data *chip_data = irq_desc_get_handler_data(desc);
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struct irq_chip *chip = irq_desc_get_chip(desc);
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unsigned int cascade_irq, combiner_irq;
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unsigned int combiner_irq;
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unsigned long status;
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int ret;
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chained_irq_enter(chip, desc);
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@ -80,12 +81,9 @@ static void combiner_handle_cascade_irq(struct irq_desc *desc)
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goto out;
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combiner_irq = chip_data->hwirq_offset + __ffs(status);
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cascade_irq = irq_find_mapping(combiner_irq_domain, combiner_irq);
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if (unlikely(!cascade_irq))
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ret = generic_handle_domain_irq(combiner_irq_domain, combiner_irq);
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if (unlikely(ret))
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handle_bad_irq(desc);
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else
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generic_handle_irq(cascade_irq);
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out:
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chained_irq_exit(chip, desc);
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@ -111,7 +111,6 @@ static void al_fic_irq_handler(struct irq_desc *desc)
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struct irq_chip *irqchip = irq_desc_get_chip(desc);
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struct irq_chip_generic *gc = irq_get_domain_generic_chip(domain, 0);
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unsigned long pending;
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unsigned int irq;
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u32 hwirq;
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chained_irq_enter(irqchip, desc);
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@ -119,10 +118,8 @@ static void al_fic_irq_handler(struct irq_desc *desc)
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pending = readl_relaxed(fic->base + AL_FIC_CAUSE);
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pending &= ~gc->mask_cache;
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for_each_set_bit(hwirq, &pending, NR_FIC_IRQS) {
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irq = irq_find_mapping(domain, hwirq);
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generic_handle_irq(irq);
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}
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for_each_set_bit(hwirq, &pending, NR_FIC_IRQS)
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generic_handle_domain_irq(domain, hwirq);
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chained_irq_exit(irqchip, desc);
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}
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@ -582,20 +582,19 @@ static void armada_370_xp_handle_msi_irq(struct pt_regs *regs, bool is_chained)
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for (msinr = PCI_MSI_DOORBELL_START;
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msinr < PCI_MSI_DOORBELL_END; msinr++) {
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int irq;
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unsigned int irq;
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if (!(msimask & BIT(msinr)))
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continue;
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if (is_chained) {
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irq = irq_find_mapping(armada_370_xp_msi_inner_domain,
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msinr - PCI_MSI_DOORBELL_START);
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generic_handle_irq(irq);
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} else {
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irq = msinr - PCI_MSI_DOORBELL_START;
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irq = msinr - PCI_MSI_DOORBELL_START;
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if (is_chained)
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generic_handle_domain_irq(armada_370_xp_msi_inner_domain,
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irq);
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else
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handle_domain_irq(armada_370_xp_msi_inner_domain,
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irq, regs);
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}
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}
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}
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#else
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@ -606,7 +605,6 @@ static void armada_370_xp_mpic_handle_cascade_irq(struct irq_desc *desc)
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{
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struct irq_chip *chip = irq_desc_get_chip(desc);
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unsigned long irqmap, irqn, irqsrc, cpuid;
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unsigned int cascade_irq;
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chained_irq_enter(chip, desc);
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@ -628,8 +626,7 @@ static void armada_370_xp_mpic_handle_cascade_irq(struct irq_desc *desc)
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continue;
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}
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cascade_irq = irq_find_mapping(armada_370_xp_mpic_domain, irqn);
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generic_handle_irq(cascade_irq);
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generic_handle_domain_irq(armada_370_xp_mpic_domain, irqn);
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}
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chained_irq_exit(chip, desc);
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@ -34,14 +34,12 @@ static void aspeed_i2c_ic_irq_handler(struct irq_desc *desc)
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struct aspeed_i2c_ic *i2c_ic = irq_desc_get_handler_data(desc);
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struct irq_chip *chip = irq_desc_get_chip(desc);
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unsigned long bit, status;
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unsigned int bus_irq;
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chained_irq_enter(chip, desc);
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status = readl(i2c_ic->base);
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for_each_set_bit(bit, &status, ASPEED_I2C_IC_NUM_BUS) {
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bus_irq = irq_find_mapping(i2c_ic->irq_domain, bit);
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generic_handle_irq(bus_irq);
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}
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for_each_set_bit(bit, &status, ASPEED_I2C_IC_NUM_BUS)
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generic_handle_domain_irq(i2c_ic->irq_domain, bit);
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chained_irq_exit(chip, desc);
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}
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@ -44,7 +44,6 @@ struct aspeed_scu_ic {
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static void aspeed_scu_ic_irq_handler(struct irq_desc *desc)
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{
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unsigned int irq;
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unsigned int sts;
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unsigned long bit;
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unsigned long enabled;
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@ -74,9 +73,8 @@ static void aspeed_scu_ic_irq_handler(struct irq_desc *desc)
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max = scu_ic->num_irqs + bit;
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for_each_set_bit_from(bit, &status, max) {
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irq = irq_find_mapping(scu_ic->irq_domain,
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bit - scu_ic->irq_shift);
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generic_handle_irq(irq);
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generic_handle_domain_irq(scu_ic->irq_domain,
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bit - scu_ic->irq_shift);
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regmap_update_bits(scu_ic->scu, scu_ic->reg, mask,
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BIT(bit + ASPEED_SCU_IC_STATUS_SHIFT));
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@ -50,7 +50,7 @@ static void ath79_misc_irq_handler(struct irq_desc *desc)
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while (pending) {
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int bit = __ffs(pending);
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generic_handle_irq(irq_linear_revmap(domain, bit));
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generic_handle_domain_irq(domain, bit);
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pending &= ~BIT(bit);
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}
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@ -254,7 +254,7 @@ static void bcm2836_chained_handle_irq(struct irq_desc *desc)
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u32 hwirq;
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while ((hwirq = get_next_armctrl_hwirq()) != ~0)
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generic_handle_irq(irq_linear_revmap(intc.domain, hwirq));
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generic_handle_domain_irq(intc.domain, hwirq);
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}
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IRQCHIP_DECLARE(bcm2835_armctrl_ic, "brcm,bcm2835-armctrl-ic",
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@ -161,7 +161,7 @@ static void bcm2836_arm_irqchip_handle_ipi(struct irq_desc *desc)
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mbox_val = readl_relaxed(intc.base + LOCAL_MAILBOX0_CLR0 + 16 * cpu);
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if (mbox_val) {
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int hwirq = ffs(mbox_val) - 1;
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generic_handle_irq(irq_find_mapping(ipi_domain, hwirq));
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generic_handle_domain_irq(ipi_domain, hwirq);
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}
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chained_irq_exit(chip, desc);
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@ -145,10 +145,8 @@ static void bcm7038_l1_irq_handle(struct irq_desc *desc)
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~cpu->mask_cache[idx];
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raw_spin_unlock_irqrestore(&intc->lock, flags);
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for_each_set_bit(hwirq, &pending, IRQS_PER_WORD) {
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generic_handle_irq(irq_find_mapping(intc->domain,
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base + hwirq));
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}
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for_each_set_bit(hwirq, &pending, IRQS_PER_WORD)
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generic_handle_domain_irq(intc->domain, base + hwirq);
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}
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chained_irq_exit(chip, desc);
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@ -74,10 +74,8 @@ static void bcm7120_l2_intc_irq_handle(struct irq_desc *desc)
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data->irq_map_mask[idx];
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irq_gc_unlock(gc);
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for_each_set_bit(hwirq, &pending, IRQS_PER_WORD) {
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generic_handle_irq(irq_find_mapping(b->domain,
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base + hwirq));
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}
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for_each_set_bit(hwirq, &pending, IRQS_PER_WORD)
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generic_handle_domain_irq(b->domain, base + hwirq);
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}
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chained_irq_exit(chip, desc);
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@ -110,7 +110,7 @@ static void brcmstb_l2_intc_irq_handle(struct irq_desc *desc)
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do {
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irq = ffs(status) - 1;
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status &= ~(1 << irq);
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generic_handle_irq(irq_linear_revmap(b->domain, irq));
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generic_handle_domain_irq(b->domain, irq);
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} while (status);
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out:
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chained_irq_exit(chip, desc);
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@ -62,9 +62,8 @@ static void dw_apb_ictl_handle_irq_cascaded(struct irq_desc *desc)
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while (stat) {
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u32 hwirq = ffs(stat) - 1;
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u32 virq = irq_find_mapping(d, gc->irq_base + hwirq);
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generic_handle_domain_irq(d, gc->irq_base + hwirq);
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generic_handle_irq(virq);
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stat &= ~BIT(hwirq);
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}
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}
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@ -375,8 +375,9 @@ static void gic_handle_cascade_irq(struct irq_desc *desc)
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{
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struct gic_chip_data *chip_data = irq_desc_get_handler_data(desc);
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struct irq_chip *chip = irq_desc_get_chip(desc);
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unsigned int cascade_irq, gic_irq;
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unsigned int gic_irq;
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unsigned long status;
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int ret;
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chained_irq_enter(chip, desc);
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@ -386,14 +387,10 @@ static void gic_handle_cascade_irq(struct irq_desc *desc)
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if (gic_irq == GICC_INT_SPURIOUS)
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goto out;
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cascade_irq = irq_find_mapping(chip_data->domain, gic_irq);
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if (unlikely(gic_irq < 32 || gic_irq > 1020)) {
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isb();
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ret = generic_handle_domain_irq(chip_data->domain, gic_irq);
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if (unlikely(ret))
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handle_bad_irq(desc);
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} else {
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isb();
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generic_handle_irq(cascade_irq);
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}
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out:
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chained_irq_exit(chip, desc);
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}
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@ -34,15 +34,14 @@ static void goldfish_pic_cascade(struct irq_desc *desc)
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{
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struct goldfish_pic_data *gfpic = irq_desc_get_handler_data(desc);
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struct irq_chip *host_chip = irq_desc_get_chip(desc);
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u32 pending, hwirq, virq;
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u32 pending, hwirq;
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chained_irq_enter(host_chip, desc);
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pending = readl(gfpic->base + GFPIC_REG_IRQ_PENDING);
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while (pending) {
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hwirq = __fls(pending);
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virq = irq_linear_revmap(gfpic->irq_domain, hwirq);
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generic_handle_irq(virq);
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generic_handle_domain_irq(gfpic->irq_domain, hwirq);
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pending &= ~(1 << hwirq);
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}
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@ -333,13 +333,11 @@ static void i8259_irq_dispatch(struct irq_desc *desc)
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{
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struct irq_domain *domain = irq_desc_get_handler_data(desc);
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int hwirq = i8259_poll();
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unsigned int irq;
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if (hwirq < 0)
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return;
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irq = irq_linear_revmap(domain, hwirq);
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generic_handle_irq(irq);
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generic_handle_domain_irq(domain, hwirq);
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}
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int __init i8259_of_init(struct device_node *node, struct device_node *parent)
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@ -28,7 +28,7 @@ static void idt_irq_dispatch(struct irq_desc *desc)
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{
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struct idt_pic_data *idtpic = irq_desc_get_handler_data(desc);
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struct irq_chip *host_chip = irq_desc_get_chip(desc);
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u32 pending, hwirq, virq;
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u32 pending, hwirq;
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chained_irq_enter(host_chip, desc);
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@ -36,9 +36,7 @@ static void idt_irq_dispatch(struct irq_desc *desc)
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pending &= ~idtpic->gc->mask_cache;
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while (pending) {
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hwirq = __fls(pending);
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virq = irq_linear_revmap(idtpic->irq_domain, hwirq);
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if (virq)
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generic_handle_irq(virq);
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generic_handle_domain_irq(idtpic->irq_domain, hwirq);
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pending &= ~(1 << hwirq);
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}
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@ -223,7 +223,7 @@ static void pdc_intc_perip_isr(struct irq_desc *desc)
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{
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unsigned int irq = irq_desc_get_irq(desc);
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struct pdc_intc_priv *priv;
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unsigned int i, irq_no;
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unsigned int i;
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priv = (struct pdc_intc_priv *)irq_desc_get_handler_data(desc);
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@ -237,14 +237,13 @@ static void pdc_intc_perip_isr(struct irq_desc *desc)
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found:
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/* pass on the interrupt */
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irq_no = irq_linear_revmap(priv->domain, i);
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generic_handle_irq(irq_no);
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generic_handle_domain_irq(priv->domain, i);
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}
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static void pdc_intc_syswake_isr(struct irq_desc *desc)
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{
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struct pdc_intc_priv *priv;
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unsigned int syswake, irq_no;
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unsigned int syswake;
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unsigned int status;
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priv = (struct pdc_intc_priv *)irq_desc_get_handler_data(desc);
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@ -258,9 +257,7 @@ static void pdc_intc_syswake_isr(struct irq_desc *desc)
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if (!(status & 1))
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continue;
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irq_no = irq_linear_revmap(priv->domain,
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syswake_to_hwirq(syswake));
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generic_handle_irq(irq_no);
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generic_handle_domain_irq(priv->domain, syswake_to_hwirq(syswake));
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}
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}
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@ -182,18 +182,15 @@ static void imx_intmux_irq_handler(struct irq_desc *desc)
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struct intmux_data *data = container_of(irqchip_data, struct intmux_data,
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irqchip_data[idx]);
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unsigned long irqstat;
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int pos, virq;
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int pos;
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chained_irq_enter(irq_desc_get_chip(desc), desc);
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/* read the interrupt source pending status of this channel */
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irqstat = readl_relaxed(data->regs + CHANIPR(idx));
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for_each_set_bit(pos, &irqstat, 32) {
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virq = irq_find_mapping(irqchip_data->domain, pos);
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if (virq)
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generic_handle_irq(virq);
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}
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for_each_set_bit(pos, &irqstat, 32)
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generic_handle_domain_irq(irqchip_data->domain, pos);
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chained_irq_exit(irq_desc_get_chip(desc), desc);
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}
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@ -122,7 +122,7 @@ static void imx_irqsteer_irq_handler(struct irq_desc *desc)
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for (i = 0; i < 2; i++, hwirq += 32) {
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int idx = imx_irqsteer_get_reg_index(data, hwirq);
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unsigned long irqmap;
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int pos, virq;
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int pos;
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if (hwirq >= data->reg_num * 32)
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break;
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@ -130,11 +130,8 @@ static void imx_irqsteer_irq_handler(struct irq_desc *desc)
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irqmap = readl_relaxed(data->regs +
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CHANSTATUS(idx, data->reg_num));
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for_each_set_bit(pos, &irqmap, 32) {
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virq = irq_find_mapping(data->domain, pos + hwirq);
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if (virq)
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generic_handle_irq(virq);
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}
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for_each_set_bit(pos, &irqmap, 32)
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generic_handle_domain_irq(data->domain, pos + hwirq);
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}
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chained_irq_exit(irq_desc_get_chip(desc), desc);
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@ -38,7 +38,7 @@ static void ingenic_tcu_intc_cascade(struct irq_desc *desc)
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irq_reg &= ~irq_mask;
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for_each_set_bit(i, (unsigned long *)&irq_reg, 32)
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generic_handle_irq(irq_linear_revmap(domain, i));
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generic_handle_domain_irq(domain, i);
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chained_irq_exit(irq_chip, desc);
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}
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@ -49,8 +49,7 @@ static irqreturn_t intc_cascade(int irq, void *data)
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while (pending) {
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int bit = __fls(pending);
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irq = irq_linear_revmap(domain, bit + (i * 32));
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generic_handle_irq(irq);
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generic_handle_domain_irq(domain, bit + (i * 32));
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pending &= ~BIT(bit);
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}
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}
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@ -89,7 +89,7 @@ static irqreturn_t keystone_irq_handler(int irq, void *keystone_irq)
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struct keystone_irq_device *kirq = keystone_irq;
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unsigned long wa_lock_flags;
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unsigned long pending;
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int src, virq;
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int src, err;
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dev_dbg(kirq->dev, "start irq %d\n", irq);
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@ -104,16 +104,14 @@ static irqreturn_t keystone_irq_handler(int irq, void *keystone_irq)
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for (src = 0; src < KEYSTONE_N_IRQ; src++) {
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if (BIT(src) & pending) {
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virq = irq_find_mapping(kirq->irqd, src);
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dev_dbg(kirq->dev, "dispatch bit %d, virq %d\n",
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src, virq);
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if (!virq)
|
||||
dev_warn(kirq->dev, "spurious irq detected hwirq %d, virq %d\n",
|
||||
src, virq);
|
||||
raw_spin_lock_irqsave(&kirq->wa_lock, wa_lock_flags);
|
||||
generic_handle_irq(virq);
|
||||
err = generic_handle_domain_irq(kirq->irqd, src);
|
||||
raw_spin_unlock_irqrestore(&kirq->wa_lock,
|
||||
wa_lock_flags);
|
||||
|
||||
if (err)
|
||||
dev_warn_ratelimited(kirq->dev, "spurious irq detected hwirq %d\n",
|
||||
src);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -48,7 +48,7 @@ static void htpic_irq_dispatch(struct irq_desc *desc)
|
||||
break;
|
||||
}
|
||||
|
||||
generic_handle_irq(irq_linear_revmap(priv->domain, bit));
|
||||
generic_handle_domain_irq(priv->domain, bit);
|
||||
pending &= ~BIT(bit);
|
||||
}
|
||||
chained_irq_exit(chip, desc);
|
||||
|
@ -47,8 +47,8 @@ static void htvec_irq_dispatch(struct irq_desc *desc)
|
||||
while (pending) {
|
||||
int bit = __ffs(pending);
|
||||
|
||||
generic_handle_irq(irq_linear_revmap(priv->htvec_domain, bit +
|
||||
VEC_COUNT_PER_REG * i));
|
||||
generic_handle_domain_irq(priv->htvec_domain,
|
||||
bit + VEC_COUNT_PER_REG * i);
|
||||
pending &= ~BIT(bit);
|
||||
handled = true;
|
||||
}
|
||||
|
@ -73,7 +73,7 @@ static void liointc_chained_handle_irq(struct irq_desc *desc)
|
||||
while (pending) {
|
||||
int bit = __ffs(pending);
|
||||
|
||||
generic_handle_irq(irq_find_mapping(gc->domain, bit));
|
||||
generic_handle_domain_irq(gc->domain, bit);
|
||||
pending &= ~BIT(bit);
|
||||
}
|
||||
|
||||
|
@ -141,7 +141,7 @@ static void lpc32xx_sic_handler(struct irq_desc *desc)
|
||||
while (hwirq) {
|
||||
irq = __ffs(hwirq);
|
||||
hwirq &= ~BIT(irq);
|
||||
generic_handle_irq(irq_find_mapping(ic->domain, irq));
|
||||
generic_handle_domain_irq(ic->domain, irq);
|
||||
}
|
||||
|
||||
chained_irq_exit(chip, desc);
|
||||
|
@ -194,7 +194,7 @@ static void ls_scfg_msi_irq_handler(struct irq_desc *desc)
|
||||
struct ls_scfg_msir *msir = irq_desc_get_handler_data(desc);
|
||||
struct ls_scfg_msi *msi_data = msir->msi_data;
|
||||
unsigned long val;
|
||||
int pos, size, virq, hwirq;
|
||||
int pos, size, hwirq;
|
||||
|
||||
chained_irq_enter(irq_desc_get_chip(desc), desc);
|
||||
|
||||
@ -206,9 +206,7 @@ static void ls_scfg_msi_irq_handler(struct irq_desc *desc)
|
||||
for_each_set_bit_from(pos, &val, size) {
|
||||
hwirq = ((msir->bit_end - pos) << msi_data->cfg->ibs_shift) |
|
||||
msir->srs;
|
||||
virq = irq_find_mapping(msi_data->parent, hwirq);
|
||||
if (virq)
|
||||
generic_handle_irq(virq);
|
||||
generic_handle_domain_irq(msi_data->parent, hwirq);
|
||||
}
|
||||
|
||||
chained_irq_exit(irq_desc_get_chip(desc), desc);
|
||||
|
@ -50,7 +50,7 @@ static void ls1x_chained_handle_irq(struct irq_desc *desc)
|
||||
while (pending) {
|
||||
int bit = __ffs(pending);
|
||||
|
||||
generic_handle_irq(irq_find_mapping(priv->domain, bit));
|
||||
generic_handle_domain_irq(priv->domain, bit);
|
||||
pending &= ~BIT(bit);
|
||||
}
|
||||
|
||||
|
@ -148,7 +148,7 @@ int gic_get_c0_fdc_int(void)
|
||||
|
||||
static void gic_handle_shared_int(bool chained)
|
||||
{
|
||||
unsigned int intr, virq;
|
||||
unsigned int intr;
|
||||
unsigned long *pcpu_mask;
|
||||
DECLARE_BITMAP(pending, GIC_MAX_INTRS);
|
||||
|
||||
@ -165,12 +165,12 @@ static void gic_handle_shared_int(bool chained)
|
||||
bitmap_and(pending, pending, pcpu_mask, gic_shared_intrs);
|
||||
|
||||
for_each_set_bit(intr, pending, gic_shared_intrs) {
|
||||
virq = irq_linear_revmap(gic_irq_domain,
|
||||
GIC_SHARED_TO_HWIRQ(intr));
|
||||
if (chained)
|
||||
generic_handle_irq(virq);
|
||||
generic_handle_domain_irq(gic_irq_domain,
|
||||
GIC_SHARED_TO_HWIRQ(intr));
|
||||
else
|
||||
do_IRQ(virq);
|
||||
do_IRQ(irq_find_mapping(gic_irq_domain,
|
||||
GIC_SHARED_TO_HWIRQ(intr)));
|
||||
}
|
||||
}
|
||||
|
||||
@ -308,7 +308,7 @@ static struct irq_chip gic_edge_irq_controller = {
|
||||
static void gic_handle_local_int(bool chained)
|
||||
{
|
||||
unsigned long pending, masked;
|
||||
unsigned int intr, virq;
|
||||
unsigned int intr;
|
||||
|
||||
pending = read_gic_vl_pend();
|
||||
masked = read_gic_vl_mask();
|
||||
@ -316,12 +316,12 @@ static void gic_handle_local_int(bool chained)
|
||||
bitmap_and(&pending, &pending, &masked, GIC_NUM_LOCAL_INTRS);
|
||||
|
||||
for_each_set_bit(intr, &pending, GIC_NUM_LOCAL_INTRS) {
|
||||
virq = irq_linear_revmap(gic_irq_domain,
|
||||
GIC_LOCAL_TO_HWIRQ(intr));
|
||||
if (chained)
|
||||
generic_handle_irq(virq);
|
||||
generic_handle_domain_irq(gic_irq_domain,
|
||||
GIC_LOCAL_TO_HWIRQ(intr));
|
||||
else
|
||||
do_IRQ(virq);
|
||||
do_IRQ(irq_find_mapping(gic_irq_domain,
|
||||
GIC_LOCAL_TO_HWIRQ(intr)));
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -107,7 +107,7 @@ static void ocelot_irq_handler(struct irq_desc *desc)
|
||||
while (reg) {
|
||||
u32 hwirq = __fls(reg);
|
||||
|
||||
generic_handle_irq(irq_find_mapping(d, hwirq));
|
||||
generic_handle_domain_irq(d, hwirq);
|
||||
reg &= ~(BIT(hwirq));
|
||||
}
|
||||
|
||||
|
@ -91,15 +91,12 @@ static void mvebu_pic_handle_cascade_irq(struct irq_desc *desc)
|
||||
struct mvebu_pic *pic = irq_desc_get_handler_data(desc);
|
||||
struct irq_chip *chip = irq_desc_get_chip(desc);
|
||||
unsigned long irqmap, irqn;
|
||||
unsigned int cascade_irq;
|
||||
|
||||
irqmap = readl_relaxed(pic->base + PIC_CAUSE);
|
||||
chained_irq_enter(chip, desc);
|
||||
|
||||
for_each_set_bit(irqn, &irqmap, BITS_PER_LONG) {
|
||||
cascade_irq = irq_find_mapping(pic->domain, irqn);
|
||||
generic_handle_irq(cascade_irq);
|
||||
}
|
||||
for_each_set_bit(irqn, &irqmap, BITS_PER_LONG)
|
||||
generic_handle_domain_irq(pic->domain, irqn);
|
||||
|
||||
chained_irq_exit(chip, desc);
|
||||
}
|
||||
|
@ -337,17 +337,12 @@ static void mvebu_sei_handle_cascade_irq(struct irq_desc *desc)
|
||||
irqmap = readl_relaxed(sei->base + GICP_SECR(idx));
|
||||
for_each_set_bit(bit, &irqmap, SEI_IRQ_COUNT_PER_REG) {
|
||||
unsigned long hwirq;
|
||||
unsigned int virq;
|
||||
int err;
|
||||
|
||||
hwirq = idx * SEI_IRQ_COUNT_PER_REG + bit;
|
||||
virq = irq_find_mapping(sei->sei_domain, hwirq);
|
||||
if (likely(virq)) {
|
||||
generic_handle_irq(virq);
|
||||
continue;
|
||||
}
|
||||
|
||||
dev_warn(sei->dev,
|
||||
"Spurious IRQ detected (hwirq %lu)\n", hwirq);
|
||||
err = generic_handle_domain_irq(sei->sei_domain, hwirq);
|
||||
if (unlikely(err))
|
||||
dev_warn(sei->dev, "Spurious IRQ detected (hwirq %lu)\n", hwirq);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -117,7 +117,7 @@ static void orion_bridge_irq_handler(struct irq_desc *desc)
|
||||
while (stat) {
|
||||
u32 hwirq = __fls(stat);
|
||||
|
||||
generic_handle_irq(irq_find_mapping(d, gc->irq_base + hwirq));
|
||||
generic_handle_domain_irq(d, gc->irq_base + hwirq);
|
||||
stat &= ~(1 << hwirq);
|
||||
}
|
||||
}
|
||||
|
@ -124,13 +124,10 @@ static void partition_handle_irq(struct irq_desc *desc)
|
||||
break;
|
||||
}
|
||||
|
||||
if (unlikely(hwirq == part->nr_parts)) {
|
||||
if (unlikely(hwirq == part->nr_parts))
|
||||
handle_bad_irq(desc);
|
||||
} else {
|
||||
unsigned int irq;
|
||||
irq = irq_find_mapping(part->domain, hwirq);
|
||||
generic_handle_irq(irq);
|
||||
}
|
||||
else
|
||||
generic_handle_domain_irq(part->domain, hwirq);
|
||||
|
||||
chained_irq_exit(chip, desc);
|
||||
}
|
||||
|
@ -488,8 +488,7 @@ static void pruss_intc_irq_handler(struct irq_desc *desc)
|
||||
|
||||
while (true) {
|
||||
u32 hipir;
|
||||
unsigned int virq;
|
||||
int hwirq;
|
||||
int hwirq, err;
|
||||
|
||||
/* get highest priority pending PRUSS system event */
|
||||
hipir = pruss_intc_read_reg(intc, PRU_INTC_HIPIR(host_irq));
|
||||
@ -497,16 +496,14 @@ static void pruss_intc_irq_handler(struct irq_desc *desc)
|
||||
break;
|
||||
|
||||
hwirq = hipir & GENMASK(9, 0);
|
||||
virq = irq_find_mapping(intc->domain, hwirq);
|
||||
err = generic_handle_domain_irq(intc->domain, hwirq);
|
||||
|
||||
/*
|
||||
* NOTE: manually ACK any system events that do not have a
|
||||
* handler mapped yet
|
||||
*/
|
||||
if (WARN_ON_ONCE(!virq))
|
||||
if (WARN_ON_ONCE(err))
|
||||
pruss_intc_write_reg(intc, PRU_INTC_SICR, hwirq);
|
||||
else
|
||||
generic_handle_irq(virq);
|
||||
}
|
||||
|
||||
chained_irq_exit(chip, desc);
|
||||
|
@ -85,7 +85,7 @@ static void realtek_irq_dispatch(struct irq_desc *desc)
|
||||
goto out;
|
||||
}
|
||||
domain = irq_desc_get_handler_data(desc);
|
||||
generic_handle_irq(irq_find_mapping(domain, __ffs(pending)));
|
||||
generic_handle_domain_irq(domain, __ffs(pending));
|
||||
|
||||
out:
|
||||
chained_irq_exit(chip, desc);
|
||||
|
@ -115,7 +115,7 @@ static irqreturn_t irqc_irq_handler(int irq, void *dev_id)
|
||||
if (ioread32(p->iomem + DETECT_STATUS) & bit) {
|
||||
iowrite32(bit, p->iomem + DETECT_STATUS);
|
||||
irqc_dbg(i, "demux2");
|
||||
generic_handle_irq(irq_find_mapping(p->irq_domain, i->hw_irq));
|
||||
generic_handle_domain_irq(p->irq_domain, i->hw_irq);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
return IRQ_NONE;
|
||||
|
@ -233,13 +233,11 @@ static void plic_handle_irq(struct irq_desc *desc)
|
||||
chained_irq_enter(chip, desc);
|
||||
|
||||
while ((hwirq = readl(claim))) {
|
||||
int irq = irq_find_mapping(handler->priv->irqdomain, hwirq);
|
||||
|
||||
if (unlikely(irq <= 0))
|
||||
int err = generic_handle_domain_irq(handler->priv->irqdomain,
|
||||
hwirq);
|
||||
if (unlikely(err))
|
||||
pr_warn_ratelimited("can't find mapping for hwirq %lu\n",
|
||||
hwirq);
|
||||
else
|
||||
generic_handle_irq(irq);
|
||||
}
|
||||
|
||||
chained_irq_exit(chip, desc);
|
||||
|
@ -257,7 +257,7 @@ static void stm32_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
struct irq_domain *domain = irq_desc_get_handler_data(desc);
|
||||
struct irq_chip *chip = irq_desc_get_chip(desc);
|
||||
unsigned int virq, nbanks = domain->gc->num_chips;
|
||||
unsigned int nbanks = domain->gc->num_chips;
|
||||
struct irq_chip_generic *gc;
|
||||
unsigned long pending;
|
||||
int n, i, irq_base = 0;
|
||||
@ -268,11 +268,9 @@ static void stm32_irq_handler(struct irq_desc *desc)
|
||||
gc = irq_get_domain_generic_chip(domain, irq_base);
|
||||
|
||||
while ((pending = stm32_exti_pending(gc))) {
|
||||
for_each_set_bit(n, &pending, IRQS_PER_BANK) {
|
||||
virq = irq_find_mapping(domain, irq_base + n);
|
||||
generic_handle_irq(virq);
|
||||
}
|
||||
}
|
||||
for_each_set_bit(n, &pending, IRQS_PER_BANK)
|
||||
generic_handle_domain_irq(domain, irq_base + n);
|
||||
}
|
||||
}
|
||||
|
||||
chained_irq_exit(chip, desc);
|
||||
|
@ -88,10 +88,9 @@ static void sunxi_sc_nmi_handle_irq(struct irq_desc *desc)
|
||||
{
|
||||
struct irq_domain *domain = irq_desc_get_handler_data(desc);
|
||||
struct irq_chip *chip = irq_desc_get_chip(desc);
|
||||
unsigned int virq = irq_find_mapping(domain, 0);
|
||||
|
||||
chained_irq_enter(chip, desc);
|
||||
generic_handle_irq(virq);
|
||||
generic_handle_domain_irq(domain, 0);
|
||||
chained_irq_exit(chip, desc);
|
||||
}
|
||||
|
||||
|
@ -91,7 +91,7 @@ static void tb10x_irq_cascade(struct irq_desc *desc)
|
||||
struct irq_domain *domain = irq_desc_get_handler_data(desc);
|
||||
unsigned int irq = irq_desc_get_irq(desc);
|
||||
|
||||
generic_handle_irq(irq_find_mapping(domain, irq));
|
||||
generic_handle_domain_irq(domain, irq);
|
||||
}
|
||||
|
||||
static int __init of_tb10x_init_irq(struct device_node *ictl,
|
||||
|
@ -147,7 +147,7 @@ static void ti_sci_inta_irq_handler(struct irq_desc *desc)
|
||||
struct ti_sci_inta_vint_desc *vint_desc;
|
||||
struct ti_sci_inta_irq_domain *inta;
|
||||
struct irq_domain *domain;
|
||||
unsigned int virq, bit;
|
||||
unsigned int bit;
|
||||
unsigned long val;
|
||||
|
||||
vint_desc = irq_desc_get_handler_data(desc);
|
||||
@ -159,11 +159,8 @@ static void ti_sci_inta_irq_handler(struct irq_desc *desc)
|
||||
val = readq_relaxed(inta->base + vint_desc->vint_id * 0x1000 +
|
||||
VINT_STATUS_MASKED_OFFSET);
|
||||
|
||||
for_each_set_bit(bit, &val, MAX_EVENTS_PER_VINT) {
|
||||
virq = irq_find_mapping(domain, vint_desc->events[bit].hwirq);
|
||||
if (virq)
|
||||
generic_handle_irq(virq);
|
||||
}
|
||||
for_each_set_bit(bit, &val, MAX_EVENTS_PER_VINT)
|
||||
generic_handle_domain_irq(domain, vint_desc->events[bit].hwirq);
|
||||
|
||||
chained_irq_exit(irq_desc_get_chip(desc), desc);
|
||||
}
|
||||
|
@ -79,10 +79,9 @@ static void ts4800_ic_chained_handle_irq(struct irq_desc *desc)
|
||||
|
||||
do {
|
||||
unsigned int bit = __ffs(status);
|
||||
int irq = irq_find_mapping(data->domain, bit);
|
||||
|
||||
generic_handle_domain_irq(data->domain, bit);
|
||||
status &= ~(1 << bit);
|
||||
generic_handle_irq(irq);
|
||||
} while (status);
|
||||
|
||||
out:
|
||||
|
@ -85,7 +85,7 @@ static void fpga_irq_handle(struct irq_desc *desc)
|
||||
unsigned int irq = ffs(status) - 1;
|
||||
|
||||
status &= ~(1 << irq);
|
||||
generic_handle_irq(irq_find_mapping(f->domain, irq));
|
||||
generic_handle_domain_irq(f->domain, irq);
|
||||
} while (status);
|
||||
|
||||
out:
|
||||
|
@ -225,7 +225,7 @@ static void vic_handle_irq_cascaded(struct irq_desc *desc)
|
||||
|
||||
while ((stat = readl_relaxed(vic->base + VIC_IRQ_STATUS))) {
|
||||
hwirq = ffs(stat) - 1;
|
||||
generic_handle_irq(irq_find_mapping(vic->domain, hwirq));
|
||||
generic_handle_domain_irq(vic->domain, hwirq);
|
||||
}
|
||||
|
||||
chained_irq_exit(host_chip, desc);
|
||||
|
@ -110,20 +110,6 @@ static struct irq_chip intc_dev = {
|
||||
.irq_mask_ack = intc_mask_ack,
|
||||
};
|
||||
|
||||
static unsigned int xintc_get_irq_local(struct xintc_irq_chip *irqc)
|
||||
{
|
||||
unsigned int irq = 0;
|
||||
u32 hwirq;
|
||||
|
||||
hwirq = xintc_read(irqc, IVR);
|
||||
if (hwirq != -1U)
|
||||
irq = irq_find_mapping(irqc->root_domain, hwirq);
|
||||
|
||||
pr_debug("irq-xilinx: hwirq=%d, irq=%d\n", hwirq, irq);
|
||||
|
||||
return irq;
|
||||
}
|
||||
|
||||
unsigned int xintc_get_irq(void)
|
||||
{
|
||||
unsigned int irq = -1;
|
||||
@ -164,15 +150,16 @@ static void xil_intc_irq_handler(struct irq_desc *desc)
|
||||
{
|
||||
struct irq_chip *chip = irq_desc_get_chip(desc);
|
||||
struct xintc_irq_chip *irqc;
|
||||
u32 pending;
|
||||
|
||||
irqc = irq_data_get_irq_handler_data(&desc->irq_data);
|
||||
chained_irq_enter(chip, desc);
|
||||
do {
|
||||
pending = xintc_get_irq_local(irqc);
|
||||
if (pending == 0)
|
||||
u32 hwirq = xintc_read(irqc, IVR);
|
||||
|
||||
if (hwirq == -1U)
|
||||
break;
|
||||
generic_handle_irq(pending);
|
||||
|
||||
generic_handle_domain_irq(irqc->root_domain, hwirq);
|
||||
} while (true);
|
||||
chained_irq_exit(chip, desc);
|
||||
}
|
||||
|
@ -53,7 +53,6 @@ static void combiner_handle_irq(struct irq_desc *desc)
|
||||
chained_irq_enter(chip, desc);
|
||||
|
||||
for (reg = 0; reg < combiner->nregs; reg++) {
|
||||
int virq;
|
||||
int hwirq;
|
||||
u32 bit;
|
||||
u32 status;
|
||||
@ -70,10 +69,7 @@ static void combiner_handle_irq(struct irq_desc *desc)
|
||||
bit = __ffs(status);
|
||||
status &= ~(1 << bit);
|
||||
hwirq = irq_nr(reg, bit);
|
||||
virq = irq_find_mapping(combiner->domain, hwirq);
|
||||
if (virq > 0)
|
||||
generic_handle_irq(virq);
|
||||
|
||||
generic_handle_domain_irq(combiner->domain, hwirq);
|
||||
}
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user