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Merge remote branch 'intel/drm-intel-fixes' of /ssd/git/drm-next into drm-fixes
* 'intel/drm-intel-fixes' of /ssd/git/drm-next: drm/i915/bios: Reverse order of 100/120 Mhz SSC clocks agp/intel: Fix missed cached memory flags setting in i965_write_entry() drm/i915/sdvo: Only use the SDVO pin if it is in the valid range drm/i915/ringbuffer: Handle wrapping of the autoreported HEAD drm/i915/dp: Fix I2C/EDID handling with active DisplayPort to DVI converter
This commit is contained in:
commit
044102798d
@ -1192,12 +1192,19 @@ static void i9xx_chipset_flush(void)
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writel(1, intel_private.i9xx_flush_page);
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}
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static void i965_write_entry(dma_addr_t addr, unsigned int entry,
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static void i965_write_entry(dma_addr_t addr,
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unsigned int entry,
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unsigned int flags)
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{
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u32 pte_flags;
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pte_flags = I810_PTE_VALID;
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if (flags == AGP_USER_CACHED_MEMORY)
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pte_flags |= I830_PTE_SYSTEM_CACHED;
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/* Shift high bits down */
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addr |= (addr >> 28) & 0xf0;
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writel(addr | I810_PTE_VALID, intel_private.gtt + entry);
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writel(addr | pte_flags, intel_private.gtt + entry);
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}
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static bool gen6_check_flags(unsigned int flags)
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@ -270,7 +270,7 @@ parse_general_features(struct drm_i915_private *dev_priv,
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general->ssc_freq ? 66 : 48;
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else if (IS_GEN5(dev) || IS_GEN6(dev))
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dev_priv->lvds_ssc_freq =
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general->ssc_freq ? 100 : 120;
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general->ssc_freq ? 120 : 100;
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else
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dev_priv->lvds_ssc_freq =
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general->ssc_freq ? 100 : 96;
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@ -479,6 +479,7 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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uint16_t address = algo_data->address;
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uint8_t msg[5];
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uint8_t reply[2];
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unsigned retry;
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int msg_bytes;
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int reply_bytes;
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int ret;
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@ -513,14 +514,33 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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break;
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}
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for (;;) {
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ret = intel_dp_aux_ch(intel_dp,
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msg, msg_bytes,
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reply, reply_bytes);
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for (retry = 0; retry < 5; retry++) {
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ret = intel_dp_aux_ch(intel_dp,
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msg, msg_bytes,
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reply, reply_bytes);
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if (ret < 0) {
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DRM_DEBUG_KMS("aux_ch failed %d\n", ret);
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return ret;
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}
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switch (reply[0] & AUX_NATIVE_REPLY_MASK) {
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case AUX_NATIVE_REPLY_ACK:
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/* I2C-over-AUX Reply field is only valid
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* when paired with AUX ACK.
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*/
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break;
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case AUX_NATIVE_REPLY_NACK:
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DRM_DEBUG_KMS("aux_ch native nack\n");
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return -EREMOTEIO;
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case AUX_NATIVE_REPLY_DEFER:
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udelay(100);
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continue;
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default:
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DRM_ERROR("aux_ch invalid native reply 0x%02x\n",
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reply[0]);
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return -EREMOTEIO;
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}
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switch (reply[0] & AUX_I2C_REPLY_MASK) {
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case AUX_I2C_REPLY_ACK:
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if (mode == MODE_I2C_READ) {
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@ -528,17 +548,20 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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}
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return reply_bytes - 1;
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case AUX_I2C_REPLY_NACK:
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DRM_DEBUG_KMS("aux_ch nack\n");
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DRM_DEBUG_KMS("aux_i2c nack\n");
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return -EREMOTEIO;
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case AUX_I2C_REPLY_DEFER:
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DRM_DEBUG_KMS("aux_ch defer\n");
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DRM_DEBUG_KMS("aux_i2c defer\n");
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udelay(100);
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break;
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default:
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DRM_ERROR("aux_ch invalid reply 0x%02x\n", reply[0]);
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DRM_ERROR("aux_i2c invalid reply 0x%02x\n", reply[0]);
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return -EREMOTEIO;
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}
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}
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DRM_ERROR("too many retries, giving up\n");
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return -EREMOTEIO;
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}
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static int
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@ -696,20 +696,17 @@ int intel_wait_ring_buffer(struct drm_device *dev,
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drm_i915_private_t *dev_priv = dev->dev_private;
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u32 head;
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head = intel_read_status_page(ring, 4);
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if (head) {
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ring->head = head & HEAD_ADDR;
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ring->space = ring->head - (ring->tail + 8);
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if (ring->space < 0)
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ring->space += ring->size;
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if (ring->space >= n)
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return 0;
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}
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trace_i915_ring_wait_begin (dev);
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end = jiffies + 3 * HZ;
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do {
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ring->head = I915_READ_HEAD(ring) & HEAD_ADDR;
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/* If the reported head position has wrapped or hasn't advanced,
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* fallback to the slow and accurate path.
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*/
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head = intel_read_status_page(ring, 4);
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if (head < ring->actual_head)
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head = I915_READ_HEAD(ring);
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ring->actual_head = head;
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ring->head = head & HEAD_ADDR;
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ring->space = ring->head - (ring->tail + 8);
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if (ring->space < 0)
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ring->space += ring->size;
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@ -30,8 +30,9 @@ struct intel_ring_buffer {
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struct drm_device *dev;
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struct drm_gem_object *gem_object;
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unsigned int head;
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unsigned int tail;
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u32 actual_head;
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u32 head;
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u32 tail;
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int space;
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struct intel_hw_status_page status_page;
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@ -1908,9 +1908,12 @@ intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
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speed = mapping->i2c_speed;
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}
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sdvo->i2c = &dev_priv->gmbus[pin].adapter;
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intel_gmbus_set_speed(sdvo->i2c, speed);
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intel_gmbus_force_bit(sdvo->i2c, true);
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if (pin < GMBUS_NUM_PORTS) {
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sdvo->i2c = &dev_priv->gmbus[pin].adapter;
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intel_gmbus_set_speed(sdvo->i2c, speed);
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intel_gmbus_force_bit(sdvo->i2c, true);
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} else
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sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
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}
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static bool
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