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platform/x86: intel/pmc: Move variable declarations and definitions to header and core.c
Move the msr_map variable declaration to core.h and move the pmc_lpm_modes definition to core.c. This is a prepartory patch for redesigning the pmc core driver as the variables will be used in multiple PCH specific files. Cc: David E Box <david.e.box@linux.intel.com> Reviewed-by: "David E. Box" <david.e.box@linux.intel.com> Signed-off-by: Xi Pardee <xi.pardee@intel.com> Signed-off-by: "David E. Box" <david.e.box@linux.intel.com> Link: https://lore.kernel.org/r/20221114183257.2067662-3-gayatri.kammela@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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@ -35,8 +35,21 @@
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#define ACPI_S0IX_DSM_UUID "57a6512e-3979-4e9d-9708-ff13b2508972"
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#define ACPI_GET_LOW_MODE_REGISTERS 1
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/* Maximum number of modes supported by platfoms that has low power mode capability */
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const char *pmc_lpm_modes[] = {
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"S0i2.0",
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"S0i2.1",
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"S0i2.2",
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"S0i3.0",
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"S0i3.1",
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"S0i3.2",
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"S0i3.3",
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"S0i3.4",
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NULL
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};
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/* PKGC MSRs are common across Intel Core SoCs */
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static const struct pmc_bit_map msr_map[] = {
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const struct pmc_bit_map msr_map[] = {
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{"Package C2", MSR_PKG_C2_RESIDENCY},
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{"Package C3", MSR_PKG_C3_RESIDENCY},
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{"Package C6", MSR_PKG_C6_RESIDENCY},
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@ -237,17 +237,7 @@ enum ppfear_regs {
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#define ADL_LPM_STATUS_LATCH_EN_OFFSET 0x1704
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#define ADL_LPM_LIVE_STATUS_OFFSET 0x1764
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static const char *pmc_lpm_modes[] = {
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"S0i2.0",
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"S0i2.1",
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"S0i2.2",
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"S0i3.0",
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"S0i3.1",
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"S0i3.2",
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"S0i3.3",
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"S0i3.4",
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NULL
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};
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extern const char *pmc_lpm_modes[];
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struct pmc_bit_map {
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const char *name;
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@ -346,6 +336,7 @@ struct pmc_dev {
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void (*core_configure)(struct pmc_dev *pmcdev);
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};
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extern const struct pmc_bit_map msr_map[];
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void spt_core_init(struct pmc_dev *pmcdev);
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void cnp_core_init(struct pmc_dev *pmcdev);
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void icl_core_init(struct pmc_dev *pmcdev);
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