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s390/crc32le: convert to C
Convert CRC-32 LE variants to C. Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
This commit is contained in:
Heiko Carstens
parent
c59bf4de01
commit
03325e9b64
@ -31,10 +31,6 @@ struct crc_desc_ctx {
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u32 crc;
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};
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/* Prototypes for functions in assembly files */
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u32 crc32_le_vgfm_16(u32 crc, unsigned char const *buf, size_t size);
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u32 crc32c_le_vgfm_16(u32 crc, unsigned char const *buf, size_t size);
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/*
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* DEFINE_CRC32_VX() - Define a CRC-32 function using the vector extension
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*
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@ -6,5 +6,7 @@
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#include <linux/types.h>
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u32 crc32_be_vgfm_16(u32 crc, unsigned char const *buf, size_t size);
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u32 crc32_le_vgfm_16(u32 crc, unsigned char const *buf, size_t size);
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u32 crc32c_le_vgfm_16(u32 crc, unsigned char const *buf, size_t size);
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#endif /* _CRC32_VX_S390_H */
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@ -13,20 +13,17 @@
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* Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
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*/
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#include <linux/linkage.h>
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#include <asm/nospec-insn.h>
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#include <asm/fpu-insn.h>
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#include <linux/types.h>
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#include <asm/fpu.h>
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#include "crc32-vx.h"
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/* Vector register range containing CRC-32 constants */
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#define CONST_PERM_LE2BE %v9
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#define CONST_R2R1 %v10
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#define CONST_R4R3 %v11
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#define CONST_R5 %v12
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#define CONST_RU_POLY %v13
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#define CONST_CRC_POLY %v14
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.data
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.balign 8
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#define CONST_PERM_LE2BE 9
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#define CONST_R2R1 10
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#define CONST_R4R3 11
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#define CONST_R5 12
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#define CONST_RU_POLY 13
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#define CONST_CRC_POLY 14
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/*
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* The CRC-32 constant block contains reduction constants to fold and
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@ -59,64 +56,43 @@
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* P'(x) = 0x82F63B78
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*/
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SYM_DATA_START_LOCAL(constants_CRC_32_LE)
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.octa 0x0F0E0D0C0B0A09080706050403020100 # BE->LE mask
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.quad 0x1c6e41596, 0x154442bd4 # R2, R1
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.quad 0x0ccaa009e, 0x1751997d0 # R4, R3
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.octa 0x163cd6124 # R5
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.octa 0x1F7011641 # u'
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.octa 0x1DB710641 # P'(x) << 1
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SYM_DATA_END(constants_CRC_32_LE)
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static unsigned long constants_CRC_32_LE[] = {
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0x0f0e0d0c0b0a0908, 0x0706050403020100, /* BE->LE mask */
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0x1c6e41596, 0x154442bd4, /* R2, R1 */
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0x0ccaa009e, 0x1751997d0, /* R4, R3 */
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0x0, 0x163cd6124, /* R5 */
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0x0, 0x1f7011641, /* u' */
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0x0, 0x1db710641 /* P'(x) << 1 */
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};
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SYM_DATA_START_LOCAL(constants_CRC_32C_LE)
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.octa 0x0F0E0D0C0B0A09080706050403020100 # BE->LE mask
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.quad 0x09e4addf8, 0x740eef02 # R2, R1
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.quad 0x14cd00bd6, 0xf20c0dfe # R4, R3
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.octa 0x0dd45aab8 # R5
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.octa 0x0dea713f1 # u'
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.octa 0x105ec76f0 # P'(x) << 1
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SYM_DATA_END(constants_CRC_32C_LE)
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static unsigned long constants_CRC_32C_LE[] = {
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0x0f0e0d0c0b0a0908, 0x0706050403020100, /* BE->LE mask */
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0x09e4addf8, 0x740eef02, /* R2, R1 */
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0x14cd00bd6, 0xf20c0dfe, /* R4, R3 */
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0x0, 0x0dd45aab8, /* R5 */
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0x0, 0x0dea713f1, /* u' */
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0x0, 0x105ec76f0 /* P'(x) << 1 */
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};
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.previous
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GEN_BR_THUNK %r14
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.text
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/*
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* The CRC-32 functions use these calling conventions:
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*
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* Parameters:
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*
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* %r2: Initial CRC value, typically ~0; and final CRC (return) value.
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* %r3: Input buffer pointer, performance might be improved if the
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* buffer is on a doubleword boundary.
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* %r4: Length of the buffer, must be 64 bytes or greater.
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/**
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* crc32_le_vgfm_generic - Compute CRC-32 (LE variant) with vector registers
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* @crc: Initial CRC value, typically ~0.
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* @buf: Input buffer pointer, performance might be improved if the
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* buffer is on a doubleword boundary.
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* @size: Size of the buffer, must be 64 bytes or greater.
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* @constants: CRC-32 constant pool base pointer.
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*
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* Register usage:
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*
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* %r5: CRC-32 constant pool base pointer.
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* V0: Initial CRC value and intermediate constants and results.
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* V1..V4: Data for CRC computation.
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* V5..V8: Next data chunks that are fetched from the input buffer.
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* V9: Constant for BE->LE conversion and shift operations
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*
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* V0: Initial CRC value and intermediate constants and results.
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* V1..V4: Data for CRC computation.
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* V5..V8: Next data chunks that are fetched from the input buffer.
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* V9: Constant for BE->LE conversion and shift operations
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* V10..V14: CRC-32 constants.
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*/
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SYM_FUNC_START(crc32_le_vgfm_16)
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larl %r5,constants_CRC_32_LE
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j crc32_le_vgfm_generic
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SYM_FUNC_END(crc32_le_vgfm_16)
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SYM_FUNC_START(crc32c_le_vgfm_16)
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larl %r5,constants_CRC_32C_LE
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j crc32_le_vgfm_generic
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SYM_FUNC_END(crc32c_le_vgfm_16)
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SYM_FUNC_START(crc32_le_vgfm_generic)
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static u32 crc32_le_vgfm_generic(u32 crc, unsigned char const *buf, size_t size, unsigned long *constants)
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{
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/* Load CRC-32 constants */
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VLM CONST_PERM_LE2BE,CONST_CRC_POLY,0,%r5
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fpu_vlm(CONST_PERM_LE2BE, CONST_CRC_POLY, constants);
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/*
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* Load the initial CRC value.
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@ -125,90 +101,73 @@ SYM_FUNC_START(crc32_le_vgfm_generic)
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* vector register and is later XORed with the LSB portion
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* of the loaded input data.
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*/
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VZERO %v0 /* Clear V0 */
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VLVGF %v0,%r2,3 /* Load CRC into rightmost word */
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fpu_vzero(0); /* Clear V0 */
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fpu_vlvgf(0, crc, 3); /* Load CRC into rightmost word */
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/* Load a 64-byte data chunk and XOR with CRC */
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VLM %v1,%v4,0,%r3 /* 64-bytes into V1..V4 */
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VPERM %v1,%v1,%v1,CONST_PERM_LE2BE
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VPERM %v2,%v2,%v2,CONST_PERM_LE2BE
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VPERM %v3,%v3,%v3,CONST_PERM_LE2BE
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VPERM %v4,%v4,%v4,CONST_PERM_LE2BE
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fpu_vlm(1, 4, buf);
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fpu_vperm(1, 1, 1, CONST_PERM_LE2BE);
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fpu_vperm(2, 2, 2, CONST_PERM_LE2BE);
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fpu_vperm(3, 3, 3, CONST_PERM_LE2BE);
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fpu_vperm(4, 4, 4, CONST_PERM_LE2BE);
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VX %v1,%v0,%v1 /* V1 ^= CRC */
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aghi %r3,64 /* BUF = BUF + 64 */
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aghi %r4,-64 /* LEN = LEN - 64 */
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fpu_vx(1, 0, 1); /* V1 ^= CRC */
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buf += 64;
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size -= 64;
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cghi %r4,64
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jl .Lless_than_64bytes
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while (size >= 64) {
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fpu_vlm(5, 8, buf);
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fpu_vperm(5, 5, 5, CONST_PERM_LE2BE);
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fpu_vperm(6, 6, 6, CONST_PERM_LE2BE);
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fpu_vperm(7, 7, 7, CONST_PERM_LE2BE);
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fpu_vperm(8, 8, 8, CONST_PERM_LE2BE);
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/*
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* Perform a GF(2) multiplication of the doublewords in V1 with
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* the R1 and R2 reduction constants in V0. The intermediate
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* result is then folded (accumulated) with the next data chunk
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* in V5 and stored in V1. Repeat this step for the register
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* contents in V2, V3, and V4 respectively.
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*/
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fpu_vgfmag(1, CONST_R2R1, 1, 5);
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fpu_vgfmag(2, CONST_R2R1, 2, 6);
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fpu_vgfmag(3, CONST_R2R1, 3, 7);
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fpu_vgfmag(4, CONST_R2R1, 4, 8);
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buf += 64;
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size -= 64;
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}
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.Lfold_64bytes_loop:
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/* Load the next 64-byte data chunk into V5 to V8 */
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VLM %v5,%v8,0,%r3
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VPERM %v5,%v5,%v5,CONST_PERM_LE2BE
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VPERM %v6,%v6,%v6,CONST_PERM_LE2BE
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VPERM %v7,%v7,%v7,CONST_PERM_LE2BE
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VPERM %v8,%v8,%v8,CONST_PERM_LE2BE
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/*
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* Perform a GF(2) multiplication of the doublewords in V1 with
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* the R1 and R2 reduction constants in V0. The intermediate result
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* is then folded (accumulated) with the next data chunk in V5 and
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* stored in V1. Repeat this step for the register contents
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* in V2, V3, and V4 respectively.
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*/
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VGFMAG %v1,CONST_R2R1,%v1,%v5
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VGFMAG %v2,CONST_R2R1,%v2,%v6
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VGFMAG %v3,CONST_R2R1,%v3,%v7
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VGFMAG %v4,CONST_R2R1,%v4,%v8
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aghi %r3,64 /* BUF = BUF + 64 */
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aghi %r4,-64 /* LEN = LEN - 64 */
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cghi %r4,64
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jnl .Lfold_64bytes_loop
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.Lless_than_64bytes:
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/*
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* Fold V1 to V4 into a single 128-bit value in V1. Multiply V1 with R3
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* and R4 and accumulating the next 128-bit chunk until a single 128-bit
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* value remains.
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*/
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VGFMAG %v1,CONST_R4R3,%v1,%v2
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VGFMAG %v1,CONST_R4R3,%v1,%v3
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VGFMAG %v1,CONST_R4R3,%v1,%v4
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fpu_vgfmag(1, CONST_R4R3, 1, 2);
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fpu_vgfmag(1, CONST_R4R3, 1, 3);
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fpu_vgfmag(1, CONST_R4R3, 1, 4);
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cghi %r4,16
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jl .Lfinal_fold
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while (size >= 16) {
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fpu_vl(2, buf);
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fpu_vperm(2, 2, 2, CONST_PERM_LE2BE);
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fpu_vgfmag(1, CONST_R4R3, 1, 2);
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buf += 16;
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size -= 16;
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}
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.Lfold_16bytes_loop:
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VL %v2,0,,%r3 /* Load next data chunk */
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VPERM %v2,%v2,%v2,CONST_PERM_LE2BE
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VGFMAG %v1,CONST_R4R3,%v1,%v2 /* Fold next data chunk */
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aghi %r3,16
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aghi %r4,-16
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cghi %r4,16
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jnl .Lfold_16bytes_loop
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.Lfinal_fold:
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/*
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* Set up a vector register for byte shifts. The shift value must
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* be loaded in bits 1-4 in byte element 7 of a vector register.
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* Shift by 8 bytes: 0x40
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* Shift by 4 bytes: 0x20
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*/
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VLEIB %v9,0x40,7
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fpu_vleib(9, 0x40, 7);
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/*
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* Prepare V0 for the next GF(2) multiplication: shift V0 by 8 bytes
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* to move R4 into the rightmost doubleword and set the leftmost
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* doubleword to 0x1.
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*/
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VSRLB %v0,CONST_R4R3,%v9
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VLEIG %v0,1,0
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fpu_vsrlb(0, CONST_R4R3, 9);
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fpu_vleig(0, 1, 0);
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/*
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* Compute GF(2) product of V1 and V0. The rightmost doubleword
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@ -216,7 +175,7 @@ SYM_FUNC_START(crc32_le_vgfm_generic)
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* multiplied by 0x1 and is then XORed with rightmost product.
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* Implicitly, the intermediate leftmost product becomes padded
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*/
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VGFMG %v1,%v0,%v1
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fpu_vgfmg(1, 0, 1);
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/*
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* Now do the final 32-bit fold by multiplying the rightmost word
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@ -231,10 +190,10 @@ SYM_FUNC_START(crc32_le_vgfm_generic)
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* rightmost doubleword and the leftmost doubleword is zero to ignore
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* the leftmost product of V1.
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*/
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VLEIB %v9,0x20,7 /* Shift by words */
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VSRLB %v2,%v1,%v9 /* Store remaining bits in V2 */
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VUPLLF %v1,%v1 /* Split rightmost doubleword */
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VGFMAG %v1,CONST_R5,%v1,%v2 /* V1 = (V1 * R5) XOR V2 */
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fpu_vleib(9, 0x20, 7); /* Shift by words */
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fpu_vsrlb(2, 1, 9); /* Store remaining bits in V2 */
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fpu_vupllf(1, 1); /* Split rightmost doubleword */
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fpu_vgfmag(1, CONST_R5, 1, 2); /* V1 = (V1 * R5) XOR V2 */
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/*
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* Apply a Barret reduction to compute the final 32-bit CRC value.
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@ -256,20 +215,26 @@ SYM_FUNC_START(crc32_le_vgfm_generic)
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*/
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/* T1(x) = floor( R(x) / x^32 ) GF2MUL u */
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VUPLLF %v2,%v1
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VGFMG %v2,CONST_RU_POLY,%v2
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fpu_vupllf(2, 1);
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fpu_vgfmg(2, CONST_RU_POLY, 2);
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/*
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* Compute the GF(2) product of the CRC polynomial with T1(x) in
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* V2 and XOR the intermediate result, T2(x), with the value in V1.
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* The final result is stored in word element 2 of V2.
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*/
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VUPLLF %v2,%v2
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VGFMAG %v2,CONST_CRC_POLY,%v2,%v1
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fpu_vupllf(2, 2);
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fpu_vgfmag(2, CONST_CRC_POLY, 2, 1);
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.Ldone:
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VLGVF %r2,%v2,2
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BR_EX %r14
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SYM_FUNC_END(crc32_le_vgfm_generic)
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return fpu_vlgvf(2, 2);
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}
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.previous
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u32 crc32_le_vgfm_16(u32 crc, unsigned char const *buf, size_t size)
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{
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return crc32_le_vgfm_generic(crc, buf, size, &constants_CRC_32_LE[0]);
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}
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u32 crc32c_le_vgfm_16(u32 crc, unsigned char const *buf, size_t size)
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{
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return crc32_le_vgfm_generic(crc, buf, size, &constants_CRC_32C_LE[0]);
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}
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