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V4L/DVB (8332): cx18: Suport external reset of the Z8F0811 IR controller on HVR-1600 for lirc
cx18: added in cx18_ir_reset_gpio function for lirc_pvr150 like module. Also added the ability to reset the IR chip via ioctl like ivtv. This needs the mutex to protect gpio_dir and gpio_val in struct cx18 as gpio changes can come from a few different asynchronous sources now. Signed-off-by: Andy Walls <awalls@radix.net> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
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@ -88,6 +88,7 @@ static const struct cx18_card cx18_card_hvr1600_esmt = {
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.active_lo_mask = 0x3001,
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.msecs_asserted = 10,
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.msecs_recovery = 40,
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.ir_reset_mask = 0x0001,
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},
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.i2c = &cx18_i2c_std,
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};
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@ -133,6 +134,7 @@ static const struct cx18_card cx18_card_hvr1600_samsung = {
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.active_lo_mask = 0x3001,
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.msecs_asserted = 10,
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.msecs_recovery = 40,
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.ir_reset_mask = 0x0001,
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},
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.i2c = &cx18_i2c_std,
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};
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@ -83,6 +83,7 @@ struct cx18_gpio_i2c_slave_reset {
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u32 active_hi_mask; /* GPIO outputs that reset i2c chips when high */
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int msecs_asserted; /* time period reset must remain asserted */
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int msecs_recovery; /* time after deassert for chips to be ready */
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u32 ir_reset_mask; /* GPIO to reset the Zilog Z8F0811 IR contoller */
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};
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struct cx18_gpio_audio_input { /* select tuner/line in input */
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@ -83,6 +83,47 @@ void cx18_reset_i2c_slaves_gpio(struct cx18 *cx)
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mutex_unlock(&cx->gpio_lock);
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}
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void cx18_reset_ir_gpio(void *data)
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{
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struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
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const struct cx18_gpio_i2c_slave_reset *p;
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p = &cx->card->gpio_i2c_slave_reset;
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if (p->ir_reset_mask == 0)
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return;
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CX18_DEBUG_INFO("Resetting IR microcontroller\n");
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/*
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Assert timing for the Z8F0811 on HVR-1600 boards:
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1. Assert RESET for min of 4 clock cycles at 18.432 MHz to initiate
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2. Reset then takes 66 WDT cycles at 10 kHz + 16 xtal clock cycles
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(6,601,085 nanoseconds ~= 7 milliseconds)
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3. DBG pin must be high before chip exits reset for normal operation.
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DBG is open drain and hopefully pulled high since we don't
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normally drive it (GPIO 1?) for the HVR-1600
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4. Z8F0811 won't exit reset until RESET is deasserted
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*/
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mutex_lock(&cx->gpio_lock);
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cx->gpio_val = cx->gpio_val & ~p->ir_reset_mask;
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gpio_write(cx);
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mutex_unlock(&cx->gpio_lock);
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schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_asserted));
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/*
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Zilog comes out of reset, loads reset vector address and executes
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from there. Required recovery delay unknown.
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*/
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mutex_lock(&cx->gpio_lock);
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cx->gpio_val = cx->gpio_val | p->ir_reset_mask;
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gpio_write(cx);
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mutex_unlock(&cx->gpio_lock);
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schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_recovery));
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}
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EXPORT_SYMBOL(cx18_reset_ir_gpio);
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/* This symbol is exported for use by an infrared module for the IR-blaster */
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void cx18_gpio_init(struct cx18 *cx)
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{
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mutex_lock(&cx->gpio_lock);
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@ -22,5 +22,6 @@
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void cx18_gpio_init(struct cx18 *cx);
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void cx18_reset_i2c_slaves_gpio(struct cx18 *cx);
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void cx18_reset_ir_gpio(void *data);
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int cx18_reset_tuner_gpio(void *dev, int cmd, int value);
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int cx18_gpio(struct cx18 *cx, unsigned int command, void *arg);
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@ -754,6 +754,15 @@ static int cx18_default(struct file *file, void *fh, int cmd, void *arg)
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cx18_audio_set_route(cx, route);
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break;
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}
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case VIDIOC_INT_RESET: {
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u32 val = *(u32 *)arg;
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if ((val == 0) || (val & 0x01))
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cx18_reset_ir_gpio(&cx->i2c_algo_cb_data[0]);
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break;
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}
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default:
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return -EINVAL;
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}
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