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drm/amd/powerplay: postpone operations not required for hw setup to late_init
So that we do not need to perform those unnecessary operations again on resume. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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792f80d192
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02cf91c113
@ -769,10 +769,36 @@ static int smu_late_init(void *handle)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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struct smu_context *smu = &adev->smu;
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int ret = 0;
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if (!smu->pm_enabled)
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return 0;
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ret = smu_set_default_od_settings(smu);
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if (ret)
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return ret;
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/*
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* Set initialized values (get from vbios) to dpm tables context such as
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* gfxclk, memclk, dcefclk, and etc. And enable the DPM feature for each
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* type of clks.
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*/
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ret = smu_populate_smc_tables(smu);
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if (ret)
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return ret;
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ret = smu_init_max_sustainable_clocks(smu);
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if (ret)
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return ret;
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ret = smu_populate_umd_state_clk(smu);
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if (ret)
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return ret;
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ret = smu_get_power_limit(smu, &smu->default_power_limit, false, false);
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if (ret)
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return ret;
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smu_get_unique_id(smu);
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smu_handle_task(&adev->smu,
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@ -1178,39 +1204,10 @@ static int smu_smc_table_hw_init(struct smu_context *smu,
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if (ret)
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return ret;
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/*
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* Set initialized values (get from vbios) to dpm tables context such as
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* gfxclk, memclk, dcefclk, and etc. And enable the DPM feature for each
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* type of clks.
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*/
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if (initialize) {
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ret = smu_populate_smc_tables(smu);
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if (ret)
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return ret;
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ret = smu_init_max_sustainable_clocks(smu);
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if (ret)
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return ret;
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}
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ret = smu_override_pcie_parameters(smu);
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if (ret)
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return ret;
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ret = smu_set_default_od_settings(smu);
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if (ret)
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return ret;
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if (initialize) {
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ret = smu_populate_umd_state_clk(smu);
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if (ret)
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return ret;
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ret = smu_get_power_limit(smu, &smu->default_power_limit, false, false);
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if (ret)
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return ret;
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}
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/*
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* Set PMSTATUSLOG table bo address with SetToolsDramAddr MSG for tools.
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*/
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@ -1428,6 +1425,8 @@ int smu_reset(struct smu_context *smu)
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if (ret)
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return ret;
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ret = smu_late_init(adev);
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return ret;
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}
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