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ARM: Kirkwood: Fix the internal register ranges translation
Although the internal register window size is 1 MiB, the previous ranges translation for the internal register space had a size of 0x4000000. This was done to allow the crypto and nand node to access the corresponding 'sram' and 'nand' decoding windows. In order to describe the hardware more accurately, we declare the real 1 MiB internal register space in the ranges, and add a translation entry for the nand node to access the 'nand' window. This commit will make future improvements on the MBus DT binding easier. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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@ -30,7 +30,8 @@
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ocp@f1000000 {
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compatible = "simple-bus";
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ranges = <0x00000000 0xf1000000 0x4000000
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ranges = <0x00000000 0xf1000000 0x0100000
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0xf4000000 0xf4000000 0x0000400
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0xf5000000 0xf5000000 0x0000400>;
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#address-cells = <1>;
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#size-cells = <1>;
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@ -163,7 +164,7 @@
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ale = <1>;
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bank-width = <1>;
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compatible = "marvell,orion-nand";
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reg = <0x3000000 0x400>;
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reg = <0xf4000000 0x400>;
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chip-delay = <25>;
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/* set partition map and/or chip-delay in board dts */
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clocks = <&gate_clk 7>;
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