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riscv: sophgo: dts: add mmc controllers for SG2042 SoC

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SG2042 has two MMC controller, one for emmc, another for sd-card.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/03ac9ec9c23bbe4c3b30271e76537bdbe5638665.1722847198.git.unicorn_wang@outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
This commit is contained in:
Chen Wang 2024-08-05 17:19:43 +08:00
parent c8eb04aecd
commit 014b839f79
2 changed files with 45 additions and 0 deletions
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17
arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts
View File

@ -26,6 +26,23 @@
clock-frequency = <25000000>;
};
&emmc {
bus-width = <4>;
no-sdio;
no-sd;
non-removable;
wp-inverted;
status = "okay";
};
&sd {
bus-width = <4>;
no-sdio;
no-mmc;
wp-inverted;
status = "okay";
};
&uart0 {
status = "okay";
};

28
arch/riscv/boot/dts/sophgo/sg2042.dtsi
View File

@ -451,5 +451,33 @@
resets = <&rstgen RST_UART0>;
status = "disabled";
};
emmc: mmc@704002a000 {
compatible = "sophgo,sg2042-dwcmshc";
reg = <0x70 0x4002a000 0x0 0x1000>;
interrupt-parent = <&intc>;
interrupts = <134 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkgen GATE_CLK_EMMC_100M>,
<&clkgen GATE_CLK_AXI_EMMC>,
<&clkgen GATE_CLK_100K_EMMC>;
clock-names = "core",
"bus",
"timer";
status = "disabled";
};
sd: mmc@704002b000 {
compatible = "sophgo,sg2042-dwcmshc";
reg = <0x70 0x4002b000 0x0 0x1000>;
interrupt-parent = <&intc>;
interrupts = <136 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkgen GATE_CLK_SD_100M>,
<&clkgen GATE_CLK_AXI_SD>,
<&clkgen GATE_CLK_100K_SD>;
clock-names = "core",
"bus",
"timer";
status = "disabled";
};
};
};