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clk: imx: Rework all clk_hw_register_mux wrappers

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Instead of having multiple inline functions that were calling
clk_hw_register_mux, implement a generic low-level __imx_clk_hw_mux
and implement the rest as macros that pass on as arguments whatever
is needed in each case.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/1631521490-17171-6-git-send-email-abel.vesa@nxp.com
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Abel Vesa 2021-09-13 11:24:47 +03:00
parent 66173dbe9f
commit 004989ab28
1 changed files with 22 additions and 46 deletions
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68
drivers/clk/imx/clk.h
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@ -121,6 +121,9 @@ extern struct imx_pll14xx_clk imx_1443x_dram_pll;
#define imx_clk_pllv2(name, parent, base) \ #define imx_clk_pllv2(name, parent, base) \
to_clk(imx_clk_hw_pllv2(name, parent, base)) to_clk(imx_clk_hw_pllv2(name, parent, base))
#define imx_clk_mux_flags(name, reg, shift, width, parents, num_parents, flags) \
to_clk(imx_clk_hw_mux_flags(name, reg, shift, width, parents, num_parents, flags))
#define imx_clk_hw_gate(name, parent, reg, shift) \ #define imx_clk_hw_gate(name, parent, reg, shift) \
imx_clk_hw_gate_flags(name, parent, reg, shift, 0) imx_clk_hw_gate_flags(name, parent, reg, shift, 0)
@ -157,6 +160,21 @@ extern struct imx_pll14xx_clk imx_1443x_dram_pll;
#define imx_clk_hw_gate4_flags(name, parent, reg, shift, flags) \ #define imx_clk_hw_gate4_flags(name, parent, reg, shift, flags) \
imx_clk_hw_gate2_flags(name, parent, reg, shift, flags | CLK_OPS_PARENT_ENABLE) imx_clk_hw_gate2_flags(name, parent, reg, shift, flags | CLK_OPS_PARENT_ENABLE)
#define imx_clk_hw_mux2(name, reg, shift, width, parents, num_parents) \
imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, 0)
#define imx_clk_hw_mux(name, reg, shift, width, parents, num_parents) \
__imx_clk_hw_mux(name, reg, shift, width, parents, num_parents, 0, 0)
#define imx_clk_hw_mux_flags(name, reg, shift, width, parents, num_parents, flags) \
__imx_clk_hw_mux(name, reg, shift, width, parents, num_parents, flags, 0)
#define imx_clk_hw_mux_ldb(name, reg, shift, width, parents, num_parents) \
__imx_clk_hw_mux(name, reg, shift, width, parents, num_parents, CLK_SET_RATE_PARENT, CLK_MUX_READ_ONLY)
#define imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \
__imx_clk_hw_mux(name, reg, shift, width, parents, num_parents, flags | CLK_OPS_PARENT_ENABLE, 0)
struct clk_hw *imx_dev_clk_hw_pll14xx(struct device *dev, const char *name, struct clk_hw *imx_dev_clk_hw_pll14xx(struct device *dev, const char *name,
const char *parent_name, void __iomem *base, const char *parent_name, void __iomem *base,
const struct imx_pll14xx_clk *pll_clk); const struct imx_pll14xx_clk *pll_clk);
@ -278,15 +296,6 @@ static inline struct clk_hw *imx_clk_hw_fixed(const char *name, int rate)
return clk_hw_register_fixed_rate(NULL, name, NULL, 0, rate); return clk_hw_register_fixed_rate(NULL, name, NULL, 0, rate);
} }
static inline struct clk_hw *imx_clk_hw_mux_ldb(const char *name, void __iomem *reg,
u8 shift, u8 width, const char * const *parents,
int num_parents)
{
return clk_hw_register_mux(NULL, name, parents, num_parents,
CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT, reg,
shift, width, CLK_MUX_READ_ONLY, &imx_ccm_lock);
}
static inline struct clk_hw *imx_clk_hw_fixed_factor(const char *name, static inline struct clk_hw *imx_clk_hw_fixed_factor(const char *name,
const char *parent, unsigned int mult, unsigned int div) const char *parent, unsigned int mult, unsigned int div)
{ {
@ -338,46 +347,13 @@ static inline struct clk_hw *__imx_clk_hw_gate2(const char *name, const char *pa
shift, cgr_val, 0x3, 0, &imx_ccm_lock, share_count); shift, cgr_val, 0x3, 0, &imx_ccm_lock, share_count);
} }
static inline struct clk_hw *imx_clk_hw_mux(const char *name, void __iomem *reg, static inline struct clk_hw *__imx_clk_hw_mux(const char *name, void __iomem *reg,
u8 shift, u8 width, const char * const *parents, u8 shift, u8 width, const char * const *parents,
int num_parents) int num_parents, unsigned long flags, unsigned long clk_mux_flags)
{ {
return clk_hw_register_mux(NULL, name, parents, num_parents, return clk_hw_register_mux(NULL, name, parents, num_parents,
CLK_SET_RATE_NO_REPARENT, reg, shift, flags | CLK_SET_RATE_NO_REPARENT, reg, shift,
width, 0, &imx_ccm_lock); width, clk_mux_flags, &imx_ccm_lock);
}
static inline struct clk_hw *imx_clk_hw_mux2(const char *name, void __iomem *reg,
u8 shift, u8 width,
const char * const *parents,
int num_parents)
{
return clk_hw_register_mux(NULL, name, parents, num_parents,
CLK_SET_RATE_NO_REPARENT |
CLK_OPS_PARENT_ENABLE,
reg, shift, width, 0, &imx_ccm_lock);
}
static inline struct clk_hw *imx_clk_hw_mux2_flags(const char *name,
void __iomem *reg, u8 shift, u8 width,
const char * const *parents,
int num_parents, unsigned long flags)
{
return clk_hw_register_mux(NULL, name, parents, num_parents,
flags | CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
reg, shift, width, 0, &imx_ccm_lock);
}
static inline struct clk_hw *imx_clk_hw_mux_flags(const char *name,
void __iomem *reg, u8 shift,
u8 width,
const char * const *parents,
int num_parents,
unsigned long flags)
{
return clk_hw_register_mux(NULL, name, parents, num_parents,
flags | CLK_SET_RATE_NO_REPARENT,
reg, shift, width, 0, &imx_ccm_lock);
} }
struct clk_hw *imx_clk_hw_cpu(const char *name, const char *parent_name, struct clk_hw *imx_clk_hw_cpu(const char *name, const char *parent_name,