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V4L/DVB: Fix bad whitespacing
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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6721b51ece
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@ -125,12 +125,12 @@ static const struct stb0899_s1_reg az6027_stb0899_s1_init_3[] = {
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{ STB0899_RCOMPC , 0xc9 },
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{ STB0899_AGC1CN , 0x01 },
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{ STB0899_AGC1REF , 0x10 },
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{ STB0899_RTC , 0x23 },
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{ STB0899_RTC , 0x23 },
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{ STB0899_TMGCFG , 0x4e },
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{ STB0899_AGC2REF , 0x34 },
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{ STB0899_TLSR , 0x84 },
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{ STB0899_CFD , 0xf7 },
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{ STB0899_ACLC , 0x87 },
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{ STB0899_ACLC , 0x87 },
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{ STB0899_BCLC , 0x94 },
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{ STB0899_EQON , 0x41 },
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{ STB0899_LDT , 0xf1 },
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@ -183,10 +183,10 @@ static const struct stb0899_s1_reg az6027_stb0899_s1_init_3[] = {
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{ STB0899_ECNT3M , 0x0a },
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{ STB0899_ECNT3L , 0xad },
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{ STB0899_FECAUTO1 , 0x06 },
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{ STB0899_FECM , 0x01 },
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{ STB0899_FECM , 0x01 },
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{ STB0899_VTH12 , 0xb0 },
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{ STB0899_VTH23 , 0x7a },
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{ STB0899_VTH34 , 0x58 },
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{ STB0899_VTH34 , 0x58 },
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{ STB0899_VTH56 , 0x38 },
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{ STB0899_VTH67 , 0x34 },
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{ STB0899_VTH78 , 0x24 },
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@ -195,7 +195,7 @@ static const struct stb0899_s1_reg az6027_stb0899_s1_init_3[] = {
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{ STB0899_RSULC , 0xb1 }, /* DVB = 0xb1, DSS = 0xa1 */
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{ STB0899_TSULC , 0x42 },
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{ STB0899_RSLLC , 0x41 },
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{ STB0899_TSLPL , 0x12 },
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{ STB0899_TSLPL , 0x12 },
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{ STB0899_TSCFGH , 0x0c },
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{ STB0899_TSCFGM , 0x00 },
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{ STB0899_TSCFGL , 0x00 },
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@ -18,7 +18,7 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __ATBM8830_PRIV_H
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#define __ATBM8830_PRIV_H
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@ -136,12 +136,12 @@ static const struct stb0899_s1_reg vp1041_stb0899_s1_init_3[] = {
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{ STB0899_RCOMPC , 0xc9 },
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{ STB0899_AGC1CN , 0x01 },
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{ STB0899_AGC1REF , 0x10 },
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{ STB0899_RTC , 0x23 },
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{ STB0899_RTC , 0x23 },
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{ STB0899_TMGCFG , 0x4e },
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{ STB0899_AGC2REF , 0x34 },
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{ STB0899_TLSR , 0x84 },
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{ STB0899_CFD , 0xf7 },
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{ STB0899_ACLC , 0x87 },
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{ STB0899_ACLC , 0x87 },
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{ STB0899_BCLC , 0x94 },
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{ STB0899_EQON , 0x41 },
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{ STB0899_LDT , 0xf1 },
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@ -194,10 +194,10 @@ static const struct stb0899_s1_reg vp1041_stb0899_s1_init_3[] = {
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{ STB0899_ECNT3M , 0x0a },
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{ STB0899_ECNT3L , 0xad },
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{ STB0899_FECAUTO1 , 0x06 },
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{ STB0899_FECM , 0x01 },
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{ STB0899_FECM , 0x01 },
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{ STB0899_VTH12 , 0xb0 },
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{ STB0899_VTH23 , 0x7a },
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{ STB0899_VTH34 , 0x58 },
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{ STB0899_VTH34 , 0x58 },
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{ STB0899_VTH56 , 0x38 },
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{ STB0899_VTH67 , 0x34 },
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{ STB0899_VTH78 , 0x24 },
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@ -206,7 +206,7 @@ static const struct stb0899_s1_reg vp1041_stb0899_s1_init_3[] = {
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{ STB0899_RSULC , 0xb1 }, /* DVB = 0xb1, DSS = 0xa1 */
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{ STB0899_TSULC , 0x42 },
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{ STB0899_RSLLC , 0x41 },
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{ STB0899_TSLPL , 0x12 },
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{ STB0899_TSLPL , 0x12 },
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{ STB0899_TSCFGH , 0x0c },
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{ STB0899_TSCFGM , 0x00 },
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{ STB0899_TSCFGL , 0x00 },
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@ -158,7 +158,7 @@
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/* gain - offset masks */
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#define GAIN_INTEGER_SHIFT 9
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#define OFFSET_MASK 0xFFF
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#define OFFSET_MASK 0xFFF
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#define GAIN_SDRAM_EN_SHIFT 12
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#define GAIN_IPIPE_EN_SHIFT 13
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#define GAIN_H3A_EN_SHIFT 14
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@ -709,7 +709,7 @@ static void setexposure(struct gspca_dev *gspca_dev)
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/* 'val' is one byte and represents half of the exposure value we are
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* going to set into registers, a two bytes value:
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*
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*
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* MSB: ((u16) val << 1) >> 8 == val >> 7
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* LSB: ((u16) val << 1) & 0xff == val << 1
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*/
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@ -59,9 +59,9 @@ static const struct ov9640_reg ov9640_regs_dflt[] = {
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* COM12 |= OV9640_COM12_YUV_AVG
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*
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* for RGB, alter the following registers:
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* COM7 |= OV9640_COM7_RGB
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* COM13 |= OV9640_COM13_RGB_AVG
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* COM15 |= proper RGB color encoding mode
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* COM7 |= OV9640_COM7_RGB
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* COM13 |= OV9640_COM13_RGB_AVG
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* COM15 |= proper RGB color encoding mode
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*/
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static const struct ov9640_reg ov9640_regs_qqcif[] = {
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{ OV9640_CLKRC, OV9640_CLKRC_DPLL_EN | OV9640_CLKRC_DIV(0x0f) },
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