2015-01-06 18:13:28 +08:00
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/*
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* Copyright (C) 2014 Traphandler
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* Copyright (C) 2014 Free Electrons
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*
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* Author: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
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* Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/clk.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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2015-02-23 01:51:04 +08:00
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#include <linux/pinctrl/consumer.h>
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2015-01-06 18:13:28 +08:00
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#include <drm/drm_crtc.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drmP.h>
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#include <video/videomode.h>
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#include "atmel_hlcdc_dc.h"
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2016-01-06 18:14:15 +08:00
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/**
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* Atmel HLCDC CRTC state structure
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*
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* @base: base CRTC state
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* @output_mode: RGBXXX output mode
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*/
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struct atmel_hlcdc_crtc_state {
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struct drm_crtc_state base;
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unsigned int output_mode;
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};
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static inline struct atmel_hlcdc_crtc_state *
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drm_crtc_state_to_atmel_hlcdc_crtc_state(struct drm_crtc_state *state)
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{
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return container_of(state, struct atmel_hlcdc_crtc_state, base);
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}
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2015-01-06 18:13:28 +08:00
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/**
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* Atmel HLCDC CRTC structure
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*
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* @base: base DRM CRTC structure
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* @hlcdc: pointer to the atmel_hlcdc structure provided by the MFD device
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* @event: pointer to the current page flip event
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* @id: CRTC id (returned by drm_crtc_index)
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*/
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struct atmel_hlcdc_crtc {
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struct drm_crtc base;
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struct atmel_hlcdc_dc *dc;
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struct drm_pending_vblank_event *event;
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int id;
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};
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static inline struct atmel_hlcdc_crtc *
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drm_crtc_to_atmel_hlcdc_crtc(struct drm_crtc *crtc)
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{
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return container_of(crtc, struct atmel_hlcdc_crtc, base);
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}
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2015-02-05 23:32:33 +08:00
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static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
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2015-01-06 18:13:28 +08:00
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{
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struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
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struct regmap *regmap = crtc->dc->hlcdc->regmap;
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2015-02-05 23:32:33 +08:00
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struct drm_display_mode *adj = &c->state->adjusted_mode;
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2016-01-06 18:14:15 +08:00
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struct atmel_hlcdc_crtc_state *state;
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2015-01-06 18:13:28 +08:00
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unsigned long mode_rate;
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struct videomode vm;
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unsigned long prate;
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unsigned int cfg;
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int div;
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vm.vfront_porch = adj->crtc_vsync_start - adj->crtc_vdisplay;
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vm.vback_porch = adj->crtc_vtotal - adj->crtc_vsync_end;
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vm.vsync_len = adj->crtc_vsync_end - adj->crtc_vsync_start;
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vm.hfront_porch = adj->crtc_hsync_start - adj->crtc_hdisplay;
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vm.hback_porch = adj->crtc_htotal - adj->crtc_hsync_end;
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vm.hsync_len = adj->crtc_hsync_end - adj->crtc_hsync_start;
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regmap_write(regmap, ATMEL_HLCDC_CFG(1),
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(vm.hsync_len - 1) | ((vm.vsync_len - 1) << 16));
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regmap_write(regmap, ATMEL_HLCDC_CFG(2),
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(vm.vfront_porch - 1) | (vm.vback_porch << 16));
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regmap_write(regmap, ATMEL_HLCDC_CFG(3),
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(vm.hfront_porch - 1) | ((vm.hback_porch - 1) << 16));
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regmap_write(regmap, ATMEL_HLCDC_CFG(4),
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(adj->crtc_hdisplay - 1) |
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((adj->crtc_vdisplay - 1) << 16));
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2015-02-26 01:44:51 +08:00
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cfg = 0;
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2015-01-06 18:13:28 +08:00
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prate = clk_get_rate(crtc->dc->hlcdc->sys_clk);
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2015-02-05 23:32:33 +08:00
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mode_rate = adj->crtc_clock * 1000;
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2015-01-06 18:13:28 +08:00
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if ((prate / 2) < mode_rate) {
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prate *= 2;
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cfg |= ATMEL_HLCDC_CLKSEL;
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}
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div = DIV_ROUND_UP(prate, mode_rate);
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if (div < 2)
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div = 2;
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cfg |= ATMEL_HLCDC_CLKDIV(div);
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regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0),
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ATMEL_HLCDC_CLKSEL | ATMEL_HLCDC_CLKDIV_MASK |
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ATMEL_HLCDC_CLKPOL, cfg);
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cfg = 0;
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2015-02-05 23:32:33 +08:00
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if (adj->flags & DRM_MODE_FLAG_NVSYNC)
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2015-01-06 18:13:28 +08:00
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cfg |= ATMEL_HLCDC_VSPOL;
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2015-02-05 23:32:33 +08:00
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if (adj->flags & DRM_MODE_FLAG_NHSYNC)
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2015-01-06 18:13:28 +08:00
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cfg |= ATMEL_HLCDC_HSPOL;
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2016-01-06 18:14:15 +08:00
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state = drm_crtc_state_to_atmel_hlcdc_crtc_state(c->state);
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cfg |= state->output_mode << 8;
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2015-01-06 18:13:28 +08:00
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regmap_update_bits(regmap, ATMEL_HLCDC_CFG(5),
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ATMEL_HLCDC_HSPOL | ATMEL_HLCDC_VSPOL |
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ATMEL_HLCDC_VSPDLYS | ATMEL_HLCDC_VSPDLYE |
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ATMEL_HLCDC_DISPPOL | ATMEL_HLCDC_DISPDLY |
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ATMEL_HLCDC_VSPSU | ATMEL_HLCDC_VSPHO |
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2016-01-06 18:14:15 +08:00
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ATMEL_HLCDC_GUARDTIME_MASK | ATMEL_HLCDC_MODE_MASK,
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2015-01-06 18:13:28 +08:00
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cfg);
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}
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2017-05-25 22:19:21 +08:00
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static enum drm_mode_status
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atmel_hlcdc_crtc_mode_valid(struct drm_crtc *c,
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const struct drm_display_mode *mode)
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2016-01-06 01:27:49 +08:00
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{
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struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
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2017-05-25 22:19:21 +08:00
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return atmel_hlcdc_dc_mode_valid(crtc->dc, mode);
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2016-01-06 01:27:49 +08:00
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}
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2015-02-05 23:32:33 +08:00
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static void atmel_hlcdc_crtc_disable(struct drm_crtc *c)
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2015-01-06 18:13:28 +08:00
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{
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2015-02-05 23:32:33 +08:00
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struct drm_device *dev = c->dev;
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struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
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struct regmap *regmap = crtc->dc->hlcdc->regmap;
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unsigned int status;
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drm_crtc_vblank_off(c);
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pm_runtime_get_sync(dev->dev);
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regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_DISP);
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while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
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(status & ATMEL_HLCDC_DISP))
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cpu_relax();
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regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_SYNC);
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while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
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(status & ATMEL_HLCDC_SYNC))
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cpu_relax();
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regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_PIXEL_CLK);
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while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
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(status & ATMEL_HLCDC_PIXEL_CLK))
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cpu_relax();
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clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
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2015-02-23 01:51:04 +08:00
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pinctrl_pm_select_sleep_state(dev->dev);
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2015-02-05 23:32:33 +08:00
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pm_runtime_allow(dev->dev);
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pm_runtime_put_sync(dev->dev);
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2015-01-06 18:13:28 +08:00
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}
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2015-02-05 23:32:33 +08:00
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static void atmel_hlcdc_crtc_enable(struct drm_crtc *c)
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2015-01-06 18:13:28 +08:00
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{
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2015-02-05 23:32:33 +08:00
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struct drm_device *dev = c->dev;
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struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
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struct regmap *regmap = crtc->dc->hlcdc->regmap;
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unsigned int status;
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pm_runtime_get_sync(dev->dev);
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pm_runtime_forbid(dev->dev);
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2015-02-23 01:51:04 +08:00
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pinctrl_pm_select_default_state(dev->dev);
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2015-02-05 23:32:33 +08:00
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clk_prepare_enable(crtc->dc->hlcdc->sys_clk);
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regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_PIXEL_CLK);
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while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
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!(status & ATMEL_HLCDC_PIXEL_CLK))
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cpu_relax();
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regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_SYNC);
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while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
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!(status & ATMEL_HLCDC_SYNC))
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cpu_relax();
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regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_DISP);
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while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
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!(status & ATMEL_HLCDC_DISP))
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cpu_relax();
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pm_runtime_put_sync(dev->dev);
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drm_crtc_vblank_on(c);
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2015-03-13 02:47:19 +08:00
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}
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2016-01-06 18:14:15 +08:00
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#define ATMEL_HLCDC_RGB444_OUTPUT BIT(0)
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#define ATMEL_HLCDC_RGB565_OUTPUT BIT(1)
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#define ATMEL_HLCDC_RGB666_OUTPUT BIT(2)
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#define ATMEL_HLCDC_RGB888_OUTPUT BIT(3)
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#define ATMEL_HLCDC_OUTPUT_MODE_MASK GENMASK(3, 0)
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static int atmel_hlcdc_crtc_select_output_mode(struct drm_crtc_state *state)
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{
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unsigned int output_fmts = ATMEL_HLCDC_OUTPUT_MODE_MASK;
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struct atmel_hlcdc_crtc_state *hstate;
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struct drm_connector_state *cstate;
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struct drm_connector *connector;
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struct atmel_hlcdc_crtc *crtc;
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int i;
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crtc = drm_crtc_to_atmel_hlcdc_crtc(state->crtc);
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for_each_connector_in_state(state->state, connector, cstate, i) {
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struct drm_display_info *info = &connector->display_info;
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unsigned int supported_fmts = 0;
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int j;
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if (!cstate->crtc)
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continue;
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for (j = 0; j < info->num_bus_formats; j++) {
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switch (info->bus_formats[j]) {
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case MEDIA_BUS_FMT_RGB444_1X12:
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supported_fmts |= ATMEL_HLCDC_RGB444_OUTPUT;
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break;
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case MEDIA_BUS_FMT_RGB565_1X16:
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supported_fmts |= ATMEL_HLCDC_RGB565_OUTPUT;
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break;
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case MEDIA_BUS_FMT_RGB666_1X18:
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supported_fmts |= ATMEL_HLCDC_RGB666_OUTPUT;
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break;
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case MEDIA_BUS_FMT_RGB888_1X24:
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supported_fmts |= ATMEL_HLCDC_RGB888_OUTPUT;
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break;
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default:
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break;
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}
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}
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if (crtc->dc->desc->conflicting_output_formats)
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output_fmts &= supported_fmts;
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else
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output_fmts |= supported_fmts;
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}
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if (!output_fmts)
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return -EINVAL;
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hstate = drm_crtc_state_to_atmel_hlcdc_crtc_state(state);
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hstate->output_mode = fls(output_fmts) - 1;
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return 0;
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}
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2015-02-05 23:32:33 +08:00
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static int atmel_hlcdc_crtc_atomic_check(struct drm_crtc *c,
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struct drm_crtc_state *s)
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2015-01-06 18:13:28 +08:00
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{
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2016-01-06 18:14:15 +08:00
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int ret;
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2015-02-05 23:32:33 +08:00
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2016-01-06 18:14:15 +08:00
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ret = atmel_hlcdc_crtc_select_output_mode(s);
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if (ret)
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return ret;
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2016-03-16 01:01:08 +08:00
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ret = atmel_hlcdc_plane_prepare_disc_area(s);
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if (ret)
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return ret;
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return atmel_hlcdc_plane_prepare_ahb_routing(s);
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2015-01-06 18:13:28 +08:00
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}
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2015-07-21 19:28:58 +08:00
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static void atmel_hlcdc_crtc_atomic_begin(struct drm_crtc *c,
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struct drm_crtc_state *old_s)
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2015-01-06 18:13:28 +08:00
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{
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2015-02-05 23:32:33 +08:00
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struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
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2015-01-06 18:13:28 +08:00
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2015-02-05 23:32:33 +08:00
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if (c->state->event) {
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c->state->event->pipe = drm_crtc_index(c);
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2015-01-06 18:13:28 +08:00
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2015-02-05 23:32:33 +08:00
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WARN_ON(drm_crtc_vblank_get(c) != 0);
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2015-01-06 18:13:28 +08:00
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2015-02-05 23:32:33 +08:00
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crtc->event = c->state->event;
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c->state->event = NULL;
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2015-01-06 18:13:28 +08:00
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}
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}
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2015-07-21 19:28:58 +08:00
|
|
|
static void atmel_hlcdc_crtc_atomic_flush(struct drm_crtc *crtc,
|
|
|
|
struct drm_crtc_state *old_s)
|
2015-02-05 23:32:33 +08:00
|
|
|
{
|
|
|
|
/* TODO: write common plane control register if available */
|
|
|
|
}
|
|
|
|
|
2015-01-06 18:13:28 +08:00
|
|
|
static const struct drm_crtc_helper_funcs lcdc_crtc_helper_funcs = {
|
2017-05-25 22:19:21 +08:00
|
|
|
.mode_valid = atmel_hlcdc_crtc_mode_valid,
|
2015-02-05 23:32:33 +08:00
|
|
|
.mode_set = drm_helper_crtc_mode_set,
|
|
|
|
.mode_set_nofb = atmel_hlcdc_crtc_mode_set_nofb,
|
|
|
|
.mode_set_base = drm_helper_crtc_mode_set_base,
|
2015-01-06 18:13:28 +08:00
|
|
|
.disable = atmel_hlcdc_crtc_disable,
|
2015-02-05 23:32:33 +08:00
|
|
|
.enable = atmel_hlcdc_crtc_enable,
|
|
|
|
.atomic_check = atmel_hlcdc_crtc_atomic_check,
|
|
|
|
.atomic_begin = atmel_hlcdc_crtc_atomic_begin,
|
|
|
|
.atomic_flush = atmel_hlcdc_crtc_atomic_flush,
|
2015-01-06 18:13:28 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
static void atmel_hlcdc_crtc_destroy(struct drm_crtc *c)
|
|
|
|
{
|
|
|
|
struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
|
|
|
|
|
|
|
|
drm_crtc_cleanup(c);
|
|
|
|
kfree(crtc);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void atmel_hlcdc_crtc_finish_page_flip(struct atmel_hlcdc_crtc *crtc)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = crtc->base.dev;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&dev->event_lock, flags);
|
|
|
|
if (crtc->event) {
|
2016-06-06 22:41:34 +08:00
|
|
|
drm_crtc_send_vblank_event(&crtc->base, crtc->event);
|
2016-06-06 22:41:41 +08:00
|
|
|
drm_crtc_vblank_put(&crtc->base);
|
2015-01-06 18:13:28 +08:00
|
|
|
crtc->event = NULL;
|
|
|
|
}
|
|
|
|
spin_unlock_irqrestore(&dev->event_lock, flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
void atmel_hlcdc_crtc_irq(struct drm_crtc *c)
|
|
|
|
{
|
2016-07-05 08:04:49 +08:00
|
|
|
drm_crtc_handle_vblank(c);
|
2015-01-06 18:13:28 +08:00
|
|
|
atmel_hlcdc_crtc_finish_page_flip(drm_crtc_to_atmel_hlcdc_crtc(c));
|
|
|
|
}
|
|
|
|
|
2016-07-11 18:19:40 +08:00
|
|
|
static void atmel_hlcdc_crtc_reset(struct drm_crtc *crtc)
|
2016-01-06 18:14:15 +08:00
|
|
|
{
|
|
|
|
struct atmel_hlcdc_crtc_state *state;
|
|
|
|
|
|
|
|
if (crtc->state) {
|
2016-04-23 03:28:32 +08:00
|
|
|
__drm_atomic_helper_crtc_destroy_state(crtc->state);
|
2016-01-06 18:14:15 +08:00
|
|
|
state = drm_crtc_state_to_atmel_hlcdc_crtc_state(crtc->state);
|
|
|
|
kfree(state);
|
2016-04-23 03:28:32 +08:00
|
|
|
crtc->state = NULL;
|
2016-01-06 18:14:15 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
state = kzalloc(sizeof(*state), GFP_KERNEL);
|
|
|
|
if (state) {
|
|
|
|
crtc->state = &state->base;
|
|
|
|
crtc->state->crtc = crtc;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct drm_crtc_state *
|
|
|
|
atmel_hlcdc_crtc_duplicate_state(struct drm_crtc *crtc)
|
|
|
|
{
|
|
|
|
struct atmel_hlcdc_crtc_state *state, *cur;
|
|
|
|
|
|
|
|
if (WARN_ON(!crtc->state))
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
state = kmalloc(sizeof(*state), GFP_KERNEL);
|
2016-04-25 17:04:54 +08:00
|
|
|
if (!state)
|
|
|
|
return NULL;
|
|
|
|
__drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
|
2016-01-06 18:14:15 +08:00
|
|
|
|
|
|
|
cur = drm_crtc_state_to_atmel_hlcdc_crtc_state(crtc->state);
|
|
|
|
state->output_mode = cur->output_mode;
|
|
|
|
|
|
|
|
return &state->base;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void atmel_hlcdc_crtc_destroy_state(struct drm_crtc *crtc,
|
|
|
|
struct drm_crtc_state *s)
|
|
|
|
{
|
|
|
|
struct atmel_hlcdc_crtc_state *state;
|
|
|
|
|
|
|
|
state = drm_crtc_state_to_atmel_hlcdc_crtc_state(s);
|
2016-05-09 22:34:09 +08:00
|
|
|
__drm_atomic_helper_crtc_destroy_state(s);
|
2016-01-06 18:14:15 +08:00
|
|
|
kfree(state);
|
|
|
|
}
|
|
|
|
|
2017-02-07 17:16:19 +08:00
|
|
|
static int atmel_hlcdc_crtc_enable_vblank(struct drm_crtc *c)
|
|
|
|
{
|
|
|
|
struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
|
|
|
|
struct regmap *regmap = crtc->dc->hlcdc->regmap;
|
|
|
|
|
|
|
|
/* Enable SOF (Start Of Frame) interrupt for vblank counting */
|
|
|
|
regmap_write(regmap, ATMEL_HLCDC_IER, ATMEL_HLCDC_SOF);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void atmel_hlcdc_crtc_disable_vblank(struct drm_crtc *c)
|
|
|
|
{
|
|
|
|
struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
|
|
|
|
struct regmap *regmap = crtc->dc->hlcdc->regmap;
|
|
|
|
|
|
|
|
regmap_write(regmap, ATMEL_HLCDC_IDR, ATMEL_HLCDC_SOF);
|
|
|
|
}
|
|
|
|
|
2015-01-06 18:13:28 +08:00
|
|
|
static const struct drm_crtc_funcs atmel_hlcdc_crtc_funcs = {
|
2015-02-05 23:32:33 +08:00
|
|
|
.page_flip = drm_atomic_helper_page_flip,
|
|
|
|
.set_config = drm_atomic_helper_set_config,
|
2015-01-06 18:13:28 +08:00
|
|
|
.destroy = atmel_hlcdc_crtc_destroy,
|
2016-01-06 18:14:15 +08:00
|
|
|
.reset = atmel_hlcdc_crtc_reset,
|
|
|
|
.atomic_duplicate_state = atmel_hlcdc_crtc_duplicate_state,
|
|
|
|
.atomic_destroy_state = atmel_hlcdc_crtc_destroy_state,
|
2017-02-07 17:16:19 +08:00
|
|
|
.enable_vblank = atmel_hlcdc_crtc_enable_vblank,
|
|
|
|
.disable_vblank = atmel_hlcdc_crtc_disable_vblank,
|
2015-01-06 18:13:28 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
int atmel_hlcdc_crtc_create(struct drm_device *dev)
|
|
|
|
{
|
2017-02-07 01:57:19 +08:00
|
|
|
struct atmel_hlcdc_plane *primary = NULL, *cursor = NULL;
|
2015-01-06 18:13:28 +08:00
|
|
|
struct atmel_hlcdc_dc *dc = dev->dev_private;
|
|
|
|
struct atmel_hlcdc_crtc *crtc;
|
|
|
|
int ret;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
crtc = kzalloc(sizeof(*crtc), GFP_KERNEL);
|
|
|
|
if (!crtc)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
crtc->dc = dc;
|
|
|
|
|
2017-02-07 01:57:19 +08:00
|
|
|
for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) {
|
|
|
|
if (!dc->layers[i])
|
|
|
|
continue;
|
|
|
|
|
|
|
|
switch (dc->layers[i]->desc->type) {
|
|
|
|
case ATMEL_HLCDC_BASE_LAYER:
|
|
|
|
primary = atmel_hlcdc_layer_to_plane(dc->layers[i]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case ATMEL_HLCDC_CURSOR_LAYER:
|
|
|
|
cursor = atmel_hlcdc_layer_to_plane(dc->layers[i]);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = drm_crtc_init_with_planes(dev, &crtc->base, &primary->base,
|
|
|
|
&cursor->base, &atmel_hlcdc_crtc_funcs,
|
|
|
|
NULL);
|
2015-01-06 18:13:28 +08:00
|
|
|
if (ret < 0)
|
|
|
|
goto fail;
|
|
|
|
|
|
|
|
crtc->id = drm_crtc_index(&crtc->base);
|
|
|
|
|
2017-02-07 01:57:19 +08:00
|
|
|
for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) {
|
|
|
|
struct atmel_hlcdc_plane *overlay;
|
2015-01-06 18:13:28 +08:00
|
|
|
|
2017-02-07 01:57:19 +08:00
|
|
|
if (dc->layers[i] &&
|
|
|
|
dc->layers[i]->desc->type == ATMEL_HLCDC_OVERLAY_LAYER) {
|
|
|
|
overlay = atmel_hlcdc_layer_to_plane(dc->layers[i]);
|
|
|
|
overlay->base.possible_crtcs = 1 << crtc->id;
|
|
|
|
}
|
|
|
|
}
|
2015-01-06 18:13:28 +08:00
|
|
|
|
|
|
|
drm_crtc_helper_add(&crtc->base, &lcdc_crtc_helper_funcs);
|
2015-07-17 02:55:34 +08:00
|
|
|
drm_crtc_vblank_reset(&crtc->base);
|
2015-01-06 18:13:28 +08:00
|
|
|
|
|
|
|
dc->crtc = &crtc->base;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
atmel_hlcdc_crtc_destroy(&crtc->base);
|
|
|
|
return ret;
|
|
|
|
}
|