2012-03-31 21:26:57 +08:00
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/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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/include/ "imx28.dtsi"
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/ {
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model = "Freescale i.MX28 Evaluation Kit";
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compatible = "fsl,imx28-evk", "fsl,imx28";
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memory {
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reg = <0x40000000 0x08000000>;
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};
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apb@80000000 {
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2012-05-06 16:33:34 +08:00
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apbh@80000000 {
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2012-05-25 17:25:35 +08:00
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gpmi-nand@8000c000 {
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pinctrl-names = "default";
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pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
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status = "okay";
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};
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2012-05-06 16:33:34 +08:00
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ssp0: ssp@80010000 {
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compatible = "fsl,imx28-mmc";
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_8bit_pins_a
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&mmc0_cd_cfg &mmc0_sck_cfg>;
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bus-width = <8>;
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wp-gpios = <&gpio2 12 0>;
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2012-06-28 11:45:01 +08:00
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vmmc-supply = <®_vddio_sd0>;
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2012-05-06 16:33:34 +08:00
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status = "okay";
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};
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ssp1: ssp@80012000 {
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compatible = "fsl,imx28-mmc";
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bus-width = <8>;
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wp-gpios = <&gpio0 28 0>;
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};
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2012-06-28 11:44:58 +08:00
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pinctrl@80018000 {
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pinctrl-names = "default";
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pinctrl-0 = <&hog_pins_a>;
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hog_pins_a: hog-gpios@0 {
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reg = <0>;
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fsl,pinmux-ids = <
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0x20d3 /* MX28_PAD_SSP1_CMD__GPIO_2_13 */
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0x20f3 /* MX28_PAD_SSP1_DATA3__GPIO_2_15 */
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0x40d3 /* MX28_PAD_ENET0_RX_CLK__GPIO_4_13 */
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0x20c3 /* MX28_PAD_SSP1_SCK__GPIO_2_12 */
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0x31c3 /* MX28_PAD_PWM3__GPIO_3_28 */
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0x31e3 /* MX28_PAD_LCD_RESET__GPIO_3_30 */
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0x3053 /* MX28_PAD_AUART1_TX__GPIO_3_5 */
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>;
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fsl,drive-strength = <0>;
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fsl,voltage = <1>;
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fsl,pull-up = <0>;
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};
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};
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2012-05-06 16:33:34 +08:00
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};
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2012-03-31 21:26:57 +08:00
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apbx@80040000 {
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2012-05-10 15:03:16 +08:00
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saif0: saif@80042000 {
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pinctrl-names = "default";
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pinctrl-0 = <&saif0_pins_a>;
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status = "okay";
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};
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saif1: saif@80046000 {
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pinctrl-names = "default";
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pinctrl-0 = <&saif1_pins_a>;
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fsl,saif-master = <&saif0>;
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status = "okay";
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};
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2012-05-10 15:02:10 +08:00
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i2c0: i2c@80058000 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins_a>;
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status = "okay";
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2012-05-10 15:03:16 +08:00
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sgtl5000: codec@0a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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VDDA-supply = <®_3p3v>;
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VDDIO-supply = <®_3p3v>;
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};
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2012-05-10 15:02:10 +08:00
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};
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2012-03-31 21:26:57 +08:00
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duart: serial@80074000 {
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pinctrl-names = "default";
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pinctrl-0 = <&duart_pins_a>;
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status = "okay";
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};
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2012-06-15 23:35:56 +08:00
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auart0: serial@8006a000 {
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pinctrl-names = "default";
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pinctrl-0 = <&auart0_pins_a>;
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status = "okay";
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};
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auart3: serial@80070000 {
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pinctrl-names = "default";
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pinctrl-0 = <&auart3_pins_a>;
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status = "okay";
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};
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2012-03-31 21:26:57 +08:00
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};
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};
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ahb@80080000 {
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mac0: ethernet@800f0000 {
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phy-mode = "rmii";
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pinctrl-names = "default";
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pinctrl-0 = <&mac0_pins_a>;
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2012-06-28 11:45:02 +08:00
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phy-supply = <®_fec_3v3>;
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phy-reset-gpios = <&gpio4 13 0>;
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phy-reset-duration = <100>;
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2012-03-31 21:26:57 +08:00
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status = "okay";
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};
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mac1: ethernet@800f4000 {
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phy-mode = "rmii";
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pinctrl-names = "default";
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pinctrl-0 = <&mac1_pins_a>;
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status = "okay";
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};
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};
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2012-05-10 15:03:16 +08:00
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regulators {
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compatible = "simple-bus";
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reg_3p3v: 3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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2012-06-28 11:45:01 +08:00
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reg_vddio_sd0: vddio-sd0 {
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compatible = "regulator-fixed";
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regulator-name = "vddio-sd0";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio3 28 0>;
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};
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2012-06-28 11:45:02 +08:00
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reg_fec_3v3: fec-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "fec-3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 15 0>;
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};
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2012-05-10 15:03:16 +08:00
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};
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sound {
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compatible = "fsl,imx28-evk-sgtl5000",
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"fsl,mxs-audio-sgtl5000";
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model = "imx28-evk-sgtl5000";
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saif-controllers = <&saif0 &saif1>;
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audio-codec = <&sgtl5000>;
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};
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2012-06-28 11:45:04 +08:00
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leds {
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compatible = "gpio-leds";
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user {
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label = "Heartbeat";
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gpios = <&gpio3 5 0>;
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linux,default-trigger = "heartbeat";
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};
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};
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2012-03-31 21:26:57 +08:00
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};
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