2020-05-12 09:01:40 +08:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (C) 2018-2020, Intel Corporation. */
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#ifndef _ICE_FDIR_H_
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#define _ICE_FDIR_H_
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2020-05-12 09:01:41 +08:00
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2020-05-12 09:01:42 +08:00
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#define ICE_FDIR_TUN_PKT_OFF 50
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#define ICE_FDIR_MAX_RAW_PKT_SIZE (512 + ICE_FDIR_TUN_PKT_OFF)
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/* macros for offsets into packets for flow director programming */
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#define ICE_IPV4_SRC_ADDR_OFFSET 26
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#define ICE_IPV4_DST_ADDR_OFFSET 30
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#define ICE_IPV4_TCP_SRC_PORT_OFFSET 34
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#define ICE_IPV4_TCP_DST_PORT_OFFSET 36
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#define ICE_IPV4_UDP_SRC_PORT_OFFSET 34
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#define ICE_IPV4_UDP_DST_PORT_OFFSET 36
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#define ICE_IPV4_SCTP_SRC_PORT_OFFSET 34
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#define ICE_IPV4_SCTP_DST_PORT_OFFSET 36
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#define ICE_IPV4_PROTO_OFFSET 23
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#define ICE_IPV6_SRC_ADDR_OFFSET 22
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#define ICE_IPV6_DST_ADDR_OFFSET 38
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#define ICE_IPV6_TCP_SRC_PORT_OFFSET 54
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#define ICE_IPV6_TCP_DST_PORT_OFFSET 56
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#define ICE_IPV6_UDP_SRC_PORT_OFFSET 54
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#define ICE_IPV6_UDP_DST_PORT_OFFSET 56
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#define ICE_IPV6_SCTP_SRC_PORT_OFFSET 54
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#define ICE_IPV6_SCTP_DST_PORT_OFFSET 56
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2021-03-09 11:08:07 +08:00
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#define ICE_MAC_ETHTYPE_OFFSET 12
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2021-03-09 11:07:59 +08:00
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#define ICE_IPV4_TOS_OFFSET 15
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#define ICE_IPV4_TTL_OFFSET 22
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#define ICE_IPV6_TC_OFFSET 14
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#define ICE_IPV6_HLIM_OFFSET 21
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#define ICE_IPV6_PROTO_OFFSET 20
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2021-03-09 11:08:08 +08:00
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#define ICE_IPV4_GTPU_TEID_OFFSET 46
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#define ICE_IPV4_GTPU_QFI_OFFSET 56
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2021-03-09 11:08:09 +08:00
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#define ICE_IPV4_L2TPV3_SESS_ID_OFFSET 34
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#define ICE_IPV6_L2TPV3_SESS_ID_OFFSET 54
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#define ICE_IPV4_ESP_SPI_OFFSET 34
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#define ICE_IPV6_ESP_SPI_OFFSET 54
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#define ICE_IPV4_AH_SPI_OFFSET 38
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#define ICE_IPV6_AH_SPI_OFFSET 58
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#define ICE_IPV4_NAT_T_ESP_SPI_OFFSET 42
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#define ICE_IPV6_NAT_T_ESP_SPI_OFFSET 62
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2021-03-09 11:07:59 +08:00
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ice: Enable FDIR Configure for AVF
The virtual channel is going to be extended to support FDIR and
RSS configure from AVF. New data structures and OP codes will be
added, the patch enable the FDIR part.
To support above advanced AVF feature, we need to figure out
what kind of data structure should be passed from VF to PF to describe
an FDIR rule or RSS config rule. The common part of the requirement is
we need a data structure to represent the input set selection of a rule's
hash key.
An input set selection is a group of fields be selected from one or more
network protocol layers that could be identified as a specific flow.
For example, select dst IP address from an IPv4 header combined with
dst port from the TCP header as the input set for an IPv4/TCP flow.
The patch adds a new data structure virtchnl_proto_hdrs to abstract
a network protocol headers group which is composed of layers of network
protocol header(virtchnl_proto_hdr).
A protocol header contains a 32 bits mask (field_selector) to describe
which fields are selected as input sets, as well as a header type
(enum virtchnl_proto_hdr_type). Each bit is mapped to a field in
enum virtchnl_proto_hdr_field guided by its header type.
+------------+-----------+------------------------------+
| | Proto Hdr | Header Type A |
| | +------------------------------+
| | | BIT 31 | ... | BIT 1 | BIT 0 |
| |-----------+------------------------------+
|Proto Hdrs | Proto Hdr | Header Type B |
| | +------------------------------+
| | | BIT 31 | ... | BIT 1 | BIT 0 |
| |-----------+------------------------------+
| | Proto Hdr | Header Type C |
| | +------------------------------+
| | | BIT 31 | ... | BIT 1 | BIT 0 |
| |-----------+------------------------------+
| | .... |
+-------------------------------------------------------+
All fields in enum virtchnl_proto_hdr_fields are grouped with header type
and the value of the first field of a header type is always 32 aligned.
enum proto_hdr_type {
header_type_A = 0;
header_type_B = 1;
....
}
enum proto_hdr_field {
/* header type A */
header_A_field_0 = 0,
header_A_field_1 = 1,
header_A_field_2 = 2,
header_A_field_3 = 3,
/* header type B */
header_B_field_0 = 32, // = header_type_B << 5
header_B_field_0 = 33,
header_B_field_0 = 34
header_B_field_0 = 35,
....
};
So we have:
proto_hdr_type = proto_hdr_field / 32
bit offset = proto_hdr_field % 32
To simply the protocol header's operations, couple help macros are added.
For example, to select src IP and dst port as input set for an IPv4/UDP
flow.
we have:
struct virtchnl_proto_hdr hdr[2];
VIRTCHNL_SET_PROTO_HDR_TYPE(&hdr[0], IPV4)
VIRTCHNL_ADD_PROTO_HDR_FIELD(&hdr[0], IPV4, SRC)
VIRTCHNL_SET_PROTO_HDR_TYPE(&hdr[1], UDP)
VIRTCHNL_ADD_PROTO_HDR_FIELD(&hdr[1], UDP, DST)
The byte array is used to store the protocol header of a training package.
The byte array must be network order.
The patch added virtual channel support for iAVF FDIR add/validate/delete
filter. iAVF FDIR is Flow Director for Intel Adaptive Virtual Function
which can direct Ethernet packets to the queues of the Network Interface
Card. Add/delete command is adding or deleting one rule for each virtual
channel message, while validate command is just verifying if this rule
is valid without any other operations.
To add or delete one rule, driver needs to config TCAM and Profile,
build training packets which contains the input set value, and send
the training packets through FDIR Tx queue. In addition, driver needs to
manage the software context to avoid adding duplicated rules, deleting
non-existent rule, input set conflicts and other invalid cases.
NOTE:
Supported pattern/actions and their parse functions are not be included in
this patch, they will be added in a separate one.
Signed-off-by: Jeff Guo <jia.guo@intel.com>
Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Simei Su <simei.su@intel.com>
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Chen Bo <BoX.C.Chen@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-03-09 11:08:04 +08:00
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#define ICE_FDIR_MAX_FLTRS 16384
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2020-05-12 09:01:42 +08:00
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/* IP v4 has 2 flag bits that enable fragment processing: DF and MF. DF
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* requests that the packet not be fragmented. MF indicates that a packet has
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* been fragmented.
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*/
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2021-07-17 06:16:44 +08:00
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#define ICE_FDIR_IPV4_PKT_FLAG_MF 0x20
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2020-05-12 09:01:42 +08:00
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2020-05-12 09:01:41 +08:00
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enum ice_fltr_prgm_desc_dest {
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ICE_FLTR_PRGM_DESC_DEST_DROP_PKT,
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ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QINDEX,
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2021-03-09 11:08:06 +08:00
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ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QGROUP,
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ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_OTHER,
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2020-05-12 09:01:41 +08:00
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};
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2020-05-12 09:01:42 +08:00
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enum ice_fltr_prgm_desc_fd_status {
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ICE_FLTR_PRGM_DESC_FD_STATUS_NONE,
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ICE_FLTR_PRGM_DESC_FD_STATUS_FD_ID,
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};
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/* Flow Director (FD) Filter Programming descriptor */
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struct ice_fd_fltr_desc_ctx {
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u32 fdid;
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u16 qindex;
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u16 cnt_index;
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u16 fd_vsi;
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u16 flex_val;
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u8 comp_q;
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u8 comp_report;
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u8 fd_space;
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u8 cnt_ena;
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u8 evict_ena;
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u8 toq;
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u8 toq_prio;
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u8 dpu_recipe;
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u8 drop;
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u8 flex_prio;
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u8 flex_mdid;
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u8 dtype;
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u8 pcmd;
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u8 desc_prof_prio;
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u8 desc_prof;
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u8 swap;
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u8 fdid_prio;
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u8 fdid_mdid;
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};
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2020-05-12 09:01:44 +08:00
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#define ICE_FLTR_PRGM_FLEX_WORD_SIZE sizeof(__be16)
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struct ice_rx_flow_userdef {
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u16 flex_word;
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u16 flex_offset;
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u16 flex_fltr;
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};
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2020-05-12 09:01:41 +08:00
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struct ice_fdir_v4 {
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__be32 dst_ip;
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__be32 src_ip;
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__be16 dst_port;
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__be16 src_port;
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__be32 l4_header;
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__be32 sec_parm_idx; /* security parameter index */
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u8 tos;
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u8 ip_ver;
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u8 proto;
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2021-03-09 11:07:59 +08:00
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u8 ttl;
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2020-05-12 09:01:41 +08:00
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};
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2020-05-12 09:01:43 +08:00
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#define ICE_IPV6_ADDR_LEN_AS_U32 4
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struct ice_fdir_v6 {
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__be32 dst_ip[ICE_IPV6_ADDR_LEN_AS_U32];
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__be32 src_ip[ICE_IPV6_ADDR_LEN_AS_U32];
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__be16 dst_port;
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__be16 src_port;
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__be32 l4_header; /* next header */
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__be32 sec_parm_idx; /* security parameter index */
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u8 tc;
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u8 proto;
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2021-03-09 11:07:59 +08:00
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u8 hlim;
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2020-05-12 09:01:43 +08:00
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};
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2021-03-09 11:08:08 +08:00
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struct ice_fdir_udp_gtp {
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u8 flags;
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u8 msg_type;
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__be16 rsrvd_len;
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__be32 teid;
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__be16 rsrvd_seq_nbr;
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u8 rsrvd_n_pdu_nbr;
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u8 rsrvd_next_ext_type;
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u8 rsvrd_ext_len;
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u8 pdu_type:4,
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spare:4;
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u8 ppp:1,
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rqi:1,
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qfi:6;
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u32 rsvrd;
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u8 next_ext;
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};
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2021-03-09 11:08:09 +08:00
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struct ice_fdir_l2tpv3 {
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__be32 session_id;
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};
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2020-05-12 09:01:41 +08:00
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struct ice_fdir_extra {
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u8 dst_mac[ETH_ALEN]; /* dest MAC address */
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2021-03-09 11:07:58 +08:00
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u8 src_mac[ETH_ALEN]; /* src MAC address */
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2021-03-09 11:08:07 +08:00
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__be16 ether_type; /* for NON_IP_L2 */
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2020-05-12 09:01:41 +08:00
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u32 usr_def[2]; /* user data */
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__be16 vlan_type; /* VLAN ethertype */
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__be16 vlan_tag; /* VLAN tag info */
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};
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struct ice_fdir_fltr {
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struct list_head fltr_node;
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enum ice_fltr_ptype flow_type;
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2020-05-12 09:01:43 +08:00
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union {
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struct ice_fdir_v4 v4;
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struct ice_fdir_v6 v6;
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} ip, mask;
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2020-05-12 09:01:41 +08:00
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2021-03-09 11:08:08 +08:00
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struct ice_fdir_udp_gtp gtpu_data;
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struct ice_fdir_udp_gtp gtpu_mask;
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2021-03-09 11:08:09 +08:00
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struct ice_fdir_l2tpv3 l2tpv3_data;
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struct ice_fdir_l2tpv3 l2tpv3_mask;
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2020-05-12 09:01:41 +08:00
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struct ice_fdir_extra ext_data;
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struct ice_fdir_extra ext_mask;
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2020-05-12 09:01:44 +08:00
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/* flex byte filter data */
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__be16 flex_word;
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2021-03-09 11:08:06 +08:00
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/* queue region size (=2^q_region) */
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u8 q_region;
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2020-05-12 09:01:44 +08:00
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u16 flex_offset;
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u16 flex_fltr;
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2020-05-12 09:01:41 +08:00
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/* filter control */
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u16 q_index;
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2021-12-30 02:54:33 +08:00
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u16 orig_q_index;
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2020-05-12 09:01:41 +08:00
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u16 dest_vsi;
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u8 dest_ctl;
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ice: Enable FDIR Configure for AVF
The virtual channel is going to be extended to support FDIR and
RSS configure from AVF. New data structures and OP codes will be
added, the patch enable the FDIR part.
To support above advanced AVF feature, we need to figure out
what kind of data structure should be passed from VF to PF to describe
an FDIR rule or RSS config rule. The common part of the requirement is
we need a data structure to represent the input set selection of a rule's
hash key.
An input set selection is a group of fields be selected from one or more
network protocol layers that could be identified as a specific flow.
For example, select dst IP address from an IPv4 header combined with
dst port from the TCP header as the input set for an IPv4/TCP flow.
The patch adds a new data structure virtchnl_proto_hdrs to abstract
a network protocol headers group which is composed of layers of network
protocol header(virtchnl_proto_hdr).
A protocol header contains a 32 bits mask (field_selector) to describe
which fields are selected as input sets, as well as a header type
(enum virtchnl_proto_hdr_type). Each bit is mapped to a field in
enum virtchnl_proto_hdr_field guided by its header type.
+------------+-----------+------------------------------+
| | Proto Hdr | Header Type A |
| | +------------------------------+
| | | BIT 31 | ... | BIT 1 | BIT 0 |
| |-----------+------------------------------+
|Proto Hdrs | Proto Hdr | Header Type B |
| | +------------------------------+
| | | BIT 31 | ... | BIT 1 | BIT 0 |
| |-----------+------------------------------+
| | Proto Hdr | Header Type C |
| | +------------------------------+
| | | BIT 31 | ... | BIT 1 | BIT 0 |
| |-----------+------------------------------+
| | .... |
+-------------------------------------------------------+
All fields in enum virtchnl_proto_hdr_fields are grouped with header type
and the value of the first field of a header type is always 32 aligned.
enum proto_hdr_type {
header_type_A = 0;
header_type_B = 1;
....
}
enum proto_hdr_field {
/* header type A */
header_A_field_0 = 0,
header_A_field_1 = 1,
header_A_field_2 = 2,
header_A_field_3 = 3,
/* header type B */
header_B_field_0 = 32, // = header_type_B << 5
header_B_field_0 = 33,
header_B_field_0 = 34
header_B_field_0 = 35,
....
};
So we have:
proto_hdr_type = proto_hdr_field / 32
bit offset = proto_hdr_field % 32
To simply the protocol header's operations, couple help macros are added.
For example, to select src IP and dst port as input set for an IPv4/UDP
flow.
we have:
struct virtchnl_proto_hdr hdr[2];
VIRTCHNL_SET_PROTO_HDR_TYPE(&hdr[0], IPV4)
VIRTCHNL_ADD_PROTO_HDR_FIELD(&hdr[0], IPV4, SRC)
VIRTCHNL_SET_PROTO_HDR_TYPE(&hdr[1], UDP)
VIRTCHNL_ADD_PROTO_HDR_FIELD(&hdr[1], UDP, DST)
The byte array is used to store the protocol header of a training package.
The byte array must be network order.
The patch added virtual channel support for iAVF FDIR add/validate/delete
filter. iAVF FDIR is Flow Director for Intel Adaptive Virtual Function
which can direct Ethernet packets to the queues of the Network Interface
Card. Add/delete command is adding or deleting one rule for each virtual
channel message, while validate command is just verifying if this rule
is valid without any other operations.
To add or delete one rule, driver needs to config TCAM and Profile,
build training packets which contains the input set value, and send
the training packets through FDIR Tx queue. In addition, driver needs to
manage the software context to avoid adding duplicated rules, deleting
non-existent rule, input set conflicts and other invalid cases.
NOTE:
Supported pattern/actions and their parse functions are not be included in
this patch, they will be added in a separate one.
Signed-off-by: Jeff Guo <jia.guo@intel.com>
Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Simei Su <simei.su@intel.com>
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Chen Bo <BoX.C.Chen@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-03-09 11:08:04 +08:00
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u8 cnt_ena;
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2020-05-12 09:01:41 +08:00
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u8 fltr_status;
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u16 cnt_index;
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u32 fltr_id;
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ice: Enable FDIR Configure for AVF
The virtual channel is going to be extended to support FDIR and
RSS configure from AVF. New data structures and OP codes will be
added, the patch enable the FDIR part.
To support above advanced AVF feature, we need to figure out
what kind of data structure should be passed from VF to PF to describe
an FDIR rule or RSS config rule. The common part of the requirement is
we need a data structure to represent the input set selection of a rule's
hash key.
An input set selection is a group of fields be selected from one or more
network protocol layers that could be identified as a specific flow.
For example, select dst IP address from an IPv4 header combined with
dst port from the TCP header as the input set for an IPv4/TCP flow.
The patch adds a new data structure virtchnl_proto_hdrs to abstract
a network protocol headers group which is composed of layers of network
protocol header(virtchnl_proto_hdr).
A protocol header contains a 32 bits mask (field_selector) to describe
which fields are selected as input sets, as well as a header type
(enum virtchnl_proto_hdr_type). Each bit is mapped to a field in
enum virtchnl_proto_hdr_field guided by its header type.
+------------+-----------+------------------------------+
| | Proto Hdr | Header Type A |
| | +------------------------------+
| | | BIT 31 | ... | BIT 1 | BIT 0 |
| |-----------+------------------------------+
|Proto Hdrs | Proto Hdr | Header Type B |
| | +------------------------------+
| | | BIT 31 | ... | BIT 1 | BIT 0 |
| |-----------+------------------------------+
| | Proto Hdr | Header Type C |
| | +------------------------------+
| | | BIT 31 | ... | BIT 1 | BIT 0 |
| |-----------+------------------------------+
| | .... |
+-------------------------------------------------------+
All fields in enum virtchnl_proto_hdr_fields are grouped with header type
and the value of the first field of a header type is always 32 aligned.
enum proto_hdr_type {
header_type_A = 0;
header_type_B = 1;
....
}
enum proto_hdr_field {
/* header type A */
header_A_field_0 = 0,
header_A_field_1 = 1,
header_A_field_2 = 2,
header_A_field_3 = 3,
/* header type B */
header_B_field_0 = 32, // = header_type_B << 5
header_B_field_0 = 33,
header_B_field_0 = 34
header_B_field_0 = 35,
....
};
So we have:
proto_hdr_type = proto_hdr_field / 32
bit offset = proto_hdr_field % 32
To simply the protocol header's operations, couple help macros are added.
For example, to select src IP and dst port as input set for an IPv4/UDP
flow.
we have:
struct virtchnl_proto_hdr hdr[2];
VIRTCHNL_SET_PROTO_HDR_TYPE(&hdr[0], IPV4)
VIRTCHNL_ADD_PROTO_HDR_FIELD(&hdr[0], IPV4, SRC)
VIRTCHNL_SET_PROTO_HDR_TYPE(&hdr[1], UDP)
VIRTCHNL_ADD_PROTO_HDR_FIELD(&hdr[1], UDP, DST)
The byte array is used to store the protocol header of a training package.
The byte array must be network order.
The patch added virtual channel support for iAVF FDIR add/validate/delete
filter. iAVF FDIR is Flow Director for Intel Adaptive Virtual Function
which can direct Ethernet packets to the queues of the Network Interface
Card. Add/delete command is adding or deleting one rule for each virtual
channel message, while validate command is just verifying if this rule
is valid without any other operations.
To add or delete one rule, driver needs to config TCAM and Profile,
build training packets which contains the input set value, and send
the training packets through FDIR Tx queue. In addition, driver needs to
manage the software context to avoid adding duplicated rules, deleting
non-existent rule, input set conflicts and other invalid cases.
NOTE:
Supported pattern/actions and their parse functions are not be included in
this patch, they will be added in a separate one.
Signed-off-by: Jeff Guo <jia.guo@intel.com>
Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Simei Su <simei.su@intel.com>
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Chen Bo <BoX.C.Chen@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-03-09 11:08:04 +08:00
|
|
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u8 fdid_prio;
|
|
|
|
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u8 comp_report;
|
2020-05-12 09:01:41 +08:00
|
|
|
};
|
|
|
|
|
|
2020-05-12 09:01:42 +08:00
|
|
|
/* Dummy packet filter definition structure */
|
|
|
|
|
struct ice_fdir_base_pkt {
|
|
|
|
|
enum ice_fltr_ptype flow;
|
|
|
|
|
u16 pkt_len;
|
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|
|
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const u8 *pkt;
|
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|
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u16 tun_pkt_len;
|
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const u8 *tun_pkt;
|
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|
|
};
|
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|
|
|
|
2021-10-08 06:56:57 +08:00
|
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|
int ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id);
|
|
|
|
|
int ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id);
|
2021-10-08 06:59:03 +08:00
|
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|
int ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
|
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|
|
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int ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
|
2020-05-12 09:01:42 +08:00
|
|
|
void
|
|
|
|
|
ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
|
|
|
|
|
struct ice_fltr_desc *fdesc, bool add);
|
2021-10-08 06:56:57 +08:00
|
|
|
int
|
2020-05-12 09:01:42 +08:00
|
|
|
ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
|
|
|
|
|
u8 *pkt, bool frag, bool tun);
|
2020-05-12 09:01:41 +08:00
|
|
|
int ice_get_fdir_cnt_all(struct ice_hw *hw);
|
2020-05-12 09:01:42 +08:00
|
|
|
bool ice_fdir_is_dup_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input);
|
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|
|
|
bool ice_fdir_has_frag(enum ice_fltr_ptype flow);
|
2020-05-12 09:01:41 +08:00
|
|
|
struct ice_fdir_fltr *
|
|
|
|
|
ice_fdir_find_fltr_by_idx(struct ice_hw *hw, u32 fltr_idx);
|
2020-05-12 09:01:42 +08:00
|
|
|
void
|
|
|
|
|
ice_fdir_update_cntrs(struct ice_hw *hw, enum ice_fltr_ptype flow, bool add);
|
|
|
|
|
void ice_fdir_list_add_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input);
|
2020-05-12 09:01:40 +08:00
|
|
|
#endif /* _ICE_FDIR_H_ */
|
