2018-01-27 02:50:27 +08:00
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// SPDX-License-Identifier: GPL-2.0
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2016-06-15 02:29:45 +08:00
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/*
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* Intel MID platform PM support
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*
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* Copyright (C) 2016, Intel Corporation
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*
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* Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <asm/cpu_device_id.h>
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#include <asm/intel-family.h>
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#include <asm/intel-mid.h>
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#include "pci.h"
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2021-09-21 03:16:59 +08:00
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static bool pci_mid_pm_enabled __read_mostly;
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bool pci_use_mid_pm(void)
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2016-06-15 02:29:45 +08:00
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{
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2021-09-21 03:16:59 +08:00
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return pci_mid_pm_enabled;
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2016-06-15 02:29:45 +08:00
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}
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2021-09-21 03:16:59 +08:00
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int mid_pci_set_power_state(struct pci_dev *pdev, pci_power_t state)
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2016-06-15 02:29:45 +08:00
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{
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return intel_mid_pci_set_power_state(pdev, state);
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}
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2021-09-21 03:16:59 +08:00
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pci_power_t mid_pci_get_power_state(struct pci_dev *pdev)
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2016-10-23 19:55:34 +08:00
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{
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return intel_mid_pci_get_power_state(pdev);
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}
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2016-09-08 18:32:31 +08:00
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/*
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* This table should be in sync with the one in
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* arch/x86/platform/intel-mid/pwr.c.
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*/
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2016-06-15 02:29:45 +08:00
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static const struct x86_cpu_id lpss_cpu_ids[] = {
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2020-03-20 21:14:02 +08:00
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, NULL),
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, NULL),
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2016-06-15 02:29:45 +08:00
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{}
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};
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static int __init mid_pci_init(void)
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{
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const struct x86_cpu_id *id;
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id = x86_match_cpu(lpss_cpu_ids);
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if (id)
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2021-09-21 03:16:59 +08:00
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pci_mid_pm_enabled = true;
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2016-06-15 02:29:45 +08:00
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return 0;
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}
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arch_initcall(mid_pci_init);
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