2020-10-13 22:46:21 +08:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* LiteUART serial controller (LiteX) Driver
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*
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* Copyright (C) 2019-2020 Antmicro <www.antmicro.com>
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*/
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2022-11-23 21:04:48 +08:00
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#include <linux/bits.h>
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2020-10-13 22:46:21 +08:00
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#include <linux/console.h>
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2022-11-23 21:04:58 +08:00
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#include <linux/interrupt.h>
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2020-10-13 22:46:21 +08:00
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#include <linux/litex.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/serial.h>
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#include <linux/serial_core.h>
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#include <linux/slab.h>
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#include <linux/timer.h>
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#include <linux/tty_flip.h>
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#include <linux/xarray.h>
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/*
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* CSRs definitions (base address offsets + width)
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*
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* The definitions below are true for LiteX SoC configured for 8-bit CSR Bus,
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* 32-bit aligned.
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*
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* Supporting other configurations might require new definitions or a more
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* generic way of indexing the LiteX CSRs.
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*
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* For more details on how CSRs are defined and handled in LiteX, see comments
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* in the LiteX SoC Driver: drivers/soc/litex/litex_soc_ctrl.c
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*/
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#define OFF_RXTX 0x00
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#define OFF_TXFULL 0x04
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#define OFF_RXEMPTY 0x08
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#define OFF_EV_STATUS 0x0c
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#define OFF_EV_PENDING 0x10
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#define OFF_EV_ENABLE 0x14
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/* events */
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2022-11-23 21:04:48 +08:00
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#define EV_TX BIT(0)
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#define EV_RX BIT(1)
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2020-10-13 22:46:21 +08:00
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struct liteuart_port {
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struct uart_port port;
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struct timer_list timer;
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u32 id;
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2022-11-23 21:04:58 +08:00
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u8 irq_reg;
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2020-10-13 22:46:21 +08:00
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};
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#define to_liteuart_port(port) container_of(port, struct liteuart_port, port)
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static DEFINE_XARRAY_FLAGS(liteuart_array, XA_FLAGS_ALLOC);
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#ifdef CONFIG_SERIAL_LITEUART_CONSOLE
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static struct console liteuart_console;
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#endif
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static struct uart_driver liteuart_driver = {
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.owner = THIS_MODULE,
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2022-11-23 21:04:47 +08:00
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.driver_name = KBUILD_MODNAME,
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2020-10-13 22:46:21 +08:00
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.dev_name = "ttyLXU",
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.major = 0,
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.minor = 0,
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.nr = CONFIG_SERIAL_LITEUART_MAX_PORTS,
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#ifdef CONFIG_SERIAL_LITEUART_CONSOLE
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.cons = &liteuart_console,
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#endif
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};
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2022-11-23 21:04:58 +08:00
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static void liteuart_update_irq_reg(struct uart_port *port, bool set, u8 mask)
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{
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struct liteuart_port *uart = to_liteuart_port(port);
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if (set)
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uart->irq_reg |= mask;
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else
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uart->irq_reg &= ~mask;
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if (port->irq)
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litex_write8(port->membase + OFF_EV_ENABLE, uart->irq_reg);
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}
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2022-11-23 21:04:57 +08:00
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static void liteuart_stop_tx(struct uart_port *port)
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{
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2022-11-23 21:04:59 +08:00
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liteuart_update_irq_reg(port, false, EV_TX);
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2022-11-23 21:04:57 +08:00
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}
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static void liteuart_start_tx(struct uart_port *port)
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{
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2022-11-23 21:04:59 +08:00
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liteuart_update_irq_reg(port, true, EV_TX);
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2022-11-23 21:04:57 +08:00
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}
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static void liteuart_stop_rx(struct uart_port *port)
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{
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struct liteuart_port *uart = to_liteuart_port(port);
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/* just delete timer */
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del_timer(&uart->timer);
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}
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2022-11-23 21:04:56 +08:00
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static void liteuart_rx_chars(struct uart_port *port)
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2020-10-13 22:46:21 +08:00
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{
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unsigned char __iomem *membase = port->membase;
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2022-11-23 21:04:55 +08:00
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u8 ch;
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2020-10-13 22:46:21 +08:00
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2022-11-23 21:04:55 +08:00
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while (!litex_read8(membase + OFF_RXEMPTY)) {
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2020-10-13 22:46:21 +08:00
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ch = litex_read8(membase + OFF_RXTX);
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port->icount.rx++;
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/* necessary for RXEMPTY to refresh its value */
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2022-11-23 21:04:53 +08:00
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litex_write8(membase + OFF_EV_PENDING, EV_RX);
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2020-10-13 22:46:21 +08:00
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/* no overflow bits in status */
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if (!(uart_handle_sysrq_char(port, ch)))
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2022-11-23 21:04:55 +08:00
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uart_insert_char(port, 1, 0, ch, TTY_NORMAL);
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2020-10-13 22:46:21 +08:00
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}
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2022-11-23 21:04:52 +08:00
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tty_flip_buffer_push(&port->state->port);
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2022-11-23 21:04:56 +08:00
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}
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2022-11-23 21:04:59 +08:00
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static void liteuart_tx_chars(struct uart_port *port)
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{
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u8 ch;
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uart_port_tx(port, ch,
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!litex_read8(port->membase + OFF_TXFULL),
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litex_write8(port->membase + OFF_RXTX, ch));
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}
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2022-11-23 21:04:58 +08:00
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static irqreturn_t liteuart_interrupt(int irq, void *data)
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{
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struct liteuart_port *uart = data;
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struct uart_port *port = &uart->port;
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unsigned long flags;
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u8 isr;
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/*
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* if polling, the context would be "in_serving_softirq", so use
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* irq[save|restore] spin_lock variants to cover all possibilities
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*/
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spin_lock_irqsave(&port->lock, flags);
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isr = litex_read8(port->membase + OFF_EV_PENDING) & uart->irq_reg;
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if (isr & EV_RX)
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liteuart_rx_chars(port);
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2022-11-23 21:04:59 +08:00
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if (isr & EV_TX)
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liteuart_tx_chars(port);
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2022-11-23 21:04:58 +08:00
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spin_unlock_irqrestore(&port->lock, flags);
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return IRQ_RETVAL(isr);
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}
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2022-11-23 21:04:56 +08:00
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static void liteuart_timer(struct timer_list *t)
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{
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struct liteuart_port *uart = from_timer(uart, t, timer);
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struct uart_port *port = &uart->port;
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2022-11-23 21:04:58 +08:00
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liteuart_interrupt(0, port);
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2020-10-13 22:46:21 +08:00
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mod_timer(&uart->timer, jiffies + uart_poll_timeout(port));
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}
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static unsigned int liteuart_tx_empty(struct uart_port *port)
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{
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/* not really tx empty, just checking if tx is not full */
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if (!litex_read8(port->membase + OFF_TXFULL))
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return TIOCSER_TEMT;
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return 0;
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}
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static void liteuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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/* modem control register is not present in LiteUART */
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}
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static unsigned int liteuart_get_mctrl(struct uart_port *port)
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{
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return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
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}
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static int liteuart_startup(struct uart_port *port)
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{
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struct liteuart_port *uart = to_liteuart_port(port);
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2022-11-23 21:04:58 +08:00
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unsigned long flags;
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int ret;
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if (port->irq) {
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ret = request_irq(port->irq, liteuart_interrupt, 0,
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KBUILD_MODNAME, uart);
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if (ret) {
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dev_warn(port->dev,
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"line %d irq %d failed: switch to polling\n",
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port->line, port->irq);
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port->irq = 0;
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}
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}
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2020-10-13 22:46:21 +08:00
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2022-11-23 21:04:58 +08:00
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spin_lock_irqsave(&port->lock, flags);
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/* only enabling rx irqs during startup */
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liteuart_update_irq_reg(port, true, EV_RX);
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spin_unlock_irqrestore(&port->lock, flags);
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2020-10-13 22:46:21 +08:00
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2022-11-23 21:04:58 +08:00
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if (!port->irq) {
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timer_setup(&uart->timer, liteuart_timer, 0);
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mod_timer(&uart->timer, jiffies + uart_poll_timeout(port));
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}
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2020-10-13 22:46:21 +08:00
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return 0;
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}
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static void liteuart_shutdown(struct uart_port *port)
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{
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2022-11-23 21:04:58 +08:00
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struct liteuart_port *uart = to_liteuart_port(port);
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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liteuart_update_irq_reg(port, false, EV_RX | EV_TX);
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spin_unlock_irqrestore(&port->lock, flags);
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if (port->irq)
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free_irq(port->irq, port);
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else
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del_timer_sync(&uart->timer);
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2020-10-13 22:46:21 +08:00
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}
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static void liteuart_set_termios(struct uart_port *port, struct ktermios *new,
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2022-08-16 19:57:37 +08:00
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const struct ktermios *old)
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2020-10-13 22:46:21 +08:00
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{
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unsigned int baud;
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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/* update baudrate */
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baud = uart_get_baud_rate(port, new, old, 0, 460800);
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uart_update_timeout(port, new->c_cflag, baud);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static const char *liteuart_type(struct uart_port *port)
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{
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return "liteuart";
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}
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static void liteuart_config_port(struct uart_port *port, int flags)
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{
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/*
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* Driver core for serial ports forces a non-zero value for port type.
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* Write an arbitrary value here to accommodate the serial core driver,
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* as ID part of UAPI is redundant.
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*/
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port->type = 1;
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}
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static int liteuart_verify_port(struct uart_port *port,
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struct serial_struct *ser)
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{
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if (port->type != PORT_UNKNOWN && ser->type != 1)
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return -EINVAL;
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return 0;
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}
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static const struct uart_ops liteuart_ops = {
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.tx_empty = liteuart_tx_empty,
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.set_mctrl = liteuart_set_mctrl,
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.get_mctrl = liteuart_get_mctrl,
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.stop_tx = liteuart_stop_tx,
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.start_tx = liteuart_start_tx,
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.stop_rx = liteuart_stop_rx,
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.startup = liteuart_startup,
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.shutdown = liteuart_shutdown,
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.set_termios = liteuart_set_termios,
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.type = liteuart_type,
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.config_port = liteuart_config_port,
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.verify_port = liteuart_verify_port,
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};
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static int liteuart_probe(struct platform_device *pdev)
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{
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struct liteuart_port *uart;
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struct uart_port *port;
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struct xa_limit limit;
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int dev_id, ret;
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/* look for aliases; auto-enumerate for free index if not found */
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dev_id = of_alias_get_id(pdev->dev.of_node, "serial");
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if (dev_id < 0)
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limit = XA_LIMIT(0, CONFIG_SERIAL_LITEUART_MAX_PORTS);
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else
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limit = XA_LIMIT(dev_id, dev_id);
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uart = devm_kzalloc(&pdev->dev, sizeof(struct liteuart_port), GFP_KERNEL);
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if (!uart)
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return -ENOMEM;
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ret = xa_alloc(&liteuart_array, &dev_id, uart, limit, GFP_KERNEL);
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if (ret)
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return ret;
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uart->id = dev_id;
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port = &uart->port;
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/* get membase */
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port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
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2021-11-17 18:05:11 +08:00
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if (IS_ERR(port->membase)) {
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ret = PTR_ERR(port->membase);
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goto err_erase_id;
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}
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2020-10-13 22:46:21 +08:00
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2022-11-23 21:04:58 +08:00
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ret = platform_get_irq_optional(pdev, 0);
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if (ret < 0 && ret != -ENXIO)
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2023-01-24 01:38:57 +08:00
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goto err_erase_id;
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2022-11-23 21:04:58 +08:00
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if (ret > 0)
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port->irq = ret;
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2020-10-13 22:46:21 +08:00
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/* values not from device tree */
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port->dev = &pdev->dev;
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port->iotype = UPIO_MEM;
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port->flags = UPF_BOOT_AUTOCONF;
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port->ops = &liteuart_ops;
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port->fifosize = 16;
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port->type = PORT_UNKNOWN;
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port->line = dev_id;
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spin_lock_init(&port->lock);
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2021-11-16 05:49:44 +08:00
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platform_set_drvdata(pdev, port);
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2021-11-17 18:05:11 +08:00
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ret = uart_add_one_port(&liteuart_driver, &uart->port);
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if (ret)
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goto err_erase_id;
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return 0;
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|
|
|
err_erase_id:
|
|
|
|
xa_erase(&liteuart_array, uart->id);
|
|
|
|
|
|
|
|
return ret;
|
2020-10-13 22:46:21 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static int liteuart_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct uart_port *port = platform_get_drvdata(pdev);
|
|
|
|
struct liteuart_port *uart = to_liteuart_port(port);
|
|
|
|
|
2021-11-17 18:05:10 +08:00
|
|
|
uart_remove_one_port(&liteuart_driver, port);
|
2020-10-13 22:46:21 +08:00
|
|
|
xa_erase(&liteuart_array, uart->id);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct of_device_id liteuart_of_match[] = {
|
|
|
|
{ .compatible = "litex,liteuart" },
|
|
|
|
{}
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, liteuart_of_match);
|
|
|
|
|
|
|
|
static struct platform_driver liteuart_platform_driver = {
|
|
|
|
.probe = liteuart_probe,
|
|
|
|
.remove = liteuart_remove,
|
|
|
|
.driver = {
|
2022-11-23 21:04:47 +08:00
|
|
|
.name = KBUILD_MODNAME,
|
2020-10-13 22:46:21 +08:00
|
|
|
.of_match_table = liteuart_of_match,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
#ifdef CONFIG_SERIAL_LITEUART_CONSOLE
|
|
|
|
|
2022-11-23 21:05:00 +08:00
|
|
|
static void liteuart_putchar(struct uart_port *port, unsigned char ch)
|
|
|
|
{
|
|
|
|
while (litex_read8(port->membase + OFF_TXFULL))
|
|
|
|
cpu_relax();
|
|
|
|
|
|
|
|
litex_write8(port->membase + OFF_RXTX, ch);
|
|
|
|
}
|
|
|
|
|
2020-10-13 22:46:21 +08:00
|
|
|
static void liteuart_console_write(struct console *co, const char *s,
|
|
|
|
unsigned int count)
|
|
|
|
{
|
|
|
|
struct liteuart_port *uart;
|
|
|
|
struct uart_port *port;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
uart = (struct liteuart_port *)xa_load(&liteuart_array, co->index);
|
|
|
|
port = &uart->port;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&port->lock, flags);
|
|
|
|
uart_console_write(port, s, count, liteuart_putchar);
|
|
|
|
spin_unlock_irqrestore(&port->lock, flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int liteuart_console_setup(struct console *co, char *options)
|
|
|
|
{
|
|
|
|
struct liteuart_port *uart;
|
|
|
|
struct uart_port *port;
|
|
|
|
int baud = 115200;
|
|
|
|
int bits = 8;
|
|
|
|
int parity = 'n';
|
|
|
|
int flow = 'n';
|
|
|
|
|
|
|
|
uart = (struct liteuart_port *)xa_load(&liteuart_array, co->index);
|
|
|
|
if (!uart)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
port = &uart->port;
|
|
|
|
if (!port->membase)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
if (options)
|
|
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
|
|
|
|
|
|
return uart_set_options(port, co, baud, parity, bits, flow);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct console liteuart_console = {
|
2022-11-23 21:04:47 +08:00
|
|
|
.name = KBUILD_MODNAME,
|
2020-10-13 22:46:21 +08:00
|
|
|
.write = liteuart_console_write,
|
|
|
|
.device = uart_console_device,
|
|
|
|
.setup = liteuart_console_setup,
|
|
|
|
.flags = CON_PRINTBUFFER,
|
|
|
|
.index = -1,
|
|
|
|
.data = &liteuart_driver,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init liteuart_console_init(void)
|
|
|
|
{
|
|
|
|
register_console(&liteuart_console);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
console_initcall(liteuart_console_init);
|
2021-05-17 19:54:52 +08:00
|
|
|
|
|
|
|
static void early_liteuart_write(struct console *console, const char *s,
|
|
|
|
unsigned int count)
|
|
|
|
{
|
|
|
|
struct earlycon_device *device = console->data;
|
|
|
|
struct uart_port *port = &device->port;
|
|
|
|
|
|
|
|
uart_console_write(port, s, count, liteuart_putchar);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __init early_liteuart_setup(struct earlycon_device *device,
|
|
|
|
const char *options)
|
|
|
|
{
|
|
|
|
if (!device->port.membase)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
device->con->write = early_liteuart_write;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
OF_EARLYCON_DECLARE(liteuart, "litex,liteuart", early_liteuart_setup);
|
2020-10-13 22:46:21 +08:00
|
|
|
#endif /* CONFIG_SERIAL_LITEUART_CONSOLE */
|
|
|
|
|
|
|
|
static int __init liteuart_init(void)
|
|
|
|
{
|
|
|
|
int res;
|
|
|
|
|
|
|
|
res = uart_register_driver(&liteuart_driver);
|
|
|
|
if (res)
|
|
|
|
return res;
|
|
|
|
|
|
|
|
res = platform_driver_register(&liteuart_platform_driver);
|
2022-11-23 21:04:51 +08:00
|
|
|
if (res)
|
2020-10-13 22:46:21 +08:00
|
|
|
uart_unregister_driver(&liteuart_driver);
|
|
|
|
|
2022-11-23 21:04:51 +08:00
|
|
|
return res;
|
2020-10-13 22:46:21 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit liteuart_exit(void)
|
|
|
|
{
|
|
|
|
platform_driver_unregister(&liteuart_platform_driver);
|
|
|
|
uart_unregister_driver(&liteuart_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
module_init(liteuart_init);
|
|
|
|
module_exit(liteuart_exit);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Antmicro <www.antmicro.com>");
|
|
|
|
MODULE_DESCRIPTION("LiteUART serial driver");
|
|
|
|
MODULE_LICENSE("GPL v2");
|
2022-01-04 21:10:28 +08:00
|
|
|
MODULE_ALIAS("platform:liteuart");
|