2009-09-08 08:10:24 +08:00
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/*
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* Copyright 2008 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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* Copyright 2009 Jerome Glisse.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alex Deucher
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* Jerome Glisse
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*/
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#ifndef __R100D_H__
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#define __R100D_H__
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#define CP_PACKET0 0x00000000
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#define PACKET0_BASE_INDEX_SHIFT 0
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#define PACKET0_BASE_INDEX_MASK (0x1ffff << 0)
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#define PACKET0_COUNT_SHIFT 16
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#define PACKET0_COUNT_MASK (0x3fff << 16)
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#define CP_PACKET1 0x40000000
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#define CP_PACKET2 0x80000000
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#define PACKET2_PAD_SHIFT 0
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#define PACKET2_PAD_MASK (0x3fffffff << 0)
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#define CP_PACKET3 0xC0000000
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#define PACKET3_IT_OPCODE_SHIFT 8
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#define PACKET3_IT_OPCODE_MASK (0xff << 8)
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#define PACKET3_COUNT_SHIFT 16
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#define PACKET3_COUNT_MASK (0x3fff << 16)
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/* PACKET3 op code */
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#define PACKET3_NOP 0x10
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#define PACKET3_3D_DRAW_VBUF 0x28
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#define PACKET3_3D_DRAW_IMMD 0x29
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#define PACKET3_3D_DRAW_INDX 0x2A
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#define PACKET3_3D_LOAD_VBPNTR 0x2F
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#define PACKET3_INDX_BUFFER 0x33
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#define PACKET3_3D_DRAW_VBUF_2 0x34
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#define PACKET3_3D_DRAW_IMMD_2 0x35
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#define PACKET3_3D_DRAW_INDX_2 0x36
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#define PACKET3_BITBLT_MULTI 0x9B
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#define PACKET0(reg, n) (CP_PACKET0 | \
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REG_SET(PACKET0_BASE_INDEX, (reg) >> 2) | \
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REG_SET(PACKET0_COUNT, (n)))
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#define PACKET2(v) (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))
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#define PACKET3(op, n) (CP_PACKET3 | \
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REG_SET(PACKET3_IT_OPCODE, (op)) | \
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REG_SET(PACKET3_COUNT, (n)))
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#define PACKET_TYPE0 0
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#define PACKET_TYPE1 1
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#define PACKET_TYPE2 2
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#define PACKET_TYPE3 3
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#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
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#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)
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#define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2)
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#define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1)
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#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)
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2009-09-10 04:23:45 +08:00
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/* Registers */
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#define R_000E40_RBBM_STATUS 0x000E40
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#define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0)
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#define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F)
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#define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80
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#define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8)
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#define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1)
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#define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF
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#define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9)
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#define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1)
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#define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF
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#define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10)
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#define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1)
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#define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF
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#define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11)
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#define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1)
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#define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF
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#define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12)
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#define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1)
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#define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF
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#define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13)
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#define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1)
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#define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF
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#define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14)
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#define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1)
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#define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF
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#define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15)
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#define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1)
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#define C_000E40_ENG_EV_BUSY 0xFFFF7FFF
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#define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16)
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#define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1)
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#define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF
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#define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17)
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#define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1)
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#define C_000E40_E2_BUSY 0xFFFDFFFF
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#define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18)
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#define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1)
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#define C_000E40_RB2D_BUSY 0xFFFBFFFF
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#define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19)
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#define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1)
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#define C_000E40_RB3D_BUSY 0xFFF7FFFF
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#define S_000E40_SE_BUSY(x) (((x) & 0x1) << 20)
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#define G_000E40_SE_BUSY(x) (((x) >> 20) & 0x1)
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#define C_000E40_SE_BUSY 0xFFEFFFFF
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#define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21)
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#define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1)
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#define C_000E40_RE_BUSY 0xFFDFFFFF
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#define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22)
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#define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1)
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#define C_000E40_TAM_BUSY 0xFFBFFFFF
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#define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23)
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#define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1)
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#define C_000E40_TDM_BUSY 0xFF7FFFFF
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#define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24)
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#define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1)
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#define C_000E40_PB_BUSY 0xFEFFFFFF
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#define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31)
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#define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1)
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#define C_000E40_GUI_ACTIVE 0x7FFFFFFF
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2009-09-08 08:10:24 +08:00
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#endif
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