korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-12-29 22:14:41 +08:00
Code Issues Packages Projects Releases Wiki Activity
d3bc6269e2
linux/arch/arm/mach-omap2/prcm_mpu54xx.h

85 lines
3.1 KiB
C
Raw Normal View History

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-04 16:11:33 +08:00
/* SPDX-License-Identifier: GPL-2.0-only */
ARM: OMAP5: PRCM: Add OMAP54XX local MPU PRCM registers Add the PRCM MPU registers for OMAP54XX platforms. Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> [santosh.shilimkar@ti.com: Generated es2.0 data] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-05-30 00:38:06 +08:00
/*
* OMAP54xx PRCM MPU instance offset macros
*
ARM: OMAP2+: Replace HTTP links with HTTPS ones Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-07-19 18:30:33 +08:00
* Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com
ARM: OMAP5: PRCM: Add OMAP54XX local MPU PRCM registers Add the PRCM MPU registers for OMAP54XX platforms. Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> [santosh.shilimkar@ti.com: Generated es2.0 data] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-05-30 00:38:06 +08:00
*
* Paul Walmsley (paul@pwsan.com)
* Rajendra Nayak (rnayak@ti.com)
* Benoit Cousson (b-cousson@ti.com)
*
* This file is automatically generated from the OMAP hardware databases.
* We respectfully ask that any modifications to this file be coordinated
* with the public linux-omap@vger.kernel.org mailing list and the
* authors above to ensure that the autogeneration scripts are kept
* up-to-date with the file contents.
*/
#ifndef __ARCH_ARM_MACH_OMAP2_PRCM_MPU54XX_H
#define __ARCH_ARM_MACH_OMAP2_PRCM_MPU54XX_H
#include "prcm_mpu_44xx_54xx.h"
#include "common.h"
#define OMAP54XX_PRCM_MPU_BASE 0x48243000
#define OMAP54XX_PRCM_MPU_REGADDR(inst, reg) \
OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE + (inst) + (reg))
/* PRCM_MPU instances */
#define OMAP54XX_PRCM_MPU_OCP_SOCKET_INST 0x0000
#define OMAP54XX_PRCM_MPU_DEVICE_INST 0x0200
#define OMAP54XX_PRCM_MPU_PRM_C0_INST 0x0400
#define OMAP54XX_PRCM_MPU_CM_C0_INST 0x0600
#define OMAP54XX_PRCM_MPU_PRM_C1_INST 0x0800
#define OMAP54XX_PRCM_MPU_CM_C1_INST 0x0a00
/* PRCM_MPU clockdomain register offsets (from instance start) */
#define OMAP54XX_PRCM_MPU_CM_C0_CPU0_CDOFFS 0x0000
#define OMAP54XX_PRCM_MPU_CM_C1_CPU1_CDOFFS 0x0000
/*
* PRCM_MPU
*
* The PRCM_MPU is a local PRCM inside the MPU subsystem. For the PRCM (global)
* point of view the PRCM_MPU is a single entity. It shares the same
* programming model as the global PRCM and thus can be assimilate as two new
* MOD inside the PRCM
*/
/* PRCM_MPU.PRCM_MPU_OCP_SOCKET register offsets */
#define OMAP54XX_REVISION_PRCM_MPU_OFFSET 0x0000
/* PRCM_MPU.PRCM_MPU_DEVICE register offsets */
#define OMAP54XX_PRCM_MPU_PRM_RSTST_OFFSET 0x0000
#define OMAP54XX_PRCM_MPU_PRM_PSCON_COUNT_OFFSET 0x0004
#define OMAP54XX_PRM_FRAC_INCREMENTER_NUMERATOR_OFFSET 0x0010
#define OMAP54XX_PRM_FRAC_INCREMENTER_DENUMERATOR_RELOAD_OFFSET 0x0014
/* PRCM_MPU.PRCM_MPU_PRM_C0 register offsets */
#define OMAP54XX_PM_CPU0_PWRSTCTRL_OFFSET 0x0000
#define OMAP54XX_PM_CPU0_PWRSTST_OFFSET 0x0004
#define OMAP54XX_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x0010
#define OMAP54XX_RM_CPU0_CPU0_RSTST_OFFSET 0x0014
#define OMAP54XX_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0024
/* PRCM_MPU.PRCM_MPU_CM_C0 register offsets */
#define OMAP54XX_CM_CPU0_CLKSTCTRL_OFFSET 0x0000
#define OMAP54XX_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0020
#define OMAP54XX_CM_CPU0_CPU0_CLKCTRL OMAP54XX_PRCM_MPU_REGADDR(OMAP54XX_PRCM_MPU_CM_C0_INST, 0x0020)
/* PRCM_MPU.PRCM_MPU_PRM_C1 register offsets */
#define OMAP54XX_PM_CPU1_PWRSTCTRL_OFFSET 0x0000
#define OMAP54XX_PM_CPU1_PWRSTST_OFFSET 0x0004
#define OMAP54XX_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x0010
#define OMAP54XX_RM_CPU1_CPU1_RSTST_OFFSET 0x0014
#define OMAP54XX_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0024
/* PRCM_MPU.PRCM_MPU_CM_C1 register offsets */
#define OMAP54XX_CM_CPU1_CLKSTCTRL_OFFSET 0x0000
#define OMAP54XX_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0020
#define OMAP54XX_CM_CPU1_CPU1_CLKCTRL OMAP54XX_PRCM_MPU_REGADDR(OMAP54XX_PRCM_MPU_CM_C1_INST, 0x0020)
#endif
Reference in New Issue Copy Permalink