2018-03-16 23:14:11 +08:00
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// SPDX-License-Identifier: GPL-2.0+
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2012-05-24 21:01:14 +08:00
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/*
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* System monitoring driver for DA9052 PMICs.
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*
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* Copyright(c) 2012 Dialog Semiconductor Ltd.
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*
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* Author: Anthony Olech <Anthony.Olech@diasemi.com>
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*
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*/
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/uaccess.h>
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#include <linux/platform_device.h>
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#include <linux/time.h>
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#include <linux/watchdog.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/jiffies.h>
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#include <linux/mfd/da9052/reg.h>
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#include <linux/mfd/da9052/da9052.h>
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#define DA9052_DEF_TIMEOUT 4
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#define DA9052_TWDMIN 256
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struct da9052_wdt_data {
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struct watchdog_device wdt;
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struct da9052 *da9052;
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unsigned long jpast;
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};
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static const struct {
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u8 reg_val;
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int time; /* Seconds */
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} da9052_wdt_maps[] = {
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{ 1, 2 },
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{ 2, 4 },
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{ 3, 8 },
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{ 4, 16 },
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{ 5, 32 },
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{ 5, 33 }, /* Actual time 32.768s so included both 32s and 33s */
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{ 6, 65 },
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{ 6, 66 }, /* Actual time 65.536s so include both, 65s and 66s */
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{ 7, 131 },
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};
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static int da9052_wdt_set_timeout(struct watchdog_device *wdt_dev,
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unsigned int timeout)
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{
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struct da9052_wdt_data *driver_data = watchdog_get_drvdata(wdt_dev);
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struct da9052 *da9052 = driver_data->da9052;
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int ret, i;
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/*
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* Disable the Watchdog timer before setting
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* new time out.
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*/
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ret = da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
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DA9052_CONTROLD_TWDSCALE, 0);
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if (ret < 0) {
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dev_err(da9052->dev, "Failed to disable watchdog bit, %d\n",
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ret);
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return ret;
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}
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if (timeout) {
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/*
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* To change the timeout, da9052 needs to
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* be disabled for at least 150 us.
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*/
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udelay(150);
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/* Set the desired timeout */
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for (i = 0; i < ARRAY_SIZE(da9052_wdt_maps); i++)
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if (da9052_wdt_maps[i].time == timeout)
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break;
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if (i == ARRAY_SIZE(da9052_wdt_maps))
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ret = -EINVAL;
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else
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ret = da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
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DA9052_CONTROLD_TWDSCALE,
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da9052_wdt_maps[i].reg_val);
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if (ret < 0) {
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dev_err(da9052->dev,
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"Failed to update timescale bit, %d\n", ret);
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return ret;
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}
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wdt_dev->timeout = timeout;
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driver_data->jpast = jiffies;
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}
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return 0;
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}
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static int da9052_wdt_start(struct watchdog_device *wdt_dev)
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{
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return da9052_wdt_set_timeout(wdt_dev, wdt_dev->timeout);
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}
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static int da9052_wdt_stop(struct watchdog_device *wdt_dev)
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{
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return da9052_wdt_set_timeout(wdt_dev, 0);
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}
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static int da9052_wdt_ping(struct watchdog_device *wdt_dev)
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{
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struct da9052_wdt_data *driver_data = watchdog_get_drvdata(wdt_dev);
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struct da9052 *da9052 = driver_data->da9052;
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unsigned long msec, jnow = jiffies;
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int ret;
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/*
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* We have a minimum time for watchdog window called TWDMIN. A write
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* to the watchdog before this elapsed time should cause an error.
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*/
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msec = (jnow - driver_data->jpast) * 1000/HZ;
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if (msec < DA9052_TWDMIN)
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mdelay(msec);
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/* Reset the watchdog timer */
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ret = da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
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DA9052_CONTROLD_WATCHDOG, 1 << 7);
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if (ret < 0)
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2017-01-11 07:21:47 +08:00
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return ret;
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2012-05-24 21:01:14 +08:00
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/*
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* FIXME: Reset the watchdog core, in general PMIC
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* is supposed to do this
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*/
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2017-01-11 07:21:47 +08:00
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return da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
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DA9052_CONTROLD_WATCHDOG, 0 << 7);
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2012-05-24 21:01:14 +08:00
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}
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2016-12-27 01:05:11 +08:00
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static const struct watchdog_info da9052_wdt_info = {
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2012-05-24 21:01:14 +08:00
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
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.identity = "DA9052 Watchdog",
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};
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static const struct watchdog_ops da9052_wdt_ops = {
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.owner = THIS_MODULE,
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.start = da9052_wdt_start,
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.stop = da9052_wdt_stop,
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.ping = da9052_wdt_ping,
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.set_timeout = da9052_wdt_set_timeout,
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};
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2012-11-20 02:21:41 +08:00
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static int da9052_wdt_probe(struct platform_device *pdev)
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2012-05-24 21:01:14 +08:00
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{
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2019-04-09 03:38:33 +08:00
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struct device *dev = &pdev->dev;
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struct da9052 *da9052 = dev_get_drvdata(dev->parent);
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2012-05-24 21:01:14 +08:00
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struct da9052_wdt_data *driver_data;
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struct watchdog_device *da9052_wdt;
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int ret;
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2019-04-09 03:38:33 +08:00
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driver_data = devm_kzalloc(dev, sizeof(*driver_data), GFP_KERNEL);
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2017-01-11 07:21:47 +08:00
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if (!driver_data)
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return -ENOMEM;
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2012-05-24 21:01:14 +08:00
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driver_data->da9052 = da9052;
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da9052_wdt = &driver_data->wdt;
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da9052_wdt->timeout = DA9052_DEF_TIMEOUT;
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da9052_wdt->info = &da9052_wdt_info;
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da9052_wdt->ops = &da9052_wdt_ops;
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2019-04-09 03:38:33 +08:00
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da9052_wdt->parent = dev;
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2012-05-24 21:01:14 +08:00
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watchdog_set_drvdata(da9052_wdt, driver_data);
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ret = da9052_reg_update(da9052, DA9052_CONTROL_D_REG,
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DA9052_CONTROLD_TWDSCALE, 0);
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if (ret < 0) {
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2019-04-09 03:38:33 +08:00
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dev_err(dev, "Failed to disable watchdog bits, %d\n", ret);
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2017-01-11 07:21:47 +08:00
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return ret;
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2012-05-24 21:01:14 +08:00
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}
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2019-05-19 05:27:23 +08:00
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return devm_watchdog_register_device(dev, &driver_data->wdt);
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2012-05-24 21:01:14 +08:00
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}
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static struct platform_driver da9052_wdt_driver = {
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.probe = da9052_wdt_probe,
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.driver = {
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.name = "da9052-watchdog",
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},
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};
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module_platform_driver(da9052_wdt_driver);
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MODULE_AUTHOR("Anthony Olech <Anthony.Olech@diasemi.com>");
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MODULE_DESCRIPTION("DA9052 SM Device Driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:da9052-watchdog");
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