2016-03-31 10:48:04 +08:00
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/*
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* Samsung's Exynos3250 based ARTIK5 evaluation board device tree source
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*
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* Copyright (c) 2016 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Device tree source file for Samsung's ARTIK5 evaluation board
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* which is based on Samsung Exynos3250 SoC.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "exynos3250-artik5.dtsi"
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/ {
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model = "Samsung ARTIK5 evaluation board";
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compatible = "samsung,artik5-eval", "samsung,artik5",
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"samsung,exynos3250", "samsung,exynos3";
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};
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2016-03-31 10:48:05 +08:00
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&mshc_2 {
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num-slots = <1>;
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cap-sd-highspeed;
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disable-wp;
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vqmmc-supply = <&ldo3_reg>;
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card-detect-delay = <200>;
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clock-frequency = <100000000>;
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2016-11-03 14:21:32 +08:00
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max-frequency = <100000000>;
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2016-03-31 10:48:05 +08:00
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samsung,dw-mshc-ciu-div = <1>;
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samsung,dw-mshc-sdr-timing = <0 1>;
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samsung,dw-mshc-ddr-timing = <1 2>;
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pinctrl-names = "default";
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pinctrl-0 = <&sd2_cmd &sd2_clk &sd2_cd &sd2_bus1 &sd2_bus4>;
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bus-width = <4>;
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status = "okay";
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};
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2016-03-31 10:48:04 +08:00
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&serial_2 {
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status = "okay";
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};
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