2018-05-20 02:43:54 +08:00
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// SPDX-License-Identifier: GPL-2.0
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//
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// imx35 pinctrl driver.
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//
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// This driver was mostly copied from the imx51 pinctrl driver which has:
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//
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// Copyright (C) 2012 Freescale Semiconductor, Inc.
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// Copyright (C) 2012 Linaro, Inc.
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//
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// Author: Dong Aisheng <dong.aisheng@linaro.org>
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2012-08-10 00:23:32 +08:00
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include "pinctrl-imx.h"
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enum imx35_pads {
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2013-02-20 10:32:52 +08:00
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MX35_PAD_RESERVE0 = 0,
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MX35_PAD_CAPTURE = 1,
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MX35_PAD_COMPARE = 2,
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MX35_PAD_WDOG_RST = 3,
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MX35_PAD_GPIO1_0 = 4,
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MX35_PAD_GPIO1_1 = 5,
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MX35_PAD_GPIO2_0 = 6,
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MX35_PAD_GPIO3_0 = 7,
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MX35_PAD_CLKO = 8,
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MX35_PAD_VSTBY = 9,
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MX35_PAD_A0 = 10,
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MX35_PAD_A1 = 11,
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MX35_PAD_A2 = 12,
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MX35_PAD_A3 = 13,
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MX35_PAD_A4 = 14,
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MX35_PAD_A5 = 15,
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MX35_PAD_A6 = 16,
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MX35_PAD_A7 = 17,
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MX35_PAD_A8 = 18,
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MX35_PAD_A9 = 19,
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MX35_PAD_A10 = 20,
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MX35_PAD_MA10 = 21,
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MX35_PAD_A11 = 22,
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MX35_PAD_A12 = 23,
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MX35_PAD_A13 = 24,
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MX35_PAD_A14 = 25,
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MX35_PAD_A15 = 26,
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MX35_PAD_A16 = 27,
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MX35_PAD_A17 = 28,
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MX35_PAD_A18 = 29,
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MX35_PAD_A19 = 30,
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MX35_PAD_A20 = 31,
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MX35_PAD_A21 = 32,
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MX35_PAD_A22 = 33,
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MX35_PAD_A23 = 34,
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MX35_PAD_A24 = 35,
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MX35_PAD_A25 = 36,
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MX35_PAD_EB0 = 37,
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MX35_PAD_EB1 = 38,
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MX35_PAD_OE = 39,
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MX35_PAD_CS0 = 40,
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MX35_PAD_CS1 = 41,
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MX35_PAD_CS2 = 42,
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MX35_PAD_CS3 = 43,
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MX35_PAD_CS4 = 44,
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MX35_PAD_CS5 = 45,
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MX35_PAD_NF_CE0 = 46,
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MX35_PAD_LBA = 47,
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MX35_PAD_BCLK = 48,
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MX35_PAD_RW = 49,
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MX35_PAD_NFWE_B = 50,
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MX35_PAD_NFRE_B = 51,
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MX35_PAD_NFALE = 52,
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MX35_PAD_NFCLE = 53,
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MX35_PAD_NFWP_B = 54,
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MX35_PAD_NFRB = 55,
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MX35_PAD_CSI_D8 = 56,
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MX35_PAD_CSI_D9 = 57,
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MX35_PAD_CSI_D10 = 58,
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MX35_PAD_CSI_D11 = 59,
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MX35_PAD_CSI_D12 = 60,
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MX35_PAD_CSI_D13 = 61,
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MX35_PAD_CSI_D14 = 62,
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MX35_PAD_CSI_D15 = 63,
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MX35_PAD_CSI_MCLK = 64,
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MX35_PAD_CSI_VSYNC = 65,
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MX35_PAD_CSI_HSYNC = 66,
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MX35_PAD_CSI_PIXCLK = 67,
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MX35_PAD_I2C1_CLK = 68,
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MX35_PAD_I2C1_DAT = 69,
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MX35_PAD_I2C2_CLK = 70,
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MX35_PAD_I2C2_DAT = 71,
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MX35_PAD_STXD4 = 72,
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MX35_PAD_SRXD4 = 73,
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MX35_PAD_SCK4 = 74,
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MX35_PAD_STXFS4 = 75,
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MX35_PAD_STXD5 = 76,
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MX35_PAD_SRXD5 = 77,
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MX35_PAD_SCK5 = 78,
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MX35_PAD_STXFS5 = 79,
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MX35_PAD_SCKR = 80,
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MX35_PAD_FSR = 81,
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MX35_PAD_HCKR = 82,
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MX35_PAD_SCKT = 83,
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MX35_PAD_FST = 84,
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MX35_PAD_HCKT = 85,
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MX35_PAD_TX5_RX0 = 86,
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MX35_PAD_TX4_RX1 = 87,
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MX35_PAD_TX3_RX2 = 88,
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MX35_PAD_TX2_RX3 = 89,
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MX35_PAD_TX1 = 90,
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MX35_PAD_TX0 = 91,
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MX35_PAD_CSPI1_MOSI = 92,
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MX35_PAD_CSPI1_MISO = 93,
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MX35_PAD_CSPI1_SS0 = 94,
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MX35_PAD_CSPI1_SS1 = 95,
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MX35_PAD_CSPI1_SCLK = 96,
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MX35_PAD_CSPI1_SPI_RDY = 97,
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MX35_PAD_RXD1 = 98,
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MX35_PAD_TXD1 = 99,
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MX35_PAD_RTS1 = 100,
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MX35_PAD_CTS1 = 101,
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MX35_PAD_RXD2 = 102,
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MX35_PAD_TXD2 = 103,
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MX35_PAD_RTS2 = 104,
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MX35_PAD_CTS2 = 105,
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MX35_PAD_USBOTG_PWR = 106,
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MX35_PAD_USBOTG_OC = 107,
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MX35_PAD_LD0 = 108,
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MX35_PAD_LD1 = 109,
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MX35_PAD_LD2 = 110,
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MX35_PAD_LD3 = 111,
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MX35_PAD_LD4 = 112,
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MX35_PAD_LD5 = 113,
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MX35_PAD_LD6 = 114,
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MX35_PAD_LD7 = 115,
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MX35_PAD_LD8 = 116,
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MX35_PAD_LD9 = 117,
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MX35_PAD_LD10 = 118,
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MX35_PAD_LD11 = 119,
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MX35_PAD_LD12 = 120,
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MX35_PAD_LD13 = 121,
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MX35_PAD_LD14 = 122,
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MX35_PAD_LD15 = 123,
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MX35_PAD_LD16 = 124,
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MX35_PAD_LD17 = 125,
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MX35_PAD_LD18 = 126,
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MX35_PAD_LD19 = 127,
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MX35_PAD_LD20 = 128,
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MX35_PAD_LD21 = 129,
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MX35_PAD_LD22 = 130,
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MX35_PAD_LD23 = 131,
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MX35_PAD_D3_HSYNC = 132,
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MX35_PAD_D3_FPSHIFT = 133,
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MX35_PAD_D3_DRDY = 134,
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MX35_PAD_CONTRAST = 135,
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MX35_PAD_D3_VSYNC = 136,
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MX35_PAD_D3_REV = 137,
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MX35_PAD_D3_CLS = 138,
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MX35_PAD_D3_SPL = 139,
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MX35_PAD_SD1_CMD = 140,
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MX35_PAD_SD1_CLK = 141,
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MX35_PAD_SD1_DATA0 = 142,
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MX35_PAD_SD1_DATA1 = 143,
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MX35_PAD_SD1_DATA2 = 144,
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MX35_PAD_SD1_DATA3 = 145,
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MX35_PAD_SD2_CMD = 146,
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MX35_PAD_SD2_CLK = 147,
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MX35_PAD_SD2_DATA0 = 148,
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MX35_PAD_SD2_DATA1 = 149,
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MX35_PAD_SD2_DATA2 = 150,
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MX35_PAD_SD2_DATA3 = 151,
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MX35_PAD_ATA_CS0 = 152,
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MX35_PAD_ATA_CS1 = 153,
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MX35_PAD_ATA_DIOR = 154,
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MX35_PAD_ATA_DIOW = 155,
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MX35_PAD_ATA_DMACK = 156,
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MX35_PAD_ATA_RESET_B = 157,
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MX35_PAD_ATA_IORDY = 158,
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MX35_PAD_ATA_DATA0 = 159,
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MX35_PAD_ATA_DATA1 = 160,
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MX35_PAD_ATA_DATA2 = 161,
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MX35_PAD_ATA_DATA3 = 162,
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MX35_PAD_ATA_DATA4 = 163,
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MX35_PAD_ATA_DATA5 = 164,
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MX35_PAD_ATA_DATA6 = 165,
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MX35_PAD_ATA_DATA7 = 166,
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MX35_PAD_ATA_DATA8 = 167,
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MX35_PAD_ATA_DATA9 = 168,
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MX35_PAD_ATA_DATA10 = 169,
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MX35_PAD_ATA_DATA11 = 170,
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MX35_PAD_ATA_DATA12 = 171,
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MX35_PAD_ATA_DATA13 = 172,
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MX35_PAD_ATA_DATA14 = 173,
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MX35_PAD_ATA_DATA15 = 174,
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MX35_PAD_ATA_INTRQ = 175,
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MX35_PAD_ATA_BUFF_EN = 176,
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MX35_PAD_ATA_DMARQ = 177,
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MX35_PAD_ATA_DA0 = 178,
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MX35_PAD_ATA_DA1 = 179,
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MX35_PAD_ATA_DA2 = 180,
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MX35_PAD_MLB_CLK = 181,
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MX35_PAD_MLB_DAT = 182,
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MX35_PAD_MLB_SIG = 183,
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MX35_PAD_FEC_TX_CLK = 184,
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MX35_PAD_FEC_RX_CLK = 185,
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MX35_PAD_FEC_RX_DV = 186,
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MX35_PAD_FEC_COL = 187,
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MX35_PAD_FEC_RDATA0 = 188,
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MX35_PAD_FEC_TDATA0 = 189,
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MX35_PAD_FEC_TX_EN = 190,
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MX35_PAD_FEC_MDC = 191,
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MX35_PAD_FEC_MDIO = 192,
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MX35_PAD_FEC_TX_ERR = 193,
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MX35_PAD_FEC_RX_ERR = 194,
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MX35_PAD_FEC_CRS = 195,
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MX35_PAD_FEC_RDATA1 = 196,
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MX35_PAD_FEC_TDATA1 = 197,
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MX35_PAD_FEC_RDATA2 = 198,
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MX35_PAD_FEC_TDATA2 = 199,
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MX35_PAD_FEC_RDATA3 = 200,
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MX35_PAD_FEC_TDATA3 = 201,
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MX35_PAD_RESERVE1 = 202,
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MX35_PAD_RESERVE2 = 203,
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MX35_PAD_RESERVE3 = 204,
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MX35_PAD_RESERVE4 = 205,
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MX35_PAD_RESERVE5 = 206,
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MX35_PAD_RESERVE6 = 207,
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MX35_PAD_RESERVE7 = 208,
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MX35_PAD_RESET_IN_B = 209,
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MX35_PAD_POR_B = 210,
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MX35_PAD_RESERVE8 = 211,
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MX35_PAD_BOOT_MODE0 = 212,
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MX35_PAD_BOOT_MODE1 = 213,
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MX35_PAD_CLK_MODE0 = 214,
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MX35_PAD_CLK_MODE1 = 215,
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MX35_PAD_POWER_FAIL = 216,
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MX35_PAD_RESERVE9 = 217,
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MX35_PAD_RESERVE10 = 218,
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MX35_PAD_RESERVE11 = 219,
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MX35_PAD_RESERVE12 = 220,
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MX35_PAD_RESERVE13 = 221,
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MX35_PAD_RESERVE14 = 222,
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MX35_PAD_RESERVE15 = 223,
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MX35_PAD_RESERVE16 = 224,
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MX35_PAD_RESERVE17 = 225,
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MX35_PAD_RESERVE18 = 226,
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MX35_PAD_RESERVE19 = 227,
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MX35_PAD_RESERVE20 = 228,
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MX35_PAD_RESERVE21 = 229,
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MX35_PAD_RESERVE22 = 230,
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MX35_PAD_RESERVE23 = 231,
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MX35_PAD_RESERVE24 = 232,
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MX35_PAD_RESERVE25 = 233,
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MX35_PAD_RESERVE26 = 234,
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MX35_PAD_RESERVE27 = 235,
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MX35_PAD_RESERVE28 = 236,
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MX35_PAD_RESERVE29 = 237,
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MX35_PAD_RESERVE30 = 238,
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MX35_PAD_RESERVE31 = 239,
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MX35_PAD_RESERVE32 = 240,
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MX35_PAD_RESERVE33 = 241,
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MX35_PAD_RESERVE34 = 242,
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MX35_PAD_RESERVE35 = 243,
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MX35_PAD_RESERVE36 = 244,
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MX35_PAD_SDBA1 = 245,
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MX35_PAD_SDBA0 = 246,
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MX35_PAD_SD0 = 247,
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MX35_PAD_SD1 = 248,
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MX35_PAD_SD2 = 249,
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MX35_PAD_SD3 = 250,
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MX35_PAD_SD4 = 251,
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MX35_PAD_SD5 = 252,
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MX35_PAD_SD6 = 253,
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MX35_PAD_SD7 = 254,
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MX35_PAD_SD8 = 255,
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MX35_PAD_SD9 = 256,
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MX35_PAD_SD10 = 257,
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MX35_PAD_SD11 = 258,
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MX35_PAD_SD12 = 259,
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MX35_PAD_SD13 = 260,
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MX35_PAD_SD14 = 261,
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MX35_PAD_SD15 = 262,
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MX35_PAD_SD16 = 263,
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MX35_PAD_SD17 = 264,
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MX35_PAD_SD18 = 265,
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MX35_PAD_SD19 = 266,
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MX35_PAD_SD20 = 267,
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MX35_PAD_SD21 = 268,
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MX35_PAD_SD22 = 269,
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MX35_PAD_SD23 = 270,
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MX35_PAD_SD24 = 271,
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MX35_PAD_SD25 = 272,
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MX35_PAD_SD26 = 273,
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MX35_PAD_SD27 = 274,
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MX35_PAD_SD28 = 275,
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MX35_PAD_SD29 = 276,
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MX35_PAD_SD30 = 277,
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MX35_PAD_SD31 = 278,
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MX35_PAD_DQM0 = 279,
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MX35_PAD_DQM1 = 280,
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MX35_PAD_DQM2 = 281,
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MX35_PAD_DQM3 = 282,
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MX35_PAD_RESERVE37 = 283,
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MX35_PAD_RESERVE38 = 284,
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MX35_PAD_RESERVE39 = 285,
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MX35_PAD_RESERVE40 = 286,
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MX35_PAD_RESERVE41 = 287,
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MX35_PAD_RESERVE42 = 288,
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MX35_PAD_RESERVE43 = 289,
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MX35_PAD_RESERVE44 = 290,
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MX35_PAD_RESERVE45 = 291,
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MX35_PAD_RESERVE46 = 292,
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MX35_PAD_ECB = 293,
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MX35_PAD_RESERVE47 = 294,
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MX35_PAD_RESERVE48 = 295,
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MX35_PAD_RESERVE49 = 296,
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MX35_PAD_RAS = 297,
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MX35_PAD_CAS = 298,
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MX35_PAD_SDWE = 299,
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MX35_PAD_SDCKE0 = 300,
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MX35_PAD_SDCKE1 = 301,
|
|
|
|
MX35_PAD_SDCLK = 302,
|
|
|
|
MX35_PAD_SDQS0 = 303,
|
|
|
|
MX35_PAD_SDQS1 = 304,
|
|
|
|
MX35_PAD_SDQS2 = 305,
|
|
|
|
MX35_PAD_SDQS3 = 306,
|
|
|
|
MX35_PAD_RESERVE50 = 307,
|
|
|
|
MX35_PAD_RESERVE51 = 308,
|
|
|
|
MX35_PAD_RESERVE52 = 309,
|
|
|
|
MX35_PAD_RESERVE53 = 310,
|
|
|
|
MX35_PAD_RESERVE54 = 311,
|
|
|
|
MX35_PAD_RESERVE55 = 312,
|
|
|
|
MX35_PAD_D15 = 313,
|
|
|
|
MX35_PAD_D14 = 314,
|
|
|
|
MX35_PAD_D13 = 315,
|
|
|
|
MX35_PAD_D12 = 316,
|
|
|
|
MX35_PAD_D11 = 317,
|
|
|
|
MX35_PAD_D10 = 318,
|
|
|
|
MX35_PAD_D9 = 319,
|
|
|
|
MX35_PAD_D8 = 320,
|
|
|
|
MX35_PAD_D7 = 321,
|
|
|
|
MX35_PAD_D6 = 322,
|
|
|
|
MX35_PAD_D5 = 323,
|
|
|
|
MX35_PAD_D4 = 324,
|
|
|
|
MX35_PAD_D3 = 325,
|
|
|
|
MX35_PAD_D2 = 326,
|
|
|
|
MX35_PAD_D1 = 327,
|
|
|
|
MX35_PAD_D0 = 328,
|
|
|
|
MX35_PAD_RESERVE56 = 329,
|
|
|
|
MX35_PAD_RESERVE57 = 330,
|
|
|
|
MX35_PAD_RESERVE58 = 331,
|
|
|
|
MX35_PAD_RESERVE59 = 332,
|
|
|
|
MX35_PAD_RESERVE60 = 333,
|
|
|
|
MX35_PAD_RESERVE61 = 334,
|
|
|
|
MX35_PAD_RESERVE62 = 335,
|
|
|
|
MX35_PAD_RESERVE63 = 336,
|
|
|
|
MX35_PAD_RESERVE64 = 337,
|
|
|
|
MX35_PAD_RESERVE65 = 338,
|
|
|
|
MX35_PAD_RESERVE66 = 339,
|
|
|
|
MX35_PAD_RESERVE67 = 340,
|
|
|
|
MX35_PAD_RESERVE68 = 341,
|
|
|
|
MX35_PAD_RESERVE69 = 342,
|
|
|
|
MX35_PAD_RESERVE70 = 343,
|
|
|
|
MX35_PAD_RESERVE71 = 344,
|
|
|
|
MX35_PAD_RESERVE72 = 345,
|
|
|
|
MX35_PAD_RESERVE73 = 346,
|
|
|
|
MX35_PAD_RESERVE74 = 347,
|
|
|
|
MX35_PAD_RESERVE75 = 348,
|
|
|
|
MX35_PAD_RESERVE76 = 349,
|
|
|
|
MX35_PAD_RESERVE77 = 350,
|
|
|
|
MX35_PAD_RESERVE78 = 351,
|
|
|
|
MX35_PAD_RESERVE79 = 352,
|
|
|
|
MX35_PAD_RESERVE80 = 353,
|
|
|
|
MX35_PAD_RESERVE81 = 354,
|
|
|
|
MX35_PAD_RESERVE82 = 355,
|
|
|
|
MX35_PAD_RESERVE83 = 356,
|
|
|
|
MX35_PAD_RESERVE84 = 357,
|
|
|
|
MX35_PAD_RESERVE85 = 358,
|
|
|
|
MX35_PAD_RESERVE86 = 359,
|
|
|
|
MX35_PAD_RESERVE87 = 360,
|
|
|
|
MX35_PAD_RESERVE88 = 361,
|
|
|
|
MX35_PAD_RESERVE89 = 362,
|
|
|
|
MX35_PAD_RESERVE90 = 363,
|
|
|
|
MX35_PAD_RESERVE91 = 364,
|
|
|
|
MX35_PAD_RESERVE92 = 365,
|
|
|
|
MX35_PAD_RESERVE93 = 366,
|
|
|
|
MX35_PAD_RESERVE94 = 367,
|
|
|
|
MX35_PAD_RESERVE95 = 368,
|
|
|
|
MX35_PAD_RESERVE96 = 369,
|
|
|
|
MX35_PAD_RESERVE97 = 370,
|
|
|
|
MX35_PAD_RESERVE98 = 371,
|
|
|
|
MX35_PAD_RESERVE99 = 372,
|
|
|
|
MX35_PAD_RESERVE100 = 373,
|
|
|
|
MX35_PAD_RESERVE101 = 374,
|
|
|
|
MX35_PAD_RESERVE102 = 375,
|
|
|
|
MX35_PAD_RESERVE103 = 376,
|
|
|
|
MX35_PAD_RESERVE104 = 377,
|
|
|
|
MX35_PAD_RESERVE105 = 378,
|
|
|
|
MX35_PAD_RTCK = 379,
|
|
|
|
MX35_PAD_TCK = 380,
|
|
|
|
MX35_PAD_TMS = 381,
|
|
|
|
MX35_PAD_TDI = 382,
|
|
|
|
MX35_PAD_TDO = 383,
|
|
|
|
MX35_PAD_TRSTB = 384,
|
|
|
|
MX35_PAD_DE_B = 385,
|
|
|
|
MX35_PAD_SJC_MOD = 386,
|
|
|
|
MX35_PAD_RESERVE106 = 387,
|
|
|
|
MX35_PAD_RESERVE107 = 388,
|
|
|
|
MX35_PAD_RESERVE108 = 389,
|
|
|
|
MX35_PAD_RESERVE109 = 390,
|
|
|
|
MX35_PAD_RESERVE110 = 391,
|
|
|
|
MX35_PAD_RESERVE111 = 392,
|
|
|
|
MX35_PAD_RESERVE112 = 393,
|
|
|
|
MX35_PAD_RESERVE113 = 394,
|
|
|
|
MX35_PAD_RESERVE114 = 395,
|
|
|
|
MX35_PAD_RESERVE115 = 396,
|
|
|
|
MX35_PAD_RESERVE116 = 397,
|
|
|
|
MX35_PAD_RESERVE117 = 398,
|
|
|
|
MX35_PAD_RESERVE118 = 399,
|
|
|
|
MX35_PAD_RESERVE119 = 400,
|
|
|
|
MX35_PAD_RESERVE120 = 401,
|
|
|
|
MX35_PAD_RESERVE121 = 402,
|
|
|
|
MX35_PAD_RESERVE122 = 403,
|
|
|
|
MX35_PAD_RESERVE123 = 404,
|
|
|
|
MX35_PAD_RESERVE124 = 405,
|
|
|
|
MX35_PAD_RESERVE125 = 406,
|
|
|
|
MX35_PAD_RESERVE126 = 407,
|
|
|
|
MX35_PAD_RESERVE127 = 408,
|
|
|
|
MX35_PAD_RESERVE128 = 409,
|
|
|
|
MX35_PAD_RESERVE129 = 410,
|
|
|
|
MX35_PAD_RESERVE130 = 411,
|
|
|
|
MX35_PAD_RESERVE131 = 412,
|
|
|
|
MX35_PAD_RESERVE132 = 413,
|
|
|
|
MX35_PAD_RESERVE133 = 414,
|
|
|
|
MX35_PAD_RESERVE134 = 415,
|
|
|
|
MX35_PAD_RESERVE135 = 416,
|
|
|
|
MX35_PAD_RESERVE136 = 417,
|
|
|
|
MX35_PAD_RESERVE137 = 418,
|
|
|
|
MX35_PAD_RESERVE138 = 419,
|
|
|
|
MX35_PAD_RESERVE139 = 420,
|
|
|
|
MX35_PAD_RESERVE140 = 421,
|
|
|
|
MX35_PAD_RESERVE141 = 422,
|
|
|
|
MX35_PAD_RESERVE142 = 423,
|
|
|
|
MX35_PAD_RESERVE143 = 424,
|
|
|
|
MX35_PAD_RESERVE144 = 425,
|
|
|
|
MX35_PAD_RESERVE145 = 426,
|
|
|
|
MX35_PAD_RESERVE146 = 427,
|
|
|
|
MX35_PAD_RESERVE147 = 428,
|
|
|
|
MX35_PAD_RESERVE148 = 429,
|
|
|
|
MX35_PAD_RESERVE149 = 430,
|
|
|
|
MX35_PAD_RESERVE150 = 431,
|
|
|
|
MX35_PAD_RESERVE151 = 432,
|
|
|
|
MX35_PAD_RESERVE152 = 433,
|
|
|
|
MX35_PAD_RESERVE153 = 434,
|
|
|
|
MX35_PAD_RESERVE154 = 435,
|
|
|
|
MX35_PAD_RESERVE155 = 436,
|
|
|
|
MX35_PAD_RESERVE156 = 437,
|
|
|
|
MX35_PAD_RESERVE157 = 438,
|
|
|
|
MX35_PAD_RESERVE158 = 439,
|
|
|
|
MX35_PAD_RESERVE159 = 440,
|
|
|
|
MX35_PAD_RESERVE160 = 441,
|
|
|
|
MX35_PAD_RESERVE161 = 442,
|
|
|
|
MX35_PAD_RESERVE162 = 443,
|
|
|
|
MX35_PAD_RESERVE163 = 444,
|
|
|
|
MX35_PAD_RESERVE164 = 445,
|
|
|
|
MX35_PAD_RESERVE165 = 446,
|
|
|
|
MX35_PAD_RESERVE166 = 447,
|
|
|
|
MX35_PAD_RESERVE167 = 448,
|
|
|
|
MX35_PAD_RESERVE168 = 449,
|
|
|
|
MX35_PAD_RESERVE169 = 450,
|
|
|
|
MX35_PAD_RESERVE170 = 451,
|
|
|
|
MX35_PAD_RESERVE171 = 452,
|
|
|
|
MX35_PAD_RESERVE172 = 453,
|
|
|
|
MX35_PAD_RESERVE173 = 454,
|
|
|
|
MX35_PAD_RESERVE174 = 455,
|
|
|
|
MX35_PAD_RESERVE175 = 456,
|
|
|
|
MX35_PAD_RESERVE176 = 457,
|
|
|
|
MX35_PAD_RESERVE177 = 458,
|
|
|
|
MX35_PAD_RESERVE178 = 459,
|
|
|
|
MX35_PAD_RESERVE179 = 460,
|
|
|
|
MX35_PAD_RESERVE180 = 461,
|
|
|
|
MX35_PAD_RESERVE181 = 462,
|
|
|
|
MX35_PAD_RESERVE182 = 463,
|
|
|
|
MX35_PAD_RESERVE183 = 464,
|
|
|
|
MX35_PAD_RESERVE184 = 465,
|
|
|
|
MX35_PAD_RESERVE185 = 466,
|
|
|
|
MX35_PAD_RESERVE186 = 467,
|
|
|
|
MX35_PAD_RESERVE187 = 468,
|
|
|
|
MX35_PAD_RESERVE188 = 469,
|
|
|
|
MX35_PAD_RESERVE189 = 470,
|
|
|
|
MX35_PAD_RESERVE190 = 471,
|
|
|
|
MX35_PAD_RESERVE191 = 472,
|
|
|
|
MX35_PAD_RESERVE192 = 473,
|
|
|
|
MX35_PAD_RESERVE193 = 474,
|
|
|
|
MX35_PAD_RESERVE194 = 475,
|
|
|
|
MX35_PAD_RESERVE195 = 476,
|
|
|
|
MX35_PAD_RESERVE196 = 477,
|
|
|
|
MX35_PAD_RESERVE197 = 478,
|
|
|
|
MX35_PAD_RESERVE198 = 479,
|
|
|
|
MX35_PAD_RESERVE199 = 480,
|
|
|
|
MX35_PAD_RESERVE200 = 481,
|
|
|
|
MX35_PAD_RESERVE201 = 482,
|
|
|
|
MX35_PAD_EXT_ARMCLK = 483,
|
|
|
|
MX35_PAD_TEST_MODE = 484,
|
2012-08-10 00:23:32 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
/* Pad names for the pinmux subsystem */
|
|
|
|
static const struct pinctrl_pin_desc imx35_pinctrl_pads[] = {
|
2013-02-20 10:32:52 +08:00
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE0),
|
2012-08-10 00:23:32 +08:00
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CAPTURE),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_COMPARE),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_WDOG_RST),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_GPIO1_0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_GPIO1_1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_GPIO2_0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_GPIO3_0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CLKO),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_VSTBY),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A3),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A4),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A5),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A6),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A7),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A8),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A9),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A10),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_MA10),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A11),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A12),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A13),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A14),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A15),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A16),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A17),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A18),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A19),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A20),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A21),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A22),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A23),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A24),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_A25),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_EB0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_EB1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_OE),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CS0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CS1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CS2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CS3),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CS4),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CS5),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_NF_CE0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LBA),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_BCLK),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RW),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_NFWE_B),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_NFRE_B),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_NFALE),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_NFCLE),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_NFWP_B),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_NFRB),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSI_D8),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSI_D9),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSI_D10),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSI_D11),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSI_D12),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSI_D13),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSI_D14),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSI_D15),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSI_MCLK),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSI_VSYNC),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSI_HSYNC),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSI_PIXCLK),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_I2C1_CLK),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_I2C1_DAT),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_I2C2_CLK),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_I2C2_DAT),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_STXD4),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SRXD4),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SCK4),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_STXFS4),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_STXD5),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SRXD5),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SCK5),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_STXFS5),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SCKR),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FSR),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_HCKR),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SCKT),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FST),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_HCKT),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_TX5_RX0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_TX4_RX1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_TX3_RX2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_TX2_RX3),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_TX1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_TX0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSPI1_MOSI),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSPI1_MISO),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSPI1_SS0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSPI1_SS1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSPI1_SCLK),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CSPI1_SPI_RDY),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RXD1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_TXD1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RTS1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CTS1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RXD2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_TXD2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RTS2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CTS2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_USBOTG_PWR),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_USBOTG_OC),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD3),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD4),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD5),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD6),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD7),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD8),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD9),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD10),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD11),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD12),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD13),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD14),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD15),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD16),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD17),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD18),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD19),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD20),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD21),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD22),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_LD23),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D3_HSYNC),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D3_FPSHIFT),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D3_DRDY),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CONTRAST),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D3_VSYNC),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D3_REV),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D3_CLS),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D3_SPL),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD1_CMD),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD1_CLK),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD1_DATA0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD1_DATA1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD1_DATA2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD1_DATA3),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD2_CMD),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD2_CLK),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD2_DATA0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD2_DATA1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD2_DATA2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD2_DATA3),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_CS0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_CS1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DIOR),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DIOW),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DMACK),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_RESET_B),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_IORDY),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DATA0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DATA1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DATA2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DATA3),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DATA4),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DATA5),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DATA6),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DATA7),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DATA8),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DATA9),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DATA10),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DATA11),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DATA12),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DATA13),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DATA14),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DATA15),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_INTRQ),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_BUFF_EN),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DMARQ),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DA0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DA1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ATA_DA2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_MLB_CLK),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_MLB_DAT),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_MLB_SIG),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_TX_CLK),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_RX_CLK),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_RX_DV),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_COL),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_RDATA0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_TDATA0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_TX_EN),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_MDC),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_MDIO),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_TX_ERR),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_RX_ERR),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_CRS),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_RDATA1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_TDATA1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_RDATA2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_TDATA2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_RDATA3),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_FEC_TDATA3),
|
2013-02-20 10:32:52 +08:00
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE3),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE4),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE5),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE6),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE7),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESET_IN_B),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_POR_B),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE8),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_BOOT_MODE0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_BOOT_MODE1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CLK_MODE0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CLK_MODE1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_POWER_FAIL),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE9),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE10),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE11),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE12),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE13),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE14),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE15),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE16),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE17),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE18),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE19),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE20),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE21),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE22),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE23),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE24),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE25),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE26),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE27),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE28),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE29),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE30),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE31),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE32),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE33),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE34),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE35),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE36),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SDBA1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SDBA0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD3),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD4),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD5),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD6),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD7),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD8),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD9),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD10),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD11),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD12),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD13),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD14),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD15),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD16),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD17),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD18),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD19),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD20),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD21),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD22),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD23),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD24),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD25),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD26),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD27),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD28),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD29),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD30),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SD31),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_DQM0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_DQM1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_DQM2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_DQM3),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE37),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE38),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE39),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE40),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE41),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE42),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE43),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE44),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE45),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE46),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_ECB),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE47),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE48),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE49),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RAS),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_CAS),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SDWE),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SDCKE0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SDCKE1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SDCLK),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SDQS0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SDQS1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SDQS2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_SDQS3),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE50),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE51),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE52),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE53),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE54),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE55),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D15),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D14),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D13),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D12),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D11),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D10),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D9),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D8),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D7),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D6),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D5),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D4),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D3),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D2),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D1),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_D0),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE56),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE57),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE58),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE59),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE60),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE61),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE62),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE63),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE64),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE65),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE66),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE67),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE68),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE69),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE70),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE71),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE72),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE73),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE74),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE75),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE76),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE77),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE78),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE79),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE80),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE81),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE82),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE83),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE84),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE85),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE86),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE87),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE88),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE89),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE90),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE91),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE92),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE93),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE94),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE95),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE96),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE97),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE98),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE99),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE100),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE101),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE102),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE103),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE104),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE105),
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IMX_PINCTRL_PIN(MX35_PAD_RTCK),
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IMX_PINCTRL_PIN(MX35_PAD_TCK),
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IMX_PINCTRL_PIN(MX35_PAD_TMS),
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IMX_PINCTRL_PIN(MX35_PAD_TDI),
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IMX_PINCTRL_PIN(MX35_PAD_TDO),
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IMX_PINCTRL_PIN(MX35_PAD_TRSTB),
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IMX_PINCTRL_PIN(MX35_PAD_DE_B),
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IMX_PINCTRL_PIN(MX35_PAD_SJC_MOD),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE106),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE107),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE108),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE109),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE110),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE111),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE112),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE113),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE114),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE115),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE116),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE117),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE118),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE119),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE120),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE121),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE122),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE123),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE124),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE125),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE126),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE127),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE128),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE129),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE130),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE131),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE132),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE133),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE134),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE135),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE136),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE137),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE138),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE139),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE140),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE141),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE142),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE143),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE144),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE145),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE146),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE147),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE148),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE149),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE150),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE151),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE152),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE153),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE154),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE155),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE156),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE157),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE158),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE159),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE160),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE161),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE162),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE163),
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE164),
|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE165),
|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE166),
|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE167),
|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE168),
|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE169),
|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE170),
|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE171),
|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE172),
|
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|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE173),
|
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|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE174),
|
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|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE175),
|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE176),
|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE177),
|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE178),
|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE179),
|
|
|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE180),
|
|
|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE181),
|
|
|
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IMX_PINCTRL_PIN(MX35_PAD_RESERVE182),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE183),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE184),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE185),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE186),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE187),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE188),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE189),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE190),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE191),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE192),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE193),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE194),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE195),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE196),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE197),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE198),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE199),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE200),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_RESERVE201),
|
2012-08-10 00:23:32 +08:00
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_EXT_ARMCLK),
|
|
|
|
IMX_PINCTRL_PIN(MX35_PAD_TEST_MODE),
|
|
|
|
};
|
|
|
|
|
2018-01-06 22:25:51 +08:00
|
|
|
static const struct imx_pinctrl_soc_info imx35_pinctrl_info = {
|
2012-08-10 00:23:32 +08:00
|
|
|
.pins = imx35_pinctrl_pads,
|
|
|
|
.npins = ARRAY_SIZE(imx35_pinctrl_pads),
|
|
|
|
};
|
|
|
|
|
2014-08-11 19:17:50 +08:00
|
|
|
static const struct of_device_id imx35_pinctrl_of_match[] = {
|
2012-08-10 00:23:32 +08:00
|
|
|
{ .compatible = "fsl,imx35-iomuxc", },
|
|
|
|
{ /* sentinel */ }
|
|
|
|
};
|
|
|
|
|
2012-12-22 05:10:23 +08:00
|
|
|
static int imx35_pinctrl_probe(struct platform_device *pdev)
|
2012-08-10 00:23:32 +08:00
|
|
|
{
|
|
|
|
return imx_pinctrl_probe(pdev, &imx35_pinctrl_info);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_driver imx35_pinctrl_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "imx35-pinctrl",
|
2013-09-28 20:08:48 +08:00
|
|
|
.of_match_table = imx35_pinctrl_of_match,
|
2012-08-10 00:23:32 +08:00
|
|
|
},
|
|
|
|
.probe = imx35_pinctrl_probe,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init imx35_pinctrl_init(void)
|
|
|
|
{
|
|
|
|
return platform_driver_register(&imx35_pinctrl_driver);
|
|
|
|
}
|
|
|
|
arch_initcall(imx35_pinctrl_init);
|