2018-05-25 10:11:44 +08:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Ptrace test for Memory Protection Key registers
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*
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* Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
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* Copyright (C) 2018 IBM Corporation.
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*/
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#include "ptrace.h"
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#include "child.h"
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#ifndef __NR_pkey_alloc
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#define __NR_pkey_alloc 384
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#endif
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#ifndef __NR_pkey_free
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#define __NR_pkey_free 385
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#endif
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#ifndef NT_PPC_PKEY
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#define NT_PPC_PKEY 0x110
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#endif
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#ifndef PKEY_DISABLE_EXECUTE
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#define PKEY_DISABLE_EXECUTE 0x4
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#endif
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#define AMR_BITS_PER_PKEY 2
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#define PKEY_REG_BITS (sizeof(u64) * 8)
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#define pkeyshift(pkey) (PKEY_REG_BITS - ((pkey + 1) * AMR_BITS_PER_PKEY))
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static const char user_read[] = "[User Read (Running)]";
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static const char user_write[] = "[User Write (Running)]";
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static const char ptrace_read_running[] = "[Ptrace Read (Running)]";
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static const char ptrace_write_running[] = "[Ptrace Write (Running)]";
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/* Information shared between the parent and the child. */
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struct shared_info {
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struct child_sync child_sync;
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/* AMR value the parent expects to read from the child. */
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unsigned long amr1;
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/* AMR value the parent is expected to write to the child. */
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unsigned long amr2;
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/* AMR value that ptrace should refuse to write to the child. */
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2020-07-09 11:29:43 +08:00
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unsigned long invalid_amr;
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2018-05-25 10:11:44 +08:00
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/* IAMR value the parent expects to read from the child. */
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unsigned long expected_iamr;
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/* UAMOR value the parent expects to read from the child. */
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unsigned long expected_uamor;
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/*
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* IAMR and UAMOR values that ptrace should refuse to write to the child
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* (even though they're valid ones) because userspace doesn't have
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* access to those registers.
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*/
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2020-07-09 11:29:43 +08:00
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unsigned long invalid_iamr;
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unsigned long invalid_uamor;
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2018-05-25 10:11:44 +08:00
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};
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static int sys_pkey_alloc(unsigned long flags, unsigned long init_access_rights)
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{
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return syscall(__NR_pkey_alloc, flags, init_access_rights);
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}
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static int child(struct shared_info *info)
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{
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unsigned long reg;
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bool disable_execute = true;
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int pkey1, pkey2, pkey3;
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int ret;
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/* Wait until parent fills out the initial register values. */
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ret = wait_parent(&info->child_sync);
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if (ret)
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return ret;
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/* Get some pkeys so that we can change their bits in the AMR. */
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pkey1 = sys_pkey_alloc(0, PKEY_DISABLE_EXECUTE);
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if (pkey1 < 0) {
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pkey1 = sys_pkey_alloc(0, 0);
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CHILD_FAIL_IF(pkey1 < 0, &info->child_sync);
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disable_execute = false;
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}
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pkey2 = sys_pkey_alloc(0, 0);
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CHILD_FAIL_IF(pkey2 < 0, &info->child_sync);
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pkey3 = sys_pkey_alloc(0, 0);
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CHILD_FAIL_IF(pkey3 < 0, &info->child_sync);
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info->amr1 |= 3ul << pkeyshift(pkey1);
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info->amr2 |= 3ul << pkeyshift(pkey2);
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2020-07-09 11:29:44 +08:00
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/*
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* invalid amr value where we try to force write
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* things which are deined by a uamor setting.
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*/
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info->invalid_amr = info->amr2 | (~0x0UL & ~info->expected_uamor);
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2018-05-25 10:11:44 +08:00
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2020-07-09 11:29:45 +08:00
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/*
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* if PKEY_DISABLE_EXECUTE succeeded we should update the expected_iamr
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*/
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2018-05-25 10:11:44 +08:00
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if (disable_execute)
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info->expected_iamr |= 1ul << pkeyshift(pkey1);
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2018-07-17 21:51:10 +08:00
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else
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info->expected_iamr &= ~(1ul << pkeyshift(pkey1));
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2020-07-09 11:29:45 +08:00
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/*
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* We allocated pkey2 and pkey 3 above. Clear the IAMR bits.
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*/
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info->expected_iamr &= ~(1ul << pkeyshift(pkey2));
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info->expected_iamr &= ~(1ul << pkeyshift(pkey3));
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2018-05-25 10:11:44 +08:00
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/*
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2020-07-09 11:29:44 +08:00
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* Create an IAMR value different from expected value.
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* Kernel will reject an IAMR and UAMOR change.
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2018-05-25 10:11:44 +08:00
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*/
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2020-07-09 11:29:44 +08:00
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info->invalid_iamr = info->expected_iamr | (1ul << pkeyshift(pkey1) | 1ul << pkeyshift(pkey2));
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info->invalid_uamor = info->expected_uamor & ~(0x3ul << pkeyshift(pkey1));
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2018-05-25 10:11:44 +08:00
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printf("%-30s AMR: %016lx pkey1: %d pkey2: %d pkey3: %d\n",
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user_write, info->amr1, pkey1, pkey2, pkey3);
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2020-06-04 20:56:08 +08:00
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set_amr(info->amr1);
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2018-05-25 10:11:44 +08:00
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/* Wait for parent to read our AMR value and write a new one. */
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ret = prod_parent(&info->child_sync);
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CHILD_FAIL_IF(ret, &info->child_sync);
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ret = wait_parent(&info->child_sync);
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if (ret)
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return ret;
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reg = mfspr(SPRN_AMR);
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printf("%-30s AMR: %016lx\n", user_read, reg);
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CHILD_FAIL_IF(reg != info->amr2, &info->child_sync);
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/*
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* Wait for parent to try to write an invalid AMR value.
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*/
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ret = prod_parent(&info->child_sync);
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CHILD_FAIL_IF(ret, &info->child_sync);
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ret = wait_parent(&info->child_sync);
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if (ret)
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return ret;
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reg = mfspr(SPRN_AMR);
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printf("%-30s AMR: %016lx\n", user_read, reg);
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CHILD_FAIL_IF(reg != info->amr2, &info->child_sync);
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/*
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* Wait for parent to try to write an IAMR and a UAMOR value. We can't
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* verify them, but we can verify that the AMR didn't change.
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*/
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ret = prod_parent(&info->child_sync);
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CHILD_FAIL_IF(ret, &info->child_sync);
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ret = wait_parent(&info->child_sync);
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if (ret)
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return ret;
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reg = mfspr(SPRN_AMR);
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printf("%-30s AMR: %016lx\n", user_read, reg);
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CHILD_FAIL_IF(reg != info->amr2, &info->child_sync);
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/* Now let parent now that we are finished. */
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ret = prod_parent(&info->child_sync);
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CHILD_FAIL_IF(ret, &info->child_sync);
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return TEST_PASS;
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}
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static int parent(struct shared_info *info, pid_t pid)
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{
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unsigned long regs[3];
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int ret, status;
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/*
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* Get the initial values for AMR, IAMR and UAMOR and communicate them
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* to the child.
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*/
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ret = ptrace_read_regs(pid, NT_PPC_PKEY, regs, 3);
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PARENT_SKIP_IF_UNSUPPORTED(ret, &info->child_sync);
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PARENT_FAIL_IF(ret, &info->child_sync);
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2020-07-09 11:29:44 +08:00
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info->amr1 = info->amr2 = regs[0];
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info->expected_iamr = regs[1];
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info->expected_uamor = regs[2];
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2018-05-25 10:11:44 +08:00
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/* Wake up child so that it can set itself up. */
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ret = prod_child(&info->child_sync);
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PARENT_FAIL_IF(ret, &info->child_sync);
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ret = wait_child(&info->child_sync);
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if (ret)
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return ret;
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/* Verify that we can read the pkey registers from the child. */
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ret = ptrace_read_regs(pid, NT_PPC_PKEY, regs, 3);
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PARENT_FAIL_IF(ret, &info->child_sync);
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printf("%-30s AMR: %016lx IAMR: %016lx UAMOR: %016lx\n",
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ptrace_read_running, regs[0], regs[1], regs[2]);
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PARENT_FAIL_IF(regs[0] != info->amr1, &info->child_sync);
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PARENT_FAIL_IF(regs[1] != info->expected_iamr, &info->child_sync);
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PARENT_FAIL_IF(regs[2] != info->expected_uamor, &info->child_sync);
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/* Write valid AMR value in child. */
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ret = ptrace_write_regs(pid, NT_PPC_PKEY, &info->amr2, 1);
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PARENT_FAIL_IF(ret, &info->child_sync);
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printf("%-30s AMR: %016lx\n", ptrace_write_running, info->amr2);
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/* Wake up child so that it can verify it changed. */
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ret = prod_child(&info->child_sync);
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PARENT_FAIL_IF(ret, &info->child_sync);
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ret = wait_child(&info->child_sync);
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if (ret)
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return ret;
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/* Write invalid AMR value in child. */
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2020-07-09 11:29:43 +08:00
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ret = ptrace_write_regs(pid, NT_PPC_PKEY, &info->invalid_amr, 1);
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2018-05-25 10:11:44 +08:00
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PARENT_FAIL_IF(ret, &info->child_sync);
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2020-07-09 11:29:43 +08:00
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printf("%-30s AMR: %016lx\n", ptrace_write_running, info->invalid_amr);
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2018-05-25 10:11:44 +08:00
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/* Wake up child so that it can verify it didn't change. */
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ret = prod_child(&info->child_sync);
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PARENT_FAIL_IF(ret, &info->child_sync);
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ret = wait_child(&info->child_sync);
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if (ret)
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return ret;
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/* Try to write to IAMR. */
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regs[0] = info->amr1;
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2020-07-09 11:29:43 +08:00
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regs[1] = info->invalid_iamr;
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2018-05-25 10:11:44 +08:00
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ret = ptrace_write_regs(pid, NT_PPC_PKEY, regs, 2);
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PARENT_FAIL_IF(!ret, &info->child_sync);
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printf("%-30s AMR: %016lx IAMR: %016lx\n",
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ptrace_write_running, regs[0], regs[1]);
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/* Try to write to IAMR and UAMOR. */
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2020-07-09 11:29:43 +08:00
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regs[2] = info->invalid_uamor;
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2018-05-25 10:11:44 +08:00
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ret = ptrace_write_regs(pid, NT_PPC_PKEY, regs, 3);
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PARENT_FAIL_IF(!ret, &info->child_sync);
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printf("%-30s AMR: %016lx IAMR: %016lx UAMOR: %016lx\n",
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ptrace_write_running, regs[0], regs[1], regs[2]);
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/* Verify that all registers still have their expected values. */
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ret = ptrace_read_regs(pid, NT_PPC_PKEY, regs, 3);
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PARENT_FAIL_IF(ret, &info->child_sync);
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printf("%-30s AMR: %016lx IAMR: %016lx UAMOR: %016lx\n",
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ptrace_read_running, regs[0], regs[1], regs[2]);
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PARENT_FAIL_IF(regs[0] != info->amr2, &info->child_sync);
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PARENT_FAIL_IF(regs[1] != info->expected_iamr, &info->child_sync);
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PARENT_FAIL_IF(regs[2] != info->expected_uamor, &info->child_sync);
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/* Wake up child so that it can verify AMR didn't change and wrap up. */
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ret = prod_child(&info->child_sync);
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PARENT_FAIL_IF(ret, &info->child_sync);
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ret = wait(&status);
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if (ret != pid) {
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printf("Child's exit status not captured\n");
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ret = TEST_PASS;
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} else if (!WIFEXITED(status)) {
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printf("Child exited abnormally\n");
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ret = TEST_FAIL;
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} else
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ret = WEXITSTATUS(status) ? TEST_FAIL : TEST_PASS;
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return ret;
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}
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static int ptrace_pkey(void)
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{
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struct shared_info *info;
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int shm_id;
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int ret;
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pid_t pid;
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shm_id = shmget(IPC_PRIVATE, sizeof(*info), 0777 | IPC_CREAT);
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info = shmat(shm_id, NULL, 0);
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ret = init_child_sync(&info->child_sync);
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if (ret)
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return ret;
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pid = fork();
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if (pid < 0) {
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perror("fork() failed");
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ret = TEST_FAIL;
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} else if (pid == 0)
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ret = child(info);
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else
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ret = parent(info, pid);
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shmdt(info);
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if (pid) {
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destroy_child_sync(&info->child_sync);
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shmctl(shm_id, IPC_RMID, NULL);
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}
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return ret;
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}
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int main(int argc, char *argv[])
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{
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return test_harness(ptrace_pkey, "ptrace_pkey");
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}
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