2010-03-19 23:22:54 +08:00
|
|
|
config MTD_NAND_ECC
|
|
|
|
|
tristate
|
|
|
|
|
|
|
|
|
|
config MTD_NAND_ECC_SMC
|
|
|
|
|
bool "NAND ECC Smart Media byte order"
|
|
|
|
|
depends on MTD_NAND_ECC
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
Software ECC according to the Smart Media Specification.
|
|
|
|
|
The original Linux implementation had byte 0 and 1 swapped.
|
|
|
|
|
|
2010-06-02 23:22:48 +08:00
|
|
|
|
|
|
|
|
menuconfig MTD_NAND
|
|
|
|
|
tristate "NAND Device Support"
|
|
|
|
|
depends on MTD
|
|
|
|
|
select MTD_NAND_IDS
|
|
|
|
|
select MTD_NAND_ECC
|
|
|
|
|
help
|
|
|
|
|
This enables support for accessing all type of NAND flash
|
|
|
|
|
devices. For further information see
|
|
|
|
|
<http://www.linux-mtd.infradead.org/doc/nand.html>.
|
|
|
|
|
|
2007-04-20 05:21:41 +08:00
|
|
|
if MTD_NAND
|
|
|
|
|
|
2011-03-11 18:05:33 +08:00
|
|
|
config MTD_NAND_BCH
|
|
|
|
|
tristate
|
|
|
|
|
select BCH
|
|
|
|
|
depends on MTD_NAND_ECC_BCH
|
|
|
|
|
default MTD_NAND
|
|
|
|
|
|
|
|
|
|
config MTD_NAND_ECC_BCH
|
|
|
|
|
bool "Support software BCH ECC"
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
This enables support for software BCH error correction. Binary BCH
|
|
|
|
|
codes are more powerful and cpu intensive than traditional Hamming
|
|
|
|
|
ECC codes. They are used with NAND devices requiring more than 1 bit
|
|
|
|
|
of error correction.
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2010-02-23 02:39:39 +08:00
|
|
|
config MTD_SM_COMMON
|
|
|
|
|
tristate
|
|
|
|
|
default n
|
|
|
|
|
|
2010-05-13 22:57:33 +08:00
|
|
|
config MTD_NAND_DENALI
|
2015-08-06 21:04:21 +08:00
|
|
|
tristate
|
2012-09-28 00:58:05 +08:00
|
|
|
|
|
|
|
|
config MTD_NAND_DENALI_PCI
|
2010-05-13 22:57:33 +08:00
|
|
|
tristate "Support Denali NAND controller on Intel Moorestown"
|
2015-08-06 21:04:21 +08:00
|
|
|
select MTD_NAND_DENALI
|
|
|
|
|
depends on HAS_DMA && PCI
|
2010-05-13 22:57:33 +08:00
|
|
|
help
|
|
|
|
|
Enable the driver for NAND flash on Intel Moorestown, using the
|
|
|
|
|
Denali NAND controller core.
|
2012-09-28 00:58:06 +08:00
|
|
|
|
|
|
|
|
config MTD_NAND_DENALI_DT
|
|
|
|
|
tristate "Support Denali NAND controller as a DT device"
|
2015-08-06 21:04:21 +08:00
|
|
|
select MTD_NAND_DENALI
|
2015-12-16 13:00:09 +08:00
|
|
|
depends on HAS_DMA && HAVE_CLK && OF
|
2012-09-28 00:58:06 +08:00
|
|
|
help
|
|
|
|
|
Enable the driver for NAND flash on platforms using a Denali NAND
|
|
|
|
|
controller as a DT device.
|
|
|
|
|
|
2010-05-13 22:57:33 +08:00
|
|
|
config MTD_NAND_DENALI_SCRATCH_REG_ADDR
|
|
|
|
|
hex "Denali NAND size scratch register address"
|
|
|
|
|
default "0xFF108018"
|
2012-09-28 00:58:05 +08:00
|
|
|
depends on MTD_NAND_DENALI_PCI
|
2010-05-13 22:57:33 +08:00
|
|
|
help
|
|
|
|
|
Some platforms place the NAND chip size in a scratch register
|
|
|
|
|
because (some versions of) the driver aren't able to automatically
|
|
|
|
|
determine the size of certain chips. Set the address of the
|
|
|
|
|
scratch register here to enable this feature. On Intel Moorestown
|
|
|
|
|
boards, the scratch register is at 0xFF108018.
|
|
|
|
|
|
2008-10-15 14:38:49 +08:00
|
|
|
config MTD_NAND_GPIO
|
2014-08-05 16:37:26 +08:00
|
|
|
tristate "GPIO assisted NAND Flash driver"
|
2015-05-06 00:32:29 +08:00
|
|
|
depends on GPIOLIB || COMPILE_TEST
|
2016-01-26 06:24:10 +08:00
|
|
|
depends on HAS_IOMEM
|
2008-10-15 14:38:49 +08:00
|
|
|
help
|
2014-08-05 16:37:26 +08:00
|
|
|
This enables a NAND flash driver where control signals are
|
|
|
|
|
connected to GPIO pins, and commands and data are communicated
|
|
|
|
|
via a memory mapped interface.
|
2008-10-15 14:38:49 +08:00
|
|
|
|
2006-05-22 01:11:55 +08:00
|
|
|
config MTD_NAND_AMS_DELTA
|
|
|
|
|
tristate "NAND Flash device on Amstrad E3"
|
2007-04-20 05:21:41 +08:00
|
|
|
depends on MACH_AMS_DELTA
|
2010-12-15 19:58:15 +08:00
|
|
|
default y
|
2006-05-22 01:11:55 +08:00
|
|
|
help
|
|
|
|
|
Support for NAND flash on Amstrad E3 (Delta).
|
|
|
|
|
|
2009-05-13 04:47:03 +08:00
|
|
|
config MTD_NAND_OMAP2
|
2011-07-20 15:28:04 +08:00
|
|
|
tristate "NAND Flash device on OMAP2, OMAP3 and OMAP4"
|
2011-11-16 13:18:00 +08:00
|
|
|
depends on ARCH_OMAP2PLUS
|
2009-05-13 04:47:03 +08:00
|
|
|
help
|
2011-07-20 15:28:04 +08:00
|
|
|
Support for NAND flash on Texas Instruments OMAP2, OMAP3 and OMAP4
|
|
|
|
|
platforms.
|
2009-05-13 04:47:03 +08:00
|
|
|
|
2012-04-30 18:17:18 +08:00
|
|
|
config MTD_NAND_OMAP_BCH
|
2013-10-25 18:17:55 +08:00
|
|
|
depends on MTD_NAND_OMAP2
|
2014-10-01 19:33:29 +08:00
|
|
|
bool "Support hardware based BCH error correction"
|
2012-04-30 18:17:18 +08:00
|
|
|
default n
|
|
|
|
|
select BCH
|
|
|
|
|
help
|
2013-10-24 20:50:26 +08:00
|
|
|
This config enables the ELM hardware engine, which can be used to
|
|
|
|
|
locate and correct errors when using BCH ECC scheme. This offloads
|
|
|
|
|
the cpu from doing ECC error searching and correction. However some
|
|
|
|
|
legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine
|
2014-10-01 19:33:30 +08:00
|
|
|
so this is optional for them.
|
2012-04-30 18:17:18 +08:00
|
|
|
|
2014-10-01 19:33:29 +08:00
|
|
|
config MTD_NAND_OMAP_BCH_BUILD
|
|
|
|
|
def_tristate MTD_NAND_OMAP2 && MTD_NAND_OMAP_BCH
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
config MTD_NAND_IDS
|
|
|
|
|
tristate
|
|
|
|
|
|
2010-02-23 02:39:42 +08:00
|
|
|
config MTD_NAND_RICOH
|
|
|
|
|
tristate "Ricoh xD card reader"
|
|
|
|
|
default n
|
2010-03-12 01:10:32 +08:00
|
|
|
depends on PCI
|
2010-02-23 02:39:42 +08:00
|
|
|
select MTD_SM_COMMON
|
|
|
|
|
help
|
|
|
|
|
Enable support for Ricoh R5C852 xD card reader
|
|
|
|
|
You also need to enable ether
|
|
|
|
|
NAND SSFDC (SmartMedia) read only translation layer' or new
|
|
|
|
|
expermental, readwrite
|
|
|
|
|
'SmartMedia/xD new translation layer'
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
config MTD_NAND_AU1550
|
2005-09-23 09:44:58 +08:00
|
|
|
tristate "Au1550/1200 NAND support"
|
2011-08-12 17:39:45 +08:00
|
|
|
depends on MIPS_ALCHEMY
|
2005-04-17 06:20:36 +08:00
|
|
|
help
|
|
|
|
|
This enables the driver for the NAND flash controller on the
|
|
|
|
|
AMD/Alchemy 1550 SOC.
|
|
|
|
|
|
2007-10-03 04:56:05 +08:00
|
|
|
config MTD_NAND_BF5XX
|
|
|
|
|
tristate "Blackfin on-chip NAND Flash Controller driver"
|
2010-06-08 21:48:22 +08:00
|
|
|
depends on BF54x || BF52x
|
2007-10-03 04:56:05 +08:00
|
|
|
help
|
|
|
|
|
This enables the Blackfin on-chip NAND flash controller
|
|
|
|
|
|
|
|
|
|
No board specific support is done by this driver, each board
|
|
|
|
|
must advertise a platform_device for the driver to attach.
|
|
|
|
|
|
|
|
|
|
This driver can also be built as a module. If so, the module
|
|
|
|
|
will be called bf5xx-nand.
|
|
|
|
|
|
|
|
|
|
config MTD_NAND_BF5XX_HWECC
|
|
|
|
|
bool "BF5XX NAND Hardware ECC"
|
2008-07-31 03:35:02 +08:00
|
|
|
default y
|
2007-10-03 04:56:05 +08:00
|
|
|
depends on MTD_NAND_BF5XX
|
|
|
|
|
help
|
|
|
|
|
Enable the use of the BF5XX's internal ECC generator when
|
|
|
|
|
using NAND.
|
|
|
|
|
|
2008-07-31 03:35:01 +08:00
|
|
|
config MTD_NAND_BF5XX_BOOTROM_ECC
|
|
|
|
|
bool "Use Blackfin BootROM ECC Layout"
|
|
|
|
|
default n
|
|
|
|
|
depends on MTD_NAND_BF5XX_HWECC
|
|
|
|
|
help
|
|
|
|
|
If you wish to modify NAND pages and allow the Blackfin on-chip
|
|
|
|
|
BootROM to boot from them, say Y here. This is only necessary
|
|
|
|
|
if you are booting U-Boot out of NAND and you wish to update
|
|
|
|
|
U-Boot from Linux' userspace. Otherwise, you should say N here.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
config MTD_NAND_S3C2410
|
2009-06-07 21:04:23 +08:00
|
|
|
tristate "NAND Flash support for Samsung S3C SoCs"
|
2012-02-03 13:29:23 +08:00
|
|
|
depends on ARCH_S3C24XX || ARCH_S3C64XX
|
2005-04-17 06:20:36 +08:00
|
|
|
help
|
2009-06-07 21:04:23 +08:00
|
|
|
This enables the NAND flash controller on the S3C24xx and S3C64xx
|
2005-06-20 19:48:25 +08:00
|
|
|
SoCs
|
2005-04-17 06:20:36 +08:00
|
|
|
|
2006-05-13 00:35:02 +08:00
|
|
|
No board specific support is done by this driver, each board
|
2005-11-07 19:15:49 +08:00
|
|
|
must advertise a platform_device for the driver to attach.
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
config MTD_NAND_S3C2410_DEBUG
|
2009-06-07 21:04:23 +08:00
|
|
|
bool "Samsung S3C NAND driver debug"
|
2005-04-17 06:20:36 +08:00
|
|
|
depends on MTD_NAND_S3C2410
|
|
|
|
|
help
|
2009-06-07 21:04:23 +08:00
|
|
|
Enable debugging of the S3C NAND driver
|
2005-04-17 06:20:36 +08:00
|
|
|
|
|
|
|
|
config MTD_NAND_S3C2410_HWECC
|
2009-06-07 21:04:23 +08:00
|
|
|
bool "Samsung S3C NAND Hardware ECC"
|
2005-04-17 06:20:36 +08:00
|
|
|
depends on MTD_NAND_S3C2410
|
|
|
|
|
help
|
2009-06-07 21:04:23 +08:00
|
|
|
Enable the use of the controller's internal ECC generator when
|
|
|
|
|
using NAND. Early versions of the chips have had problems with
|
2005-04-17 06:20:36 +08:00
|
|
|
incorrect ECC generation, and if using these, the default of
|
|
|
|
|
software ECC is preferable.
|
|
|
|
|
|
2008-12-10 21:16:34 +08:00
|
|
|
config MTD_NAND_NDFC
|
|
|
|
|
tristate "NDFC NanD Flash Controller"
|
|
|
|
|
depends on 4xx
|
|
|
|
|
select MTD_NAND_ECC_SMC
|
|
|
|
|
help
|
|
|
|
|
NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs
|
|
|
|
|
|
2006-06-19 16:29:38 +08:00
|
|
|
config MTD_NAND_S3C2410_CLKSTOP
|
2009-06-07 21:04:23 +08:00
|
|
|
bool "Samsung S3C NAND IDLE clock stop"
|
2006-06-19 16:29:38 +08:00
|
|
|
depends on MTD_NAND_S3C2410
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
Stop the clock to the NAND controller when there is no chip
|
|
|
|
|
selected to save power. This will mean there is a small delay
|
|
|
|
|
when the is NAND chip selected or released, but will save
|
|
|
|
|
approximately 5mA of power when there is nothing happening.
|
|
|
|
|
|
2005-04-17 06:20:36 +08:00
|
|
|
config MTD_NAND_DISKONCHIP
|
2012-10-03 02:17:53 +08:00
|
|
|
tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation)"
|
2012-02-07 08:22:50 +08:00
|
|
|
depends on HAS_IOMEM
|
2005-04-17 06:20:36 +08:00
|
|
|
select REED_SOLOMON
|
|
|
|
|
select REED_SOLOMON_DEC16
|
|
|
|
|
help
|
|
|
|
|
This is a reimplementation of M-Systems DiskOnChip 2000,
|
|
|
|
|
Millennium and Millennium Plus as a standard NAND device driver,
|
|
|
|
|
as opposed to the earlier self-contained MTD device drivers.
|
|
|
|
|
This should enable, among other things, proper JFFS2 operation on
|
|
|
|
|
these devices.
|
|
|
|
|
|
|
|
|
|
config MTD_NAND_DISKONCHIP_PROBE_ADVANCED
|
|
|
|
|
bool "Advanced detection options for DiskOnChip"
|
|
|
|
|
depends on MTD_NAND_DISKONCHIP
|
|
|
|
|
help
|
|
|
|
|
This option allows you to specify nonstandard address at which to
|
|
|
|
|
probe for a DiskOnChip, or to change the detection options. You
|
|
|
|
|
are unlikely to need any of this unless you are using LinuxBIOS.
|
|
|
|
|
Say 'N'.
|
|
|
|
|
|
|
|
|
|
config MTD_NAND_DISKONCHIP_PROBE_ADDRESS
|
|
|
|
|
hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED
|
|
|
|
|
depends on MTD_NAND_DISKONCHIP
|
|
|
|
|
default "0"
|
|
|
|
|
---help---
|
|
|
|
|
By default, the probe for DiskOnChip devices will look for a
|
|
|
|
|
DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
|
|
|
|
|
This option allows you to specify a single address at which to probe
|
|
|
|
|
for the device, which is useful if you have other devices in that
|
|
|
|
|
range which get upset when they are probed.
|
|
|
|
|
|
|
|
|
|
(Note that on PowerPC, the normal probe will only check at
|
|
|
|
|
0xE4000000.)
|
|
|
|
|
|
|
|
|
|
Normally, you should leave this set to zero, to allow the probe at
|
|
|
|
|
the normal addresses.
|
|
|
|
|
|
|
|
|
|
config MTD_NAND_DISKONCHIP_PROBE_HIGH
|
|
|
|
|
bool "Probe high addresses"
|
|
|
|
|
depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED
|
|
|
|
|
help
|
|
|
|
|
By default, the probe for DiskOnChip devices will look for a
|
|
|
|
|
DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
|
|
|
|
|
This option changes to make it probe between 0xFFFC8000 and
|
|
|
|
|
0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be
|
|
|
|
|
useful to you. Say 'N'.
|
|
|
|
|
|
|
|
|
|
config MTD_NAND_DISKONCHIP_BBTWRITE
|
|
|
|
|
bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP"
|
|
|
|
|
depends on MTD_NAND_DISKONCHIP
|
|
|
|
|
help
|
|
|
|
|
On DiskOnChip devices shipped with the INFTL filesystem (Millennium
|
|
|
|
|
and 2000 TSOP/Alon), Linux reserves some space at the end of the
|
|
|
|
|
device for the Bad Block Table (BBT). If you have existing INFTL
|
|
|
|
|
data on your device (created by non-Linux tools such as M-Systems'
|
|
|
|
|
DOS drivers), your data might overlap the area Linux wants to use for
|
|
|
|
|
the BBT. If this is a concern for you, leave this option disabled and
|
|
|
|
|
Linux will not write BBT data into this area.
|
|
|
|
|
The downside of leaving this option disabled is that if bad blocks
|
|
|
|
|
are detected by Linux, they will not be recorded in the BBT, which
|
|
|
|
|
could cause future problems.
|
|
|
|
|
Once you enable this option, new filesystems (INFTL or others, created
|
|
|
|
|
in Linux or other operating systems) will not use the reserved area.
|
|
|
|
|
The only reason not to enable this option is to prevent damage to
|
|
|
|
|
preexisting filesystems.
|
|
|
|
|
Even if you leave this disabled, you can enable BBT writes at module
|
|
|
|
|
load time (assuming you build diskonchip as a module) with the module
|
|
|
|
|
parameter "inftl_bbt_write=1".
|
|
|
|
|
|
mtd: nand: add support for diskonchip G4 nand flash device
This patch adds a driver for the M-Sys / Sandisk diskonchip G4 nand flash found
in various smartphones and PDAs, among them the Palm Treo680, HTC Prophet and
Wizard, Toshiba Portege G900, Asus P526, and O2 XDA Zinc. It was tested on the
Treo 680, but should work generically.
Since v3, this patch adds power management functions, a scan of the factory bad
block table during initialization, several fixes, and more extensive testing.
Also, the platform data header file, which only contained partitioning
information, was removed. Command-line partitioning can be used, at least until
an mtd parser is written for the saftl format with which these chips are
shipped.
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Reviewed-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-01-04 08:05:44 +08:00
|
|
|
config MTD_NAND_DOCG4
|
2012-10-03 02:17:53 +08:00
|
|
|
tristate "Support for DiskOnChip G4"
|
|
|
|
|
depends on HAS_IOMEM
|
mtd: nand: add support for diskonchip G4 nand flash device
This patch adds a driver for the M-Sys / Sandisk diskonchip G4 nand flash found
in various smartphones and PDAs, among them the Palm Treo680, HTC Prophet and
Wizard, Toshiba Portege G900, Asus P526, and O2 XDA Zinc. It was tested on the
Treo 680, but should work generically.
Since v3, this patch adds power management functions, a scan of the factory bad
block table during initialization, several fixes, and more extensive testing.
Also, the platform data header file, which only contained partitioning
information, was removed. Command-line partitioning can be used, at least until
an mtd parser is written for the saftl format with which these chips are
shipped.
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Reviewed-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-01-04 08:05:44 +08:00
|
|
|
select BCH
|
|
|
|
|
select BITREVERSE
|
|
|
|
|
help
|
|
|
|
|
Support for diskonchip G4 nand flash, found in various smartphones and
|
|
|
|
|
PDAs, among them the Palm Treo680, HTC Prophet and Wizard, Toshiba
|
|
|
|
|
Portege G900, Asus P526, and O2 XDA Zinc.
|
|
|
|
|
|
|
|
|
|
With this driver you will be able to use UBI and create a ubifs on the
|
|
|
|
|
device, so you may wish to consider enabling UBI and UBIFS as well.
|
|
|
|
|
|
|
|
|
|
These devices ship with the Mys/Sandisk SAFTL formatting, for which
|
|
|
|
|
there is currently no mtd parser, so you may want to use command line
|
|
|
|
|
partitioning to segregate write-protected blocks. On the Treo680, the
|
|
|
|
|
first five erase blocks (256KiB each) are write-protected, followed
|
|
|
|
|
by the block containing the saftl partition table. This is probably
|
|
|
|
|
typical.
|
|
|
|
|
|
2006-03-31 18:29:43 +08:00
|
|
|
config MTD_NAND_SHARPSL
|
|
|
|
|
tristate "Support for NAND Flash on Sharp SL Series (C7xx + others)"
|
2007-04-20 05:21:41 +08:00
|
|
|
depends on ARCH_PXA
|
2006-03-31 18:29:43 +08:00
|
|
|
|
2006-10-22 09:17:05 +08:00
|
|
|
config MTD_NAND_CAFE
|
2007-05-02 18:18:49 +08:00
|
|
|
tristate "NAND support for OLPC CAFÉ chip"
|
|
|
|
|
depends on PCI
|
|
|
|
|
select REED_SOLOMON
|
|
|
|
|
select REED_SOLOMON_DEC16
|
|
|
|
|
help
|
2007-06-22 07:52:08 +08:00
|
|
|
Use NAND flash attached to the CAFÉ chip designed for the OLPC
|
2007-05-02 18:18:49 +08:00
|
|
|
laptop.
|
2006-10-22 09:17:05 +08:00
|
|
|
|
2006-05-12 05:35:28 +08:00
|
|
|
config MTD_NAND_CS553X
|
|
|
|
|
tristate "NAND support for CS5535/CS5536 (AMD Geode companion chip)"
|
2009-01-30 07:14:46 +08:00
|
|
|
depends on X86_32
|
2016-01-26 06:24:20 +08:00
|
|
|
depends on !UML && HAS_IOMEM
|
2006-05-16 20:11:47 +08:00
|
|
|
help
|
|
|
|
|
The CS553x companion chips for the AMD Geode processor
|
|
|
|
|
include NAND flash controllers with built-in hardware ECC
|
|
|
|
|
capabilities; enabling this option will allow you to use
|
|
|
|
|
these. The driver will check the MSRs to verify that the
|
|
|
|
|
controller is enabled for NAND, and currently requires that
|
|
|
|
|
the controller be in MMIO mode.
|
|
|
|
|
|
2009-06-05 06:44:53 +08:00
|
|
|
If you say "m", the module will be called cs553x_nand.
|
2006-05-16 20:11:47 +08:00
|
|
|
|
2008-06-07 00:04:52 +08:00
|
|
|
config MTD_NAND_ATMEL
|
2008-07-04 14:40:19 +08:00
|
|
|
tristate "Support for NAND Flash / SmartMedia on AT91 and AVR32"
|
2008-06-07 00:04:57 +08:00
|
|
|
depends on ARCH_AT91 || AVR32
|
2006-10-20 00:24:35 +08:00
|
|
|
help
|
|
|
|
|
Enables support for NAND Flash / Smart Media Card interface
|
2008-06-07 00:04:57 +08:00
|
|
|
on Atmel AT91 and AVR32 processors.
|
2006-10-20 00:24:35 +08:00
|
|
|
|
2008-02-14 15:48:23 +08:00
|
|
|
config MTD_NAND_PXA3xx
|
2013-11-07 23:17:11 +08:00
|
|
|
tristate "NAND support on PXA3xx and Armada 370/XP"
|
2013-08-13 01:14:59 +08:00
|
|
|
depends on PXA3xx || ARCH_MMP || PLAT_ORION
|
2008-02-14 15:48:23 +08:00
|
|
|
help
|
|
|
|
|
This enables the driver for the NAND flash device found on
|
2013-11-07 23:17:11 +08:00
|
|
|
PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
|
2008-02-14 15:48:23 +08:00
|
|
|
|
2012-06-07 18:22:15 +08:00
|
|
|
config MTD_NAND_SLC_LPC32XX
|
|
|
|
|
tristate "NXP LPC32xx SLC Controller"
|
|
|
|
|
depends on ARCH_LPC32XX
|
|
|
|
|
help
|
|
|
|
|
Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell
|
|
|
|
|
chips) NAND controller. This is the default for the PHYTEC 3250
|
|
|
|
|
reference board which contains a NAND256R3A2CZA6 chip.
|
|
|
|
|
|
|
|
|
|
Please check the actual NAND chip connected and its support
|
|
|
|
|
by the SLC NAND controller.
|
|
|
|
|
|
2012-07-01 00:50:38 +08:00
|
|
|
config MTD_NAND_MLC_LPC32XX
|
|
|
|
|
tristate "NXP LPC32xx MLC Controller"
|
|
|
|
|
depends on ARCH_LPC32XX
|
|
|
|
|
help
|
|
|
|
|
Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND
|
|
|
|
|
controller. This is the default for the WORK92105 controller
|
|
|
|
|
board.
|
|
|
|
|
|
|
|
|
|
Please check the actual NAND chip connected and its support
|
|
|
|
|
by the MLC NAND controller.
|
|
|
|
|
|
2007-04-22 13:53:21 +08:00
|
|
|
config MTD_NAND_CM_X270
|
|
|
|
|
tristate "Support for NAND Flash on CM-X270 modules"
|
2010-06-08 21:48:22 +08:00
|
|
|
depends on MACH_ARMCORE
|
2007-04-22 13:53:21 +08:00
|
|
|
|
2007-11-29 08:37:31 +08:00
|
|
|
config MTD_NAND_PASEMI
|
|
|
|
|
tristate "NAND support for PA Semi PWRficient"
|
2010-06-08 21:48:22 +08:00
|
|
|
depends on PPC_PASEMI
|
2007-11-29 08:37:31 +08:00
|
|
|
help
|
|
|
|
|
Enables support for NAND Flash interface on PA Semi PWRficient
|
|
|
|
|
based boards
|
2007-04-22 13:53:21 +08:00
|
|
|
|
2008-07-15 23:04:22 +08:00
|
|
|
config MTD_NAND_TMIO
|
|
|
|
|
tristate "NAND Flash device on Toshiba Mobile IO Controller"
|
2010-06-08 21:48:22 +08:00
|
|
|
depends on MFD_TMIO
|
2008-07-15 23:04:22 +08:00
|
|
|
help
|
|
|
|
|
Support for NAND flash connected to a Toshiba Mobile IO
|
|
|
|
|
Controller in some PDAs, including the Sharp SL6000x.
|
|
|
|
|
|
2006-03-31 18:29:43 +08:00
|
|
|
config MTD_NAND_NANDSIM
|
|
|
|
|
tristate "Support for NAND Flash Simulator"
|
2005-04-17 06:20:36 +08:00
|
|
|
help
|
2006-05-16 20:11:47 +08:00
|
|
|
The simulator may simulate various NAND flash chips for the
|
2005-04-17 06:20:36 +08:00
|
|
|
MTD nand layer.
|
2006-03-31 18:29:43 +08:00
|
|
|
|
2011-09-08 10:47:11 +08:00
|
|
|
config MTD_NAND_GPMI_NAND
|
2012-07-29 06:29:24 +08:00
|
|
|
tristate "GPMI NAND Flash Controller driver"
|
2012-08-04 18:48:12 +08:00
|
|
|
depends on MTD_NAND && MXS_DMA
|
2011-09-08 10:47:11 +08:00
|
|
|
help
|
2012-07-25 19:18:18 +08:00
|
|
|
Enables NAND Flash support for IMX23, IMX28 or IMX6.
|
2011-09-08 10:47:11 +08:00
|
|
|
The GPMI controller is very powerful, with the help of BCH
|
|
|
|
|
module, it can do the hardware ECC. The GPMI supports several
|
|
|
|
|
NAND flashs at the same time. The GPMI may conflicts with other
|
|
|
|
|
block, such as SD card. So pay attention to it when you enable
|
|
|
|
|
the GPMI.
|
|
|
|
|
|
mtd: nand: add NAND driver "library" for Broadcom STB NAND controller
This core originated in Set-Top Box chips (BCM7xxx) but is used in a
variety of other Broadcom chips, including some BCM63xxx, BCM33xx, and
iProc/Cygnus. It's been used only on ARM and MIPS SoCs, so restrict it
to those architectures.
There are multiple revisions of this core throughout the years, and
almost every version broke register compatibility in some small way, but
with some effort, this driver is able to support v4.0, v5.0, v6.x, v7.0,
and v7.1. It's been tested on v5.0, v6.0, v6.1, v7.0, and v7.1 recently,
so there hopefully are no more lurking inconsistencies.
This patch adds just some library support, on which platform drivers can
be built.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
2015-03-07 03:38:08 +08:00
|
|
|
config MTD_NAND_BRCMNAND
|
|
|
|
|
tristate "Broadcom STB NAND controller"
|
2015-10-03 01:56:43 +08:00
|
|
|
depends on ARM || ARM64 || MIPS
|
mtd: nand: add NAND driver "library" for Broadcom STB NAND controller
This core originated in Set-Top Box chips (BCM7xxx) but is used in a
variety of other Broadcom chips, including some BCM63xxx, BCM33xx, and
iProc/Cygnus. It's been used only on ARM and MIPS SoCs, so restrict it
to those architectures.
There are multiple revisions of this core throughout the years, and
almost every version broke register compatibility in some small way, but
with some effort, this driver is able to support v4.0, v5.0, v6.x, v7.0,
and v7.1. It's been tested on v5.0, v6.0, v6.1, v7.0, and v7.1 recently,
so there hopefully are no more lurking inconsistencies.
This patch adds just some library support, on which platform drivers can
be built.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
2015-03-07 03:38:08 +08:00
|
|
|
help
|
|
|
|
|
Enables the Broadcom NAND controller driver. The controller was
|
|
|
|
|
originally designed for Set-Top Box but is used on various BCM7xxx,
|
|
|
|
|
BCM3xxx, BCM63xxx, iProc/Cygnus and more.
|
|
|
|
|
|
2012-11-12 20:03:21 +08:00
|
|
|
config MTD_NAND_BCM47XXNFLASH
|
2012-12-03 17:22:35 +08:00
|
|
|
tristate "Support for NAND flash on BCM4706 BCMA bus"
|
2012-11-12 20:03:21 +08:00
|
|
|
depends on BCMA_NFLASH
|
|
|
|
|
help
|
|
|
|
|
BCMA bus can have various flash memories attached, they are
|
|
|
|
|
registered by bcma as platform devices. This enables driver for
|
2012-12-03 17:22:35 +08:00
|
|
|
NAND flash memories. For now only BCM4706 is supported.
|
2012-11-12 20:03:21 +08:00
|
|
|
|
2007-05-06 23:31:18 +08:00
|
|
|
config MTD_NAND_PLATFORM
|
|
|
|
|
tristate "Support for generic platform NAND driver"
|
2012-02-07 08:22:50 +08:00
|
|
|
depends on HAS_IOMEM
|
2007-05-06 23:31:18 +08:00
|
|
|
help
|
|
|
|
|
This implements a generic NAND driver for on-SOC platform
|
|
|
|
|
devices. You will need to provide platform-specific functions
|
|
|
|
|
via platform_data.
|
|
|
|
|
|
2007-10-17 07:10:40 +08:00
|
|
|
config MTD_NAND_ORION
|
|
|
|
|
tristate "NAND Flash support for Marvell Orion SoC"
|
2010-06-08 21:48:22 +08:00
|
|
|
depends on PLAT_ORION
|
2007-10-17 07:10:40 +08:00
|
|
|
help
|
|
|
|
|
This enables the NAND flash controller on Orion machines.
|
|
|
|
|
|
|
|
|
|
No board specific support is done by this driver, each board
|
|
|
|
|
must advertise a platform_device for the driver to attach.
|
|
|
|
|
|
2008-02-07 05:36:21 +08:00
|
|
|
config MTD_NAND_FSL_ELBC
|
|
|
|
|
tristate "NAND support for Freescale eLBC controllers"
|
2015-01-31 21:47:42 +08:00
|
|
|
depends on PPC
|
2010-10-18 15:22:31 +08:00
|
|
|
select FSL_LBC
|
2008-02-07 05:36:21 +08:00
|
|
|
help
|
|
|
|
|
Various Freescale chips, including the 8313, include a NAND Flash
|
|
|
|
|
Controller Module with built-in hardware ECC capabilities.
|
|
|
|
|
Enabling this option will enable you to use this to control
|
|
|
|
|
external NAND devices.
|
|
|
|
|
|
2012-03-15 13:34:23 +08:00
|
|
|
config MTD_NAND_FSL_IFC
|
|
|
|
|
tristate "NAND support for Freescale IFC controller"
|
|
|
|
|
depends on MTD_NAND && FSL_SOC
|
|
|
|
|
select FSL_IFC
|
2014-02-20 06:46:40 +08:00
|
|
|
select MEMORY
|
2012-03-15 13:34:23 +08:00
|
|
|
help
|
|
|
|
|
Various Freescale chips e.g P1010, include a NAND Flash machine
|
|
|
|
|
with built-in hardware ECC capabilities.
|
|
|
|
|
Enabling this option will enable you to use this to control
|
|
|
|
|
external NAND devices.
|
|
|
|
|
|
2008-03-12 03:33:13 +08:00
|
|
|
config MTD_NAND_FSL_UPM
|
|
|
|
|
tristate "Support for NAND on Freescale UPM"
|
2010-06-08 21:48:22 +08:00
|
|
|
depends on PPC_83xx || PPC_85xx
|
2008-03-12 03:33:13 +08:00
|
|
|
select FSL_LBC
|
|
|
|
|
help
|
|
|
|
|
Enables support for NAND Flash chips wired onto Freescale PowerPC
|
|
|
|
|
processor localbus with User-Programmable Machine support.
|
|
|
|
|
|
2010-02-16 01:35:05 +08:00
|
|
|
config MTD_NAND_MPC5121_NFC
|
|
|
|
|
tristate "MPC5121 built-in NAND Flash Controller support"
|
|
|
|
|
depends on PPC_MPC512x
|
|
|
|
|
help
|
|
|
|
|
This enables the driver for the NAND flash controller on the
|
|
|
|
|
MPC5121 SoC.
|
|
|
|
|
|
2015-09-03 09:06:33 +08:00
|
|
|
config MTD_NAND_VF610_NFC
|
|
|
|
|
tristate "Support for Freescale NFC for VF610/MPC5125"
|
|
|
|
|
depends on (SOC_VF610 || COMPILE_TEST)
|
2016-01-26 06:24:10 +08:00
|
|
|
depends on HAS_IOMEM
|
2015-09-03 09:06:33 +08:00
|
|
|
help
|
|
|
|
|
Enables support for NAND Flash Controller on some Freescale
|
|
|
|
|
processors like the VF610, MPC5125, MCF54418 or Kinetis K70.
|
2015-09-03 09:06:34 +08:00
|
|
|
The driver supports a maximum 2k page size. With 2k pages and
|
|
|
|
|
64 bytes or more of OOB, hardware ECC with up to 32-bit error
|
|
|
|
|
correction is supported. Hardware ECC is only enabled through
|
|
|
|
|
device tree.
|
2015-09-03 09:06:33 +08:00
|
|
|
|
2008-09-02 23:16:59 +08:00
|
|
|
config MTD_NAND_MXC
|
|
|
|
|
tristate "MXC NAND support"
|
2012-07-03 06:00:19 +08:00
|
|
|
depends on ARCH_MXC
|
2008-09-02 23:16:59 +08:00
|
|
|
help
|
|
|
|
|
This enables the driver for the NAND flash controller on the
|
|
|
|
|
MXC processors.
|
|
|
|
|
|
2008-10-14 20:23:26 +08:00
|
|
|
config MTD_NAND_SH_FLCTL
|
|
|
|
|
tristate "Support for NAND on Renesas SuperH FLCTL"
|
2015-12-09 01:40:59 +08:00
|
|
|
depends on SUPERH || COMPILE_TEST
|
2014-01-31 20:39:07 +08:00
|
|
|
depends on HAS_IOMEM
|
|
|
|
|
depends on HAS_DMA
|
2008-10-14 20:23:26 +08:00
|
|
|
help
|
|
|
|
|
Several Renesas SuperH CPU has FLCTL. This option enables support
|
2010-02-02 12:01:25 +08:00
|
|
|
for NAND Flash using FLCTL.
|
2008-10-14 20:23:26 +08:00
|
|
|
|
2009-03-05 04:01:37 +08:00
|
|
|
config MTD_NAND_DAVINCI
|
2013-12-17 21:38:12 +08:00
|
|
|
tristate "Support NAND on DaVinci/Keystone SoC"
|
|
|
|
|
depends on ARCH_DAVINCI || (ARCH_KEYSTONE && TI_AEMIF)
|
2009-03-05 04:01:37 +08:00
|
|
|
help
|
|
|
|
|
Enable the driver for NAND flash chips on Texas Instruments
|
2013-12-17 21:38:12 +08:00
|
|
|
DaVinci/Keystone processors.
|
2009-03-05 04:01:37 +08:00
|
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2009-03-05 04:01:34 +08:00
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config MTD_NAND_TXX9NDFMC
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tristate "NAND Flash support for TXx9 SoC"
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depends on SOC_TX4938 || SOC_TX4939
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help
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This enables the NAND flash controller on the TXx9 SoCs.
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2009-03-25 18:48:38 +08:00
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config MTD_NAND_SOCRATES
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tristate "Support for NAND on Socrates board"
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2010-06-08 21:48:22 +08:00
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depends on SOCRATES
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2009-03-25 18:48:38 +08:00
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help
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Enables support for NAND Flash chips wired onto Socrates board.
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2010-01-01 20:16:47 +08:00
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config MTD_NAND_NUC900
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tristate "Support for NAND on Nuvoton NUC9xx/w90p910 evaluation boards."
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2011-05-23 17:23:43 +08:00
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depends on ARCH_W90X900
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2009-07-10 15:17:27 +08:00
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help
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This enables the driver for the NAND Flash on evaluation board based
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2010-01-01 20:16:47 +08:00
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on w90p910 / NUC9xx.
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2009-07-10 15:17:27 +08:00
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2010-07-17 19:15:29 +08:00
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config MTD_NAND_JZ4740
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tristate "Support for JZ4740 SoC NAND controller"
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depends on MACH_JZ4740
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help
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Enables support for NAND Flash on JZ4740 SoC based boards.
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2016-01-04 20:34:43 +08:00
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config MTD_NAND_JZ4780
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tristate "Support for NAND on JZ4780 SoC"
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depends on MACH_JZ4780 && JZ4780_NEMC
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help
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Enables support for NAND Flash connected to the NEMC on JZ4780 SoC
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based boards, using the BCH controller for hardware error correction.
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2010-09-13 06:35:22 +08:00
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config MTD_NAND_FSMC
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tristate "Support for NAND on ST Micros FSMC"
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2012-10-18 20:01:25 +08:00
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depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || MACH_U300
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2010-09-13 06:35:22 +08:00
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help
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Enables support for NAND Flash chips on the ST Microelectronics
|
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Flexible Static Memory Controller (FSMC)
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2012-08-24 02:28:32 +08:00
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config MTD_NAND_XWAY
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tristate "Support for NAND on Lantiq XWAY SoC"
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depends on LANTIQ && SOC_TYPE_XWAY
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select MTD_NAND_PLATFORM
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help
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Enables support for NAND Flash chips on Lantiq XWAY SoCs. NAND is attached
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to the External Bus Unit (EBU).
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2014-10-21 21:08:41 +08:00
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config MTD_NAND_SUNXI
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tristate "Support for NAND on Allwinner SoCs"
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depends on ARCH_SUNXI
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help
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Enables support for NAND Flash chips on Allwinner SoCs.
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2015-01-25 18:53:13 +08:00
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config MTD_NAND_HISI504
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tristate "Support for NAND controller on Hisilicon SoC Hip04"
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2015-03-01 17:35:52 +08:00
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depends on HAS_DMA
|
2015-01-25 18:53:13 +08:00
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help
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Enables support for NAND controller on Hisilicon SoC Hip04.
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mtd: nand: Qualcomm NAND controller driver
The Qualcomm NAND controller is found in SoCs like IPQ806x, MSM7xx,
MDM9x15 series.
It exists as a sub block inside the IPs EBI2 (External Bus Interface 2)
and QPIC (Qualcomm Parallel Interface Controller). These IPs provide a
broader interface for external slow peripheral devices such as LCD and
NAND/NOR flash memory or SRAM like interfaces.
We add support for the NAND controller found within EBI2. For the SoCs
of our interest, we only use the NAND controller within EBI2. Therefore,
it's safe for us to assume that the NAND controller is a standalone block
within the SoC.
The controller supports 512B, 2kB, 4kB and 8kB page 8-bit and 16-bit NAND
flash devices. It contains a HW ECC block that supports BCH ECC (4, 8 and
16 bit correction/step) and RS ECC(4 bit correction/step) that covers main
and spare data. The controller contains an internal 512 byte page buffer
to which we read/write via DMA. The EBI2 type NAND controller uses ADM DMA
for register read/write and data transfers. The controller performs page
reads and writes at a codeword/step level of 512 bytes. It can support up
to 2 external chips of different configurations.
The driver prepares register read and write configuration descriptors for
each codeword, followed by data descriptors to read or write data from the
controller's internal buffer. It uses a single ADM DMA channel that we get
via dmaengine API. The controller requires 2 ADM CRCIs for command and
data flow control. These are passed via DT.
The ecc layout used by the controller is syndrome like, but we can't use
the standard syndrome ecc ops because of several reasons. First, the amount
of data bytes covered by ecc isn't same in each step. Second, writing to
free oob space requires us writing to the entire step in which the oob
lies. This forces us to create our own ecc ops.
One more difference is how the controller accesses the bad block marker.
The controller ignores reading the marker when ECC is enabled. ECC needs
to be explicity disabled to read or write to the bad block marker. The
nand_bbt helpers library hence can't access BBMs for the controller.
For now, we skip the creation of BBT and populate chip->block_bad and
chip->block_markbad helpers instead.
Reviewed-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-03 16:59:50 +08:00
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config MTD_NAND_QCOM
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tristate "Support for NAND on QCOM SoCs"
|
|
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depends on ARCH_QCOM
|
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help
|
|
|
|
|
Enables support for NAND flash chips on SoCs containing the EBI2 NAND
|
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controller. This controller is found on IPQ806x SoC.
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|
2007-04-20 05:21:41 +08:00
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endif # MTD_NAND
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