2017-11-08 00:30:07 +08:00
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// SPDX-License-Identifier: GPL-2.0
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devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
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/*
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2018-06-13 01:01:45 +08:00
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* arch-independent dma-mapping routines
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devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
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*
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* Copyright (c) 2006 SUSE Linux Products GmbH
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* Copyright (c) 2006 Tejun Heo <teheo@suse.de>
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*/
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2018-12-07 04:25:54 +08:00
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#include <linux/memblock.h> /* for max_pfn */
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2017-04-10 19:21:01 +08:00
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#include <linux/acpi.h>
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2020-09-22 21:31:03 +08:00
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#include <linux/dma-map-ops.h>
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2011-05-27 19:12:15 +08:00
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#include <linux/export.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 16:04:11 +08:00
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#include <linux/gfp.h>
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2022-09-15 23:03:55 +08:00
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#include <linux/kmsan.h>
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2017-04-10 19:21:01 +08:00
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#include <linux/of_device.h>
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2014-10-10 06:26:40 +08:00
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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2020-09-11 16:12:44 +08:00
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#include "debug.h"
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2020-09-22 21:34:22 +08:00
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#include "direct.h"
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devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
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2021-02-10 17:56:39 +08:00
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bool dma_default_coherent;
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devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
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/*
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* Managed DMA API
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*/
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struct dma_devres {
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size_t size;
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void *vaddr;
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dma_addr_t dma_handle;
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2017-06-13 01:15:04 +08:00
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unsigned long attrs;
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devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
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};
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2017-06-13 01:15:04 +08:00
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static void dmam_release(struct device *dev, void *res)
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devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
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{
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struct dma_devres *this = res;
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2017-06-13 01:15:04 +08:00
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dma_free_attrs(dev, this->size, this->vaddr, this->dma_handle,
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this->attrs);
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devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
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}
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static int dmam_match(struct device *dev, void *res, void *match_data)
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{
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struct dma_devres *this = res, *match = match_data;
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if (this->vaddr == match->vaddr) {
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WARN_ON(this->size != match->size ||
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this->dma_handle != match->dma_handle);
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return 1;
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}
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return 0;
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}
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/**
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* dmam_free_coherent - Managed dma_free_coherent()
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* @dev: Device to free coherent memory for
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* @size: Size of allocation
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* @vaddr: Virtual address of the memory to free
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* @dma_handle: DMA handle of the memory to free
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*
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* Managed dma_free_coherent().
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*/
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void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle)
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{
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struct dma_devres match_data = { size, vaddr, dma_handle };
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dma_free_coherent(dev, size, vaddr, dma_handle);
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2017-06-13 01:15:04 +08:00
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WARN_ON(devres_destroy(dev, dmam_release, dmam_match, &match_data));
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devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
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}
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EXPORT_SYMBOL(dmam_free_coherent);
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/**
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2017-06-13 01:15:04 +08:00
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* dmam_alloc_attrs - Managed dma_alloc_attrs()
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devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
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* @dev: Device to allocate non_coherent memory for
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* @size: Size of allocation
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* @dma_handle: Out argument for allocated DMA handle
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* @gfp: Allocation flags
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2017-06-13 01:15:04 +08:00
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* @attrs: Flags in the DMA_ATTR_* namespace.
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devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
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*
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2017-06-13 01:15:04 +08:00
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* Managed dma_alloc_attrs(). Memory allocated using this function will be
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* automatically released on driver detach.
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devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
|
|
|
*
|
|
|
|
* RETURNS:
|
|
|
|
* Pointer to allocated memory on success, NULL on failure.
|
|
|
|
*/
|
2017-06-13 01:15:04 +08:00
|
|
|
void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
|
|
|
gfp_t gfp, unsigned long attrs)
|
devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
|
|
|
{
|
|
|
|
struct dma_devres *dr;
|
|
|
|
void *vaddr;
|
|
|
|
|
2017-06-13 01:15:04 +08:00
|
|
|
dr = devres_alloc(dmam_release, sizeof(*dr), gfp);
|
devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
|
|
|
if (!dr)
|
|
|
|
return NULL;
|
|
|
|
|
2017-06-13 01:15:04 +08:00
|
|
|
vaddr = dma_alloc_attrs(dev, size, dma_handle, gfp, attrs);
|
devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
|
|
|
if (!vaddr) {
|
|
|
|
devres_free(dr);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
dr->vaddr = vaddr;
|
|
|
|
dr->dma_handle = *dma_handle;
|
|
|
|
dr->size = size;
|
2017-06-13 01:15:04 +08:00
|
|
|
dr->attrs = attrs;
|
devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
|
|
|
|
|
|
|
devres_add(dev, dr);
|
|
|
|
|
|
|
|
return vaddr;
|
|
|
|
}
|
2017-06-13 01:15:04 +08:00
|
|
|
EXPORT_SYMBOL(dmam_alloc_attrs);
|
devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 15:00:26 +08:00
|
|
|
|
2020-03-24 01:19:30 +08:00
|
|
|
static bool dma_go_direct(struct device *dev, dma_addr_t mask,
|
|
|
|
const struct dma_map_ops *ops)
|
2020-07-08 15:45:11 +08:00
|
|
|
{
|
2020-03-24 01:19:30 +08:00
|
|
|
if (likely(!ops))
|
|
|
|
return true;
|
|
|
|
#ifdef CONFIG_DMA_OPS_BYPASS
|
|
|
|
if (dev->dma_ops_bypass)
|
|
|
|
return min_not_zero(mask, dev->bus_dma_limit) >=
|
|
|
|
dma_direct_get_required_mask(dev);
|
|
|
|
#endif
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Check if the devices uses a direct mapping for streaming DMA operations.
|
|
|
|
* This allows IOMMU drivers to set a bypass mode if the DMA mask is large
|
|
|
|
* enough.
|
|
|
|
*/
|
|
|
|
static inline bool dma_alloc_direct(struct device *dev,
|
|
|
|
const struct dma_map_ops *ops)
|
|
|
|
{
|
|
|
|
return dma_go_direct(dev, dev->coherent_dma_mask, ops);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline bool dma_map_direct(struct device *dev,
|
|
|
|
const struct dma_map_ops *ops)
|
|
|
|
{
|
|
|
|
return dma_go_direct(dev, *dev->dma_mask, ops);
|
2020-07-08 15:45:11 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
dma_addr_t dma_map_page_attrs(struct device *dev, struct page *page,
|
|
|
|
size_t offset, size_t size, enum dma_data_direction dir,
|
|
|
|
unsigned long attrs)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
dma_addr_t addr;
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
2020-09-18 00:43:03 +08:00
|
|
|
|
|
|
|
if (WARN_ON_ONCE(!dev->dma_mask))
|
|
|
|
return DMA_MAPPING_ERROR;
|
|
|
|
|
2020-10-29 09:52:40 +08:00
|
|
|
if (dma_map_direct(dev, ops) ||
|
|
|
|
arch_dma_map_page_direct(dev, page_to_phys(page) + offset + size))
|
2020-07-08 15:45:11 +08:00
|
|
|
addr = dma_direct_map_page(dev, page, offset, size, dir, attrs);
|
|
|
|
else
|
|
|
|
addr = ops->map_page(dev, page, offset, size, dir, attrs);
|
2022-09-15 23:03:55 +08:00
|
|
|
kmsan_handle_dma(page, offset, size, dir);
|
2021-10-12 13:54:03 +08:00
|
|
|
debug_dma_map_page(dev, page, offset, size, dir, addr, attrs);
|
2020-07-08 15:45:11 +08:00
|
|
|
|
|
|
|
return addr;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_map_page_attrs);
|
|
|
|
|
|
|
|
void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, size_t size,
|
|
|
|
enum dma_data_direction dir, unsigned long attrs)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
2020-10-29 09:52:40 +08:00
|
|
|
if (dma_map_direct(dev, ops) ||
|
|
|
|
arch_dma_unmap_page_direct(dev, addr + size))
|
2020-07-08 15:45:11 +08:00
|
|
|
dma_direct_unmap_page(dev, addr, size, dir, attrs);
|
|
|
|
else if (ops->unmap_page)
|
|
|
|
ops->unmap_page(dev, addr, size, dir, attrs);
|
|
|
|
debug_dma_unmap_page(dev, addr, size, dir);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_unmap_page_attrs);
|
|
|
|
|
2021-07-30 04:15:19 +08:00
|
|
|
static int __dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
|
|
|
|
int nents, enum dma_data_direction dir, unsigned long attrs)
|
2020-07-08 15:45:11 +08:00
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
int ents;
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
2020-09-18 00:43:03 +08:00
|
|
|
|
|
|
|
if (WARN_ON_ONCE(!dev->dma_mask))
|
|
|
|
return 0;
|
|
|
|
|
2020-10-29 09:52:40 +08:00
|
|
|
if (dma_map_direct(dev, ops) ||
|
|
|
|
arch_dma_map_sg_direct(dev, sg, nents))
|
2020-07-08 15:45:11 +08:00
|
|
|
ents = dma_direct_map_sg(dev, sg, nents, dir, attrs);
|
|
|
|
else
|
|
|
|
ents = ops->map_sg(dev, sg, nents, dir, attrs);
|
2021-07-30 04:15:19 +08:00
|
|
|
|
2022-09-15 23:03:55 +08:00
|
|
|
if (ents > 0) {
|
|
|
|
kmsan_handle_dma_sg(sg, nents, dir);
|
2021-10-12 13:54:03 +08:00
|
|
|
debug_dma_map_sg(dev, sg, nents, ents, dir, attrs);
|
2022-09-15 23:03:55 +08:00
|
|
|
} else if (WARN_ON_ONCE(ents != -EINVAL && ents != -ENOMEM &&
|
|
|
|
ents != -EIO && ents != -EREMOTEIO)) {
|
2021-07-30 04:15:19 +08:00
|
|
|
return -EIO;
|
2022-09-15 23:03:55 +08:00
|
|
|
}
|
2020-07-08 15:45:11 +08:00
|
|
|
|
|
|
|
return ents;
|
|
|
|
}
|
2021-07-30 04:15:19 +08:00
|
|
|
|
|
|
|
/**
|
|
|
|
* dma_map_sg_attrs - Map the given buffer for DMA
|
|
|
|
* @dev: The device for which to perform the DMA operation
|
2021-09-06 20:40:00 +08:00
|
|
|
* @sg: The sg_table object describing the buffer
|
|
|
|
* @nents: Number of entries to map
|
2021-07-30 04:15:19 +08:00
|
|
|
* @dir: DMA direction
|
|
|
|
* @attrs: Optional DMA attributes for the map operation
|
|
|
|
*
|
|
|
|
* Maps a buffer described by a scatterlist passed in the sg argument with
|
|
|
|
* nents segments for the @dir DMA operation by the @dev device.
|
|
|
|
*
|
|
|
|
* Returns the number of mapped entries (which can be less than nents)
|
|
|
|
* on success. Zero is returned for any error.
|
|
|
|
*
|
|
|
|
* dma_unmap_sg_attrs() should be used to unmap the buffer with the
|
|
|
|
* original sg and original nents (not the value returned by this funciton).
|
|
|
|
*/
|
2021-08-09 23:19:36 +08:00
|
|
|
unsigned int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
|
2021-07-30 04:15:19 +08:00
|
|
|
int nents, enum dma_data_direction dir, unsigned long attrs)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = __dma_map_sg_attrs(dev, sg, nents, dir, attrs);
|
|
|
|
if (ret < 0)
|
|
|
|
return 0;
|
|
|
|
return ret;
|
|
|
|
}
|
2020-07-08 15:45:11 +08:00
|
|
|
EXPORT_SYMBOL(dma_map_sg_attrs);
|
|
|
|
|
2021-07-30 04:15:19 +08:00
|
|
|
/**
|
|
|
|
* dma_map_sgtable - Map the given buffer for DMA
|
|
|
|
* @dev: The device for which to perform the DMA operation
|
|
|
|
* @sgt: The sg_table object describing the buffer
|
|
|
|
* @dir: DMA direction
|
|
|
|
* @attrs: Optional DMA attributes for the map operation
|
|
|
|
*
|
|
|
|
* Maps a buffer described by a scatterlist stored in the given sg_table
|
|
|
|
* object for the @dir DMA operation by the @dev device. After success, the
|
|
|
|
* ownership for the buffer is transferred to the DMA domain. One has to
|
|
|
|
* call dma_sync_sgtable_for_cpu() or dma_unmap_sgtable() to move the
|
|
|
|
* ownership of the buffer back to the CPU domain before touching the
|
|
|
|
* buffer by the CPU.
|
|
|
|
*
|
|
|
|
* Returns 0 on success or a negative error code on error. The following
|
|
|
|
* error codes are supported with the given meaning:
|
|
|
|
*
|
2022-07-28 03:15:22 +08:00
|
|
|
* -EINVAL An invalid argument, unaligned access or other error
|
|
|
|
* in usage. Will not succeed if retried.
|
|
|
|
* -ENOMEM Insufficient resources (like memory or IOVA space) to
|
|
|
|
* complete the mapping. Should succeed if retried later.
|
|
|
|
* -EIO Legacy error code with an unknown meaning. eg. this is
|
|
|
|
* returned if a lower level call returned
|
|
|
|
* DMA_MAPPING_ERROR.
|
|
|
|
* -EREMOTEIO The DMA device cannot access P2PDMA memory specified
|
|
|
|
* in the sg_table. This will not succeed if retried.
|
2021-07-30 04:15:19 +08:00
|
|
|
*/
|
|
|
|
int dma_map_sgtable(struct device *dev, struct sg_table *sgt,
|
|
|
|
enum dma_data_direction dir, unsigned long attrs)
|
|
|
|
{
|
|
|
|
int nents;
|
|
|
|
|
|
|
|
nents = __dma_map_sg_attrs(dev, sgt->sgl, sgt->orig_nents, dir, attrs);
|
|
|
|
if (nents < 0)
|
|
|
|
return nents;
|
|
|
|
sgt->nents = nents;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(dma_map_sgtable);
|
|
|
|
|
2020-07-08 15:45:11 +08:00
|
|
|
void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
|
|
|
|
int nents, enum dma_data_direction dir,
|
|
|
|
unsigned long attrs)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
|
|
|
debug_dma_unmap_sg(dev, sg, nents, dir);
|
2020-10-29 09:52:40 +08:00
|
|
|
if (dma_map_direct(dev, ops) ||
|
|
|
|
arch_dma_unmap_sg_direct(dev, sg, nents))
|
2020-07-08 15:45:11 +08:00
|
|
|
dma_direct_unmap_sg(dev, sg, nents, dir, attrs);
|
|
|
|
else if (ops->unmap_sg)
|
|
|
|
ops->unmap_sg(dev, sg, nents, dir, attrs);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_unmap_sg_attrs);
|
|
|
|
|
|
|
|
dma_addr_t dma_map_resource(struct device *dev, phys_addr_t phys_addr,
|
|
|
|
size_t size, enum dma_data_direction dir, unsigned long attrs)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
dma_addr_t addr = DMA_MAPPING_ERROR;
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
|
|
|
|
2020-09-18 00:43:03 +08:00
|
|
|
if (WARN_ON_ONCE(!dev->dma_mask))
|
|
|
|
return DMA_MAPPING_ERROR;
|
|
|
|
|
2020-03-24 01:19:30 +08:00
|
|
|
if (dma_map_direct(dev, ops))
|
2020-07-08 15:45:11 +08:00
|
|
|
addr = dma_direct_map_resource(dev, phys_addr, size, dir, attrs);
|
|
|
|
else if (ops->map_resource)
|
|
|
|
addr = ops->map_resource(dev, phys_addr, size, dir, attrs);
|
|
|
|
|
2021-10-12 13:54:03 +08:00
|
|
|
debug_dma_map_resource(dev, phys_addr, size, dir, addr, attrs);
|
2020-07-08 15:45:11 +08:00
|
|
|
return addr;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_map_resource);
|
|
|
|
|
|
|
|
void dma_unmap_resource(struct device *dev, dma_addr_t addr, size_t size,
|
|
|
|
enum dma_data_direction dir, unsigned long attrs)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
2020-03-24 01:19:30 +08:00
|
|
|
if (!dma_map_direct(dev, ops) && ops->unmap_resource)
|
2020-07-08 15:45:11 +08:00
|
|
|
ops->unmap_resource(dev, addr, size, dir, attrs);
|
|
|
|
debug_dma_unmap_resource(dev, addr, size, dir);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_unmap_resource);
|
|
|
|
|
|
|
|
void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, size_t size,
|
|
|
|
enum dma_data_direction dir)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
2020-03-24 01:19:30 +08:00
|
|
|
if (dma_map_direct(dev, ops))
|
2020-07-08 15:45:11 +08:00
|
|
|
dma_direct_sync_single_for_cpu(dev, addr, size, dir);
|
|
|
|
else if (ops->sync_single_for_cpu)
|
|
|
|
ops->sync_single_for_cpu(dev, addr, size, dir);
|
|
|
|
debug_dma_sync_single_for_cpu(dev, addr, size, dir);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_sync_single_for_cpu);
|
|
|
|
|
|
|
|
void dma_sync_single_for_device(struct device *dev, dma_addr_t addr,
|
|
|
|
size_t size, enum dma_data_direction dir)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
2020-03-24 01:19:30 +08:00
|
|
|
if (dma_map_direct(dev, ops))
|
2020-07-08 15:45:11 +08:00
|
|
|
dma_direct_sync_single_for_device(dev, addr, size, dir);
|
|
|
|
else if (ops->sync_single_for_device)
|
|
|
|
ops->sync_single_for_device(dev, addr, size, dir);
|
|
|
|
debug_dma_sync_single_for_device(dev, addr, size, dir);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_sync_single_for_device);
|
|
|
|
|
|
|
|
void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
|
|
|
|
int nelems, enum dma_data_direction dir)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
2020-03-24 01:19:30 +08:00
|
|
|
if (dma_map_direct(dev, ops))
|
2020-07-08 15:45:11 +08:00
|
|
|
dma_direct_sync_sg_for_cpu(dev, sg, nelems, dir);
|
|
|
|
else if (ops->sync_sg_for_cpu)
|
|
|
|
ops->sync_sg_for_cpu(dev, sg, nelems, dir);
|
|
|
|
debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_sync_sg_for_cpu);
|
|
|
|
|
|
|
|
void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
|
|
|
|
int nelems, enum dma_data_direction dir)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
2020-03-24 01:19:30 +08:00
|
|
|
if (dma_map_direct(dev, ops))
|
2020-07-08 15:45:11 +08:00
|
|
|
dma_direct_sync_sg_for_device(dev, sg, nelems, dir);
|
|
|
|
else if (ops->sync_sg_for_device)
|
|
|
|
ops->sync_sg_for_device(dev, sg, nelems, dir);
|
|
|
|
debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_sync_sg_for_device);
|
|
|
|
|
2019-03-16 00:56:43 +08:00
|
|
|
/*
|
|
|
|
* The whole dma_get_sgtable() idea is fundamentally unsafe - it seems
|
|
|
|
* that the intention is to allow exporting memory allocated via the
|
|
|
|
* coherent DMA APIs through the dma_buf API, which only accepts a
|
|
|
|
* scattertable. This presents a couple of problems:
|
|
|
|
* 1. Not all memory allocated via the coherent DMA APIs is backed by
|
|
|
|
* a struct page
|
|
|
|
* 2. Passing coherent DMA memory into the streaming APIs is not allowed
|
|
|
|
* as we will try to flush the memory through a different alias to that
|
|
|
|
* actually being used (and the flushes are redundant.)
|
|
|
|
*/
|
2018-12-07 04:43:30 +08:00
|
|
|
int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
|
|
|
|
void *cpu_addr, dma_addr_t dma_addr, size_t size,
|
|
|
|
unsigned long attrs)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
2018-12-07 05:39:32 +08:00
|
|
|
|
2020-03-24 01:19:30 +08:00
|
|
|
if (dma_alloc_direct(dev, ops))
|
2019-10-29 18:01:37 +08:00
|
|
|
return dma_direct_get_sgtable(dev, sgt, cpu_addr, dma_addr,
|
2019-08-06 20:01:50 +08:00
|
|
|
size, attrs);
|
|
|
|
if (!ops->get_sgtable)
|
|
|
|
return -ENXIO;
|
|
|
|
return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size, attrs);
|
2018-12-07 04:43:30 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_get_sgtable_attrs);
|
2012-06-13 16:05:52 +08:00
|
|
|
|
2019-07-26 15:26:40 +08:00
|
|
|
#ifdef CONFIG_MMU
|
|
|
|
/*
|
|
|
|
* Return the page attributes used for mapping dma_alloc_* memory, either in
|
|
|
|
* kernel space if remapping is needed, or to userspace through dma_mmap_*.
|
|
|
|
*/
|
|
|
|
pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs)
|
|
|
|
{
|
2020-09-01 19:34:33 +08:00
|
|
|
if (dev_is_dma_coherent(dev))
|
2019-07-26 15:26:40 +08:00
|
|
|
return prot;
|
2019-08-26 15:03:44 +08:00
|
|
|
#ifdef CONFIG_ARCH_HAS_DMA_WRITE_COMBINE
|
|
|
|
if (attrs & DMA_ATTR_WRITE_COMBINE)
|
|
|
|
return pgprot_writecombine(prot);
|
|
|
|
#endif
|
|
|
|
return pgprot_dmacoherent(prot);
|
2019-07-26 15:26:40 +08:00
|
|
|
}
|
|
|
|
#endif /* CONFIG_MMU */
|
|
|
|
|
2019-08-03 18:31:25 +08:00
|
|
|
/**
|
|
|
|
* dma_can_mmap - check if a given device supports dma_mmap_*
|
|
|
|
* @dev: device to check
|
|
|
|
*
|
|
|
|
* Returns %true if @dev supports dma_mmap_coherent() and dma_mmap_attrs() to
|
|
|
|
* map DMA allocations to userspace.
|
|
|
|
*/
|
|
|
|
bool dma_can_mmap(struct device *dev)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
2020-03-24 01:19:30 +08:00
|
|
|
if (dma_alloc_direct(dev, ops))
|
2019-10-29 18:01:37 +08:00
|
|
|
return dma_direct_can_mmap(dev);
|
2019-08-03 18:31:25 +08:00
|
|
|
return ops->mmap != NULL;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(dma_can_mmap);
|
|
|
|
|
2018-12-07 04:43:30 +08:00
|
|
|
/**
|
|
|
|
* dma_mmap_attrs - map a coherent DMA allocation into user space
|
|
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
|
|
* @vma: vm_area_struct describing requested user mapping
|
|
|
|
* @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
|
|
|
|
* @dma_addr: device-view address returned from dma_alloc_attrs
|
|
|
|
* @size: size of memory originally requested in dma_alloc_attrs
|
|
|
|
* @attrs: attributes of mapping properties requested in dma_alloc_attrs
|
|
|
|
*
|
|
|
|
* Map a coherent DMA buffer previously allocated by dma_alloc_attrs into user
|
|
|
|
* space. The coherent DMA buffer must not be freed by the driver until the
|
|
|
|
* user space mapping has been released.
|
|
|
|
*/
|
|
|
|
int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
|
|
|
|
void *cpu_addr, dma_addr_t dma_addr, size_t size,
|
|
|
|
unsigned long attrs)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
2018-12-07 05:39:32 +08:00
|
|
|
|
2020-03-24 01:19:30 +08:00
|
|
|
if (dma_alloc_direct(dev, ops))
|
2019-10-29 18:01:37 +08:00
|
|
|
return dma_direct_mmap(dev, vma, cpu_addr, dma_addr, size,
|
2019-08-06 20:01:50 +08:00
|
|
|
attrs);
|
|
|
|
if (!ops->mmap)
|
|
|
|
return -ENXIO;
|
|
|
|
return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
|
2018-12-07 04:43:30 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_mmap_attrs);
|
2018-12-07 04:25:54 +08:00
|
|
|
|
|
|
|
u64 dma_get_required_mask(struct device *dev)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
2020-03-24 01:19:30 +08:00
|
|
|
if (dma_alloc_direct(dev, ops))
|
2018-12-07 05:39:32 +08:00
|
|
|
return dma_direct_get_required_mask(dev);
|
2018-12-07 04:25:54 +08:00
|
|
|
if (ops->get_required_mask)
|
|
|
|
return ops->get_required_mask(dev);
|
2019-08-06 20:01:38 +08:00
|
|
|
|
|
|
|
/*
|
|
|
|
* We require every DMA ops implementation to at least support a 32-bit
|
|
|
|
* DMA mask (and use bounce buffering if that isn't supported in
|
|
|
|
* hardware). As the direct mapping code has its own routine to
|
|
|
|
* actually report an optimal mask we default to 32-bit here as that
|
|
|
|
* is the right thing for most IOMMUs, and at least not actively
|
|
|
|
* harmful in general.
|
|
|
|
*/
|
|
|
|
return DMA_BIT_MASK(32);
|
2018-12-07 04:25:54 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(dma_get_required_mask);
|
|
|
|
|
2018-12-07 04:43:30 +08:00
|
|
|
void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
|
|
|
|
gfp_t flag, unsigned long attrs)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
void *cpu_addr;
|
|
|
|
|
2019-04-24 22:24:37 +08:00
|
|
|
WARN_ON_ONCE(!dev->coherent_dma_mask);
|
2018-12-07 04:43:30 +08:00
|
|
|
|
2022-11-09 15:37:17 +08:00
|
|
|
/*
|
|
|
|
* DMA allocations can never be turned back into a page pointer, so
|
|
|
|
* requesting compound pages doesn't make sense (and can't even be
|
|
|
|
* supported at all by various backends).
|
|
|
|
*/
|
|
|
|
if (WARN_ON_ONCE(flag & __GFP_COMP))
|
|
|
|
return NULL;
|
|
|
|
|
2018-12-07 04:43:30 +08:00
|
|
|
if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr))
|
|
|
|
return cpu_addr;
|
|
|
|
|
|
|
|
/* let the implementation decide on the zone to allocate from: */
|
|
|
|
flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
|
|
|
|
|
2020-03-24 01:19:30 +08:00
|
|
|
if (dma_alloc_direct(dev, ops))
|
2018-12-07 05:39:32 +08:00
|
|
|
cpu_addr = dma_direct_alloc(dev, size, dma_handle, flag, attrs);
|
|
|
|
else if (ops->alloc)
|
|
|
|
cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
|
|
|
|
else
|
2018-12-07 04:43:30 +08:00
|
|
|
return NULL;
|
|
|
|
|
2021-10-12 13:54:03 +08:00
|
|
|
debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr, attrs);
|
2018-12-07 04:43:30 +08:00
|
|
|
return cpu_addr;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_alloc_attrs);
|
|
|
|
|
|
|
|
void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
|
|
|
|
dma_addr_t dma_handle, unsigned long attrs)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr))
|
|
|
|
return;
|
|
|
|
/*
|
|
|
|
* On non-coherent platforms which implement DMA-coherent buffers via
|
|
|
|
* non-cacheable remaps, ops->free() may call vunmap(). Thus getting
|
|
|
|
* this far in IRQ context is a) at risk of a BUG_ON() or trying to
|
|
|
|
* sleep on some machines, and b) an indication that the driver is
|
|
|
|
* probably misusing the coherent API anyway.
|
|
|
|
*/
|
|
|
|
WARN_ON(irqs_disabled());
|
|
|
|
|
2018-12-07 05:39:32 +08:00
|
|
|
if (!cpu_addr)
|
2018-12-07 04:43:30 +08:00
|
|
|
return;
|
|
|
|
|
|
|
|
debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
|
2020-03-24 01:19:30 +08:00
|
|
|
if (dma_alloc_direct(dev, ops))
|
2018-12-07 05:39:32 +08:00
|
|
|
dma_direct_free(dev, size, cpu_addr, dma_handle, attrs);
|
|
|
|
else if (ops->free)
|
|
|
|
ops->free(dev, size, cpu_addr, dma_handle, attrs);
|
2018-12-07 04:43:30 +08:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_free_attrs);
|
|
|
|
|
2021-02-02 01:12:02 +08:00
|
|
|
static struct page *__dma_alloc_pages(struct device *dev, size_t size,
|
2020-09-01 19:34:33 +08:00
|
|
|
dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
if (WARN_ON_ONCE(!dev->coherent_dma_mask))
|
|
|
|
return NULL;
|
|
|
|
if (WARN_ON_ONCE(gfp & (__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM)))
|
|
|
|
return NULL;
|
2022-12-20 16:08:12 +08:00
|
|
|
if (WARN_ON_ONCE(gfp & __GFP_COMP))
|
|
|
|
return NULL;
|
2020-09-01 19:34:33 +08:00
|
|
|
|
|
|
|
size = PAGE_ALIGN(size);
|
|
|
|
if (dma_alloc_direct(dev, ops))
|
2021-02-02 01:12:02 +08:00
|
|
|
return dma_direct_alloc_pages(dev, size, dma_handle, dir, gfp);
|
|
|
|
if (!ops->alloc_pages)
|
2020-09-01 19:34:33 +08:00
|
|
|
return NULL;
|
2021-02-02 01:12:02 +08:00
|
|
|
return ops->alloc_pages(dev, size, dma_handle, dir, gfp);
|
|
|
|
}
|
2020-09-01 19:34:33 +08:00
|
|
|
|
2021-02-02 01:12:02 +08:00
|
|
|
struct page *dma_alloc_pages(struct device *dev, size_t size,
|
|
|
|
dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp)
|
|
|
|
{
|
|
|
|
struct page *page = __dma_alloc_pages(dev, size, dma_handle, dir, gfp);
|
2020-09-01 19:34:33 +08:00
|
|
|
|
2021-02-02 01:12:02 +08:00
|
|
|
if (page)
|
2021-10-12 13:54:03 +08:00
|
|
|
debug_dma_map_page(dev, page, 0, size, dir, *dma_handle, 0);
|
2020-09-01 19:34:33 +08:00
|
|
|
return page;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(dma_alloc_pages);
|
|
|
|
|
2021-02-02 01:12:02 +08:00
|
|
|
static void __dma_free_pages(struct device *dev, size_t size, struct page *page,
|
2020-09-01 19:34:33 +08:00
|
|
|
dma_addr_t dma_handle, enum dma_data_direction dir)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
size = PAGE_ALIGN(size);
|
|
|
|
if (dma_alloc_direct(dev, ops))
|
|
|
|
dma_direct_free_pages(dev, size, page, dma_handle, dir);
|
|
|
|
else if (ops->free_pages)
|
|
|
|
ops->free_pages(dev, size, page, dma_handle, dir);
|
|
|
|
}
|
2021-02-02 01:12:02 +08:00
|
|
|
|
|
|
|
void dma_free_pages(struct device *dev, size_t size, struct page *page,
|
|
|
|
dma_addr_t dma_handle, enum dma_data_direction dir)
|
|
|
|
{
|
|
|
|
debug_dma_unmap_page(dev, dma_handle, size, dir);
|
|
|
|
__dma_free_pages(dev, size, page, dma_handle, dir);
|
|
|
|
}
|
2020-09-01 19:34:33 +08:00
|
|
|
EXPORT_SYMBOL_GPL(dma_free_pages);
|
|
|
|
|
2021-01-28 21:53:22 +08:00
|
|
|
int dma_mmap_pages(struct device *dev, struct vm_area_struct *vma,
|
|
|
|
size_t size, struct page *page)
|
|
|
|
{
|
|
|
|
unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
|
|
|
|
|
|
|
|
if (vma->vm_pgoff >= count || vma_pages(vma) > count - vma->vm_pgoff)
|
|
|
|
return -ENXIO;
|
|
|
|
return remap_pfn_range(vma, vma->vm_start,
|
|
|
|
page_to_pfn(page) + vma->vm_pgoff,
|
|
|
|
vma_pages(vma) << PAGE_SHIFT, vma->vm_page_prot);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(dma_mmap_pages);
|
|
|
|
|
2021-01-28 21:54:18 +08:00
|
|
|
static struct sg_table *alloc_single_sgt(struct device *dev, size_t size,
|
|
|
|
enum dma_data_direction dir, gfp_t gfp)
|
|
|
|
{
|
|
|
|
struct sg_table *sgt;
|
|
|
|
struct page *page;
|
|
|
|
|
|
|
|
sgt = kmalloc(sizeof(*sgt), gfp);
|
|
|
|
if (!sgt)
|
|
|
|
return NULL;
|
|
|
|
if (sg_alloc_table(sgt, 1, gfp))
|
|
|
|
goto out_free_sgt;
|
|
|
|
page = __dma_alloc_pages(dev, size, &sgt->sgl->dma_address, dir, gfp);
|
|
|
|
if (!page)
|
|
|
|
goto out_free_table;
|
|
|
|
sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
|
|
|
|
sg_dma_len(sgt->sgl) = sgt->sgl->length;
|
|
|
|
return sgt;
|
|
|
|
out_free_table:
|
|
|
|
sg_free_table(sgt);
|
|
|
|
out_free_sgt:
|
|
|
|
kfree(sgt);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct sg_table *dma_alloc_noncontiguous(struct device *dev, size_t size,
|
|
|
|
enum dma_data_direction dir, gfp_t gfp, unsigned long attrs)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
struct sg_table *sgt;
|
|
|
|
|
|
|
|
if (WARN_ON_ONCE(attrs & ~DMA_ATTR_ALLOC_SINGLE_PAGES))
|
|
|
|
return NULL;
|
2022-12-20 16:08:12 +08:00
|
|
|
if (WARN_ON_ONCE(gfp & __GFP_COMP))
|
|
|
|
return NULL;
|
2021-01-28 21:54:18 +08:00
|
|
|
|
|
|
|
if (ops && ops->alloc_noncontiguous)
|
|
|
|
sgt = ops->alloc_noncontiguous(dev, size, dir, gfp, attrs);
|
|
|
|
else
|
|
|
|
sgt = alloc_single_sgt(dev, size, dir, gfp);
|
|
|
|
|
|
|
|
if (sgt) {
|
|
|
|
sgt->nents = 1;
|
2021-10-12 13:54:03 +08:00
|
|
|
debug_dma_map_sg(dev, sgt->sgl, sgt->orig_nents, 1, dir, attrs);
|
2021-01-28 21:54:18 +08:00
|
|
|
}
|
|
|
|
return sgt;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(dma_alloc_noncontiguous);
|
|
|
|
|
|
|
|
static void free_single_sgt(struct device *dev, size_t size,
|
|
|
|
struct sg_table *sgt, enum dma_data_direction dir)
|
|
|
|
{
|
|
|
|
__dma_free_pages(dev, size, sg_page(sgt->sgl), sgt->sgl->dma_address,
|
|
|
|
dir);
|
|
|
|
sg_free_table(sgt);
|
|
|
|
kfree(sgt);
|
|
|
|
}
|
|
|
|
|
|
|
|
void dma_free_noncontiguous(struct device *dev, size_t size,
|
|
|
|
struct sg_table *sgt, enum dma_data_direction dir)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
debug_dma_unmap_sg(dev, sgt->sgl, sgt->orig_nents, dir);
|
|
|
|
if (ops && ops->free_noncontiguous)
|
|
|
|
ops->free_noncontiguous(dev, size, sgt, dir);
|
|
|
|
else
|
|
|
|
free_single_sgt(dev, size, sgt, dir);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(dma_free_noncontiguous);
|
|
|
|
|
|
|
|
void *dma_vmap_noncontiguous(struct device *dev, size_t size,
|
|
|
|
struct sg_table *sgt)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
|
|
|
|
|
|
|
|
if (ops && ops->alloc_noncontiguous)
|
|
|
|
return vmap(sgt_handle(sgt)->pages, count, VM_MAP, PAGE_KERNEL);
|
|
|
|
return page_address(sg_page(sgt->sgl));
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(dma_vmap_noncontiguous);
|
|
|
|
|
|
|
|
void dma_vunmap_noncontiguous(struct device *dev, void *vaddr)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
if (ops && ops->alloc_noncontiguous)
|
|
|
|
vunmap(vaddr);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(dma_vunmap_noncontiguous);
|
|
|
|
|
|
|
|
int dma_mmap_noncontiguous(struct device *dev, struct vm_area_struct *vma,
|
|
|
|
size_t size, struct sg_table *sgt)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
if (ops && ops->alloc_noncontiguous) {
|
|
|
|
unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
|
|
|
|
|
|
|
|
if (vma->vm_pgoff >= count ||
|
|
|
|
vma_pages(vma) > count - vma->vm_pgoff)
|
|
|
|
return -ENXIO;
|
|
|
|
return vm_map_pages(vma, sgt_handle(sgt)->pages, count);
|
|
|
|
}
|
|
|
|
return dma_mmap_pages(dev, vma, size, sg_page(sgt->sgl));
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(dma_mmap_noncontiguous);
|
|
|
|
|
2022-08-21 22:06:44 +08:00
|
|
|
static int dma_supported(struct device *dev, u64 mask)
|
2018-12-07 04:43:30 +08:00
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
2020-03-24 01:19:30 +08:00
|
|
|
/*
|
|
|
|
* ->dma_supported sets the bypass flag, so we must always call
|
|
|
|
* into the method here unless the device is truly direct mapped.
|
|
|
|
*/
|
|
|
|
if (!ops)
|
2018-12-07 05:39:32 +08:00
|
|
|
return dma_direct_supported(dev, mask);
|
2018-12-21 00:35:47 +08:00
|
|
|
if (!ops->dma_supported)
|
2018-12-07 04:43:30 +08:00
|
|
|
return 1;
|
|
|
|
return ops->dma_supported(dev, mask);
|
|
|
|
}
|
2022-07-09 00:50:57 +08:00
|
|
|
|
|
|
|
bool dma_pci_p2pdma_supported(struct device *dev)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
/* if ops is not set, dma direct will be used which supports P2PDMA */
|
|
|
|
if (!ops)
|
|
|
|
return true;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Note: dma_ops_bypass is not checked here because P2PDMA should
|
|
|
|
* not be used with dma mapping ops that do not have support even
|
|
|
|
* if the specific device is bypassing them.
|
|
|
|
*/
|
|
|
|
|
|
|
|
return ops->flags & DMA_F_PCI_P2PDMA_SUPPORTED;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(dma_pci_p2pdma_supported);
|
2018-12-07 04:43:30 +08:00
|
|
|
|
2019-02-13 15:01:22 +08:00
|
|
|
#ifdef CONFIG_ARCH_HAS_DMA_SET_MASK
|
|
|
|
void arch_dma_set_mask(struct device *dev, u64 mask);
|
|
|
|
#else
|
|
|
|
#define arch_dma_set_mask(dev, mask) do { } while (0)
|
|
|
|
#endif
|
|
|
|
|
2018-12-07 04:43:30 +08:00
|
|
|
int dma_set_mask(struct device *dev, u64 mask)
|
|
|
|
{
|
2019-04-29 22:16:42 +08:00
|
|
|
/*
|
|
|
|
* Truncate the mask to the actually supported dma_addr_t width to
|
|
|
|
* avoid generating unsupportable addresses.
|
|
|
|
*/
|
|
|
|
mask = (dma_addr_t)mask;
|
|
|
|
|
2018-12-07 04:43:30 +08:00
|
|
|
if (!dev->dma_mask || !dma_supported(dev, mask))
|
|
|
|
return -EIO;
|
|
|
|
|
2019-02-13 15:01:22 +08:00
|
|
|
arch_dma_set_mask(dev, mask);
|
2018-12-07 04:43:30 +08:00
|
|
|
*dev->dma_mask = mask;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_set_mask);
|
|
|
|
|
|
|
|
int dma_set_coherent_mask(struct device *dev, u64 mask)
|
|
|
|
{
|
2019-04-29 22:16:42 +08:00
|
|
|
/*
|
|
|
|
* Truncate the mask to the actually supported dma_addr_t width to
|
|
|
|
* avoid generating unsupportable addresses.
|
|
|
|
*/
|
|
|
|
mask = (dma_addr_t)mask;
|
|
|
|
|
2018-12-07 04:43:30 +08:00
|
|
|
if (!dma_supported(dev, mask))
|
|
|
|
return -EIO;
|
|
|
|
|
|
|
|
dev->coherent_dma_mask = mask;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(dma_set_coherent_mask);
|
2018-12-07 04:47:50 +08:00
|
|
|
|
2019-02-07 19:59:15 +08:00
|
|
|
size_t dma_max_mapping_size(struct device *dev)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
size_t size = SIZE_MAX;
|
|
|
|
|
2020-03-24 01:19:30 +08:00
|
|
|
if (dma_map_direct(dev, ops))
|
2019-02-07 19:59:15 +08:00
|
|
|
size = dma_direct_max_mapping_size(dev);
|
|
|
|
else if (ops && ops->max_mapping_size)
|
|
|
|
size = ops->max_mapping_size(dev);
|
|
|
|
|
|
|
|
return size;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(dma_max_mapping_size);
|
2019-08-28 20:35:40 +08:00
|
|
|
|
2022-07-14 19:15:24 +08:00
|
|
|
size_t dma_opt_mapping_size(struct device *dev)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
size_t size = SIZE_MAX;
|
|
|
|
|
|
|
|
if (ops && ops->opt_mapping_size)
|
|
|
|
size = ops->opt_mapping_size();
|
|
|
|
|
|
|
|
return min(dma_max_mapping_size(dev), size);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(dma_opt_mapping_size);
|
|
|
|
|
2020-06-29 21:03:56 +08:00
|
|
|
bool dma_need_sync(struct device *dev, dma_addr_t dma_addr)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
2020-03-24 01:19:30 +08:00
|
|
|
if (dma_map_direct(dev, ops))
|
2020-06-29 21:03:56 +08:00
|
|
|
return dma_direct_need_sync(dev, dma_addr);
|
|
|
|
return ops->sync_single_for_cpu || ops->sync_single_for_device;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(dma_need_sync);
|
|
|
|
|
2019-08-28 20:35:40 +08:00
|
|
|
unsigned long dma_get_merge_boundary(struct device *dev)
|
|
|
|
{
|
|
|
|
const struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
if (!ops || !ops->get_merge_boundary)
|
|
|
|
return 0; /* can't merge */
|
|
|
|
|
|
|
|
return ops->get_merge_boundary(dev);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(dma_get_merge_boundary);
|