2012-04-17 02:27:51 +08:00
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/*
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* DTS file for SPEAr1310 Evaluation Baord
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*
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2015-07-18 07:23:50 +08:00
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* Copyright 2012 Viresh Kumar <vireshk@kernel.org>
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2012-04-17 02:27:51 +08:00
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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/include/ "spear1310.dtsi"
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/ {
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model = "ST SPEAr1310 Evaluation Board";
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compatible = "st,spear1310-evb", "st,spear1310";
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#address-cells = <1>;
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#size-cells = <1>;
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memory {
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reg = <0 0x40000000>;
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};
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ahb {
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pinmux@e0700000 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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2012-07-05 11:51:47 +08:00
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i2c0 {
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2012-04-17 02:27:51 +08:00
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st,pins = "i2c0_grp";
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st,function = "i2c0";
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};
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2012-07-05 11:51:47 +08:00
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i2s0 {
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st,pins = "i2s0_grp";
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st,function = "i2s0";
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};
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2012-04-17 02:27:51 +08:00
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i2s1 {
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st,pins = "i2s1_grp";
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st,function = "i2s1";
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};
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gpio {
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st,pins = "arm_gpio_grp";
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st,function = "arm_gpio";
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};
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2012-07-05 11:51:47 +08:00
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clcd {
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st,pins = "clcd_grp" , "clcd_high_res";
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st,function = "clcd";
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};
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2012-04-17 02:27:51 +08:00
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eth {
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st,pins = "gmii_grp";
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st,function = "gmii";
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};
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ssp0 {
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st,pins = "ssp0_grp";
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st,function = "ssp0";
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};
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kbd {
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st,pins = "keyboard_6x6_grp";
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st,function = "keyboard";
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};
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sdhci {
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st,pins = "sdhci_grp";
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st,function = "sdhci";
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};
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smi-pmx {
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st,pins = "smi_2_chips_grp";
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st,function = "smi";
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};
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uart0 {
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st,pins = "uart0_grp";
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st,function = "uart0";
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};
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rs485 {
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st,pins = "rs485_0_1_tdm_0_1_grp";
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st,function = "rs485_0_1_tdm_0_1";
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};
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i2c1_2 {
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st,pins = "i2c_1_2_grp";
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st,function = "i2c_1_2";
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};
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smii {
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st,pins = "smii_0_1_2_grp";
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st,function = "smii_0_1_2";
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};
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nand {
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st,pins = "nand_8bit_grp",
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"nand_16bit_grp";
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st,function = "nand";
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};
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2012-07-05 11:51:47 +08:00
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sata {
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st,pins = "sata0_grp";
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st,function = "sata";
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};
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pcie {
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st,pins = "pcie1_grp", "pcie2_grp";
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st,function = "pci_express";
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};
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2012-04-17 02:27:51 +08:00
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};
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};
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ahci@b1000000 {
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status = "okay";
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};
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2014-04-14 17:57:36 +08:00
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miphy@eb800000 {
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status = "okay";
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};
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2012-04-17 02:27:51 +08:00
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cf@b2800000 {
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status = "okay";
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};
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dma@ea800000 {
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status = "okay";
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};
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dma@eb000000 {
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status = "okay";
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};
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fsmc: flash@b0000000 {
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status = "okay";
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2012-07-05 11:51:47 +08:00
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partition@0 {
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label = "xloader";
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reg = <0x0 0x80000>;
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};
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partition@80000 {
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label = "u-boot";
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reg = <0x80000 0x140000>;
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};
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partition@1C0000 {
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label = "environment";
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reg = <0x1C0000 0x40000>;
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};
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partition@200000 {
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label = "dtb";
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reg = <0x200000 0x40000>;
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};
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partition@240000 {
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label = "linux";
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reg = <0x240000 0xC00000>;
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};
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partition@E40000 {
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label = "rootfs";
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reg = <0xE40000 0x0>;
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};
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2012-04-17 02:27:51 +08:00
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};
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2012-11-10 20:01:01 +08:00
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gpio_keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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button@1 {
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label = "wakeup";
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linux,code = <0x100>;
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gpios = <&gpio0 7 0x4>;
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debounce-interval = <20>;
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gpio-key,wakeup = <1>;
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};
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};
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2012-04-17 02:27:51 +08:00
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gmac0: eth@e2000000 {
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2012-08-09 15:48:40 +08:00
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phy-mode = "gmii";
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2012-04-17 02:27:51 +08:00
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status = "okay";
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};
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sdhci@b3000000 {
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status = "okay";
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};
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smi: flash@ea000000 {
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status = "okay";
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clock-rate=<50000000>;
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flash@e6000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xe6000000 0x800000>;
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st,smi-fast-mode;
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partition@0 {
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label = "xloader";
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reg = <0x0 0x10000>;
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};
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partition@10000 {
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label = "u-boot";
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2012-07-05 11:51:47 +08:00
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reg = <0x10000 0x50000>;
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};
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partition@60000 {
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label = "environment";
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reg = <0x60000 0x10000>;
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};
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partition@70000 {
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label = "dtb";
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reg = <0x70000 0x10000>;
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2012-04-17 02:27:51 +08:00
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};
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2012-07-05 11:51:47 +08:00
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partition@80000 {
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2012-04-17 02:27:51 +08:00
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label = "linux";
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2012-07-05 11:51:47 +08:00
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reg = <0x80000 0x310000>;
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2012-04-17 02:27:51 +08:00
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};
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2012-07-05 11:51:47 +08:00
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partition@390000 {
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2012-04-17 02:27:51 +08:00
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label = "rootfs";
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2012-07-05 11:51:47 +08:00
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reg = <0x390000 0x0>;
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2012-04-17 02:27:51 +08:00
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};
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};
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};
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ehci@e4800000 {
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status = "okay";
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};
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ehci@e5800000 {
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status = "okay";
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};
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ohci@e4000000 {
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status = "okay";
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};
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ohci@e5000000 {
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status = "okay";
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};
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apb {
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adc@e0080000 {
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status = "okay";
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};
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gpio0: gpio@e0600000 {
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status = "okay";
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};
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gpio1: gpio@e0680000 {
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status = "okay";
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};
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2012-10-27 17:51:39 +08:00
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gpio@d8400000 {
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status = "okay";
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};
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2012-04-17 02:27:51 +08:00
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i2c0: i2c@e0280000 {
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status = "okay";
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};
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kbd@e0300000 {
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linux,keymap = < 0x00000001
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0x00010002
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0x00020003
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0x00030004
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0x00040005
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0x00050006
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0x00060007
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0x00070008
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0x00080009
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0x0100000a
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0x0101000c
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0x0102000d
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0x0103000e
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0x0104000f
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0x01050010
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0x01060011
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0x01070012
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0x01080013
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0x02000014
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0x02010015
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0x02020016
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0x02030017
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0x02040018
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0x02050019
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0x0206001a
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0x0207001b
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0x0208001c
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0x0300001d
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0x0301001e
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0x0302001f
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0x03030020
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0x03040021
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0x03050022
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0x03060023
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0x03070024
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0x03080025
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0x04000026
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0x04010027
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0x04020028
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0x04030029
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0x0404002a
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0x0405002b
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0x0406002c
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0x0407002d
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0x0408002e
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0x0500002f
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0x05010030
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0x05020031
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0x05030032
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0x05040033
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0x05050034
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0x05060035
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0x05070036
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0x05080037
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0x06000038
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0x06010039
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0x0602003a
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0x0603003b
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0x0604003c
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0x0605003d
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0x0606003e
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0x0607003f
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0x06080040
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0x07000041
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0x07010042
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0x07020043
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0x07030044
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0x07040045
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0x07050046
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0x07060047
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0x07070048
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0x07080049
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0x0800004a
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0x0801004b
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0x0802004c
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0x0803004d
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0x0804004e
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0x0805004f
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0x08060050
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0x08070051
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0x08080052 >;
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autorepeat;
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st,mode = <0>;
|
2012-07-05 11:51:47 +08:00
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suspended_rate = <2000000>;
|
2012-04-17 02:27:51 +08:00
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status = "okay";
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};
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rtc@e0580000 {
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status = "okay";
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};
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serial@e0000000 {
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status = "okay";
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2012-08-30 12:02:24 +08:00
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pinctrl-names = "default";
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pinctrl-0 = <>;
|
2012-04-17 02:27:51 +08:00
|
|
|
};
|
|
|
|
|
|
2012-07-05 11:51:47 +08:00
|
|
|
spi0: spi@e0100000 {
|
|
|
|
|
status = "okay";
|
2012-11-10 20:01:01 +08:00
|
|
|
num-cs = <3>;
|
|
|
|
|
cs-gpios = <&gpio1 7 0>, <&spics 0>, <&spics 1>;
|
|
|
|
|
|
|
|
|
|
stmpe610@0 {
|
|
|
|
|
compatible = "st,stmpe610";
|
|
|
|
|
reg = <0>;
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
spi-max-frequency = <1000000>;
|
|
|
|
|
spi-cpha;
|
|
|
|
|
pl022,hierarchy = <0>;
|
|
|
|
|
pl022,interface = <0>;
|
|
|
|
|
pl022,slave-tx-disable;
|
|
|
|
|
pl022,com-mode = <0>;
|
|
|
|
|
pl022,rx-level-trig = <0>;
|
|
|
|
|
pl022,tx-level-trig = <0>;
|
|
|
|
|
pl022,ctrl-len = <0x7>;
|
|
|
|
|
pl022,wait-state = <0>;
|
|
|
|
|
pl022,duplex = <0>;
|
|
|
|
|
interrupts = <6 0x4>;
|
|
|
|
|
interrupt-parent = <&gpio1>;
|
|
|
|
|
irq-trigger = <0x2>;
|
|
|
|
|
|
|
|
|
|
stmpe_touchscreen {
|
|
|
|
|
compatible = "st,stmpe-ts";
|
|
|
|
|
ts,sample-time = <4>;
|
|
|
|
|
ts,mod-12b = <1>;
|
|
|
|
|
ts,ref-sel = <0>;
|
|
|
|
|
ts,adc-freq = <1>;
|
|
|
|
|
ts,ave-ctrl = <1>;
|
|
|
|
|
ts,touch-det-delay = <2>;
|
|
|
|
|
ts,settling = <2>;
|
|
|
|
|
ts,fraction-z = <7>;
|
|
|
|
|
ts,i-drive = <1>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
m25p80@1 {
|
|
|
|
|
compatible = "st,m25p80";
|
|
|
|
|
reg = <1>;
|
|
|
|
|
spi-max-frequency = <12000000>;
|
|
|
|
|
spi-cpol;
|
|
|
|
|
spi-cpha;
|
|
|
|
|
pl022,hierarchy = <0>;
|
|
|
|
|
pl022,interface = <0>;
|
|
|
|
|
pl022,slave-tx-disable;
|
|
|
|
|
pl022,com-mode = <0x2>;
|
|
|
|
|
pl022,rx-level-trig = <0>;
|
|
|
|
|
pl022,tx-level-trig = <0>;
|
|
|
|
|
pl022,ctrl-len = <0x11>;
|
|
|
|
|
pl022,wait-state = <0>;
|
|
|
|
|
pl022,duplex = <0>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
spidev@2 {
|
|
|
|
|
compatible = "spidev";
|
|
|
|
|
reg = <2>;
|
|
|
|
|
spi-max-frequency = <25000000>;
|
|
|
|
|
spi-cpha;
|
|
|
|
|
pl022,hierarchy = <0>;
|
|
|
|
|
pl022,interface = <0>;
|
|
|
|
|
pl022,slave-tx-disable;
|
|
|
|
|
pl022,com-mode = <0x2>;
|
|
|
|
|
pl022,rx-level-trig = <0>;
|
|
|
|
|
pl022,tx-level-trig = <0>;
|
|
|
|
|
pl022,ctrl-len = <0x11>;
|
|
|
|
|
pl022,wait-state = <0>;
|
|
|
|
|
pl022,duplex = <0>;
|
|
|
|
|
};
|
2012-07-05 11:51:47 +08:00
|
|
|
};
|
|
|
|
|
|
2012-04-17 02:27:51 +08:00
|
|
|
wdt@ec800620 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
