linux/drivers/net/ethernet/brocade/bna/cna.h

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/*
* Linux network driver for Brocade Converged Network Adapter.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License (GPL) Version 2 as
* published by the Free Software Foundation
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*/
/*
* Copyright (c) 2006-2010 Brocade Communications Systems, Inc.
* All rights reserved
* www.brocade.com
*/
#ifndef __CNA_H__
#define __CNA_H__
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/mutex.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/bitops.h>
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <linux/if_vlan.h>
#include <linux/if_ether.h>
#define bfa_sm_fault(__event) do { \
pr_err("SM Assertion failure: %s: %d: event = %d\n", \
__FILE__, __LINE__, __event); \
} while (0)
extern char bfa_version[];
#define CNA_FW_FILE_CT "ctfw-3.2.3.0.bin"
#define CNA_FW_FILE_CT2 "ct2fw-3.2.3.0.bin"
#define FC_SYMNAME_MAX 256 /*!< max name server symbolic name size */
#pragma pack(1)
typedef struct mac { u8 mac[ETH_ALEN]; } mac_t;
#pragma pack()
#define bfa_q_first(_q) ((void *)(((struct list_head *) (_q))->next))
#define bfa_q_next(_qe) (((struct list_head *) (_qe))->next)
#define bfa_q_prev(_qe) (((struct list_head *) (_qe))->prev)
/*
* bfa_q_qe_init - to initialize a queue element
*/
#define bfa_q_qe_init(_qe) { \
bfa_q_next(_qe) = (struct list_head *) NULL; \
bfa_q_prev(_qe) = (struct list_head *) NULL; \
}
/*
* bfa_q_deq - dequeue an element from head of the queue
*/
#define bfa_q_deq(_q, _qe) { \
if (!list_empty(_q)) { \
(*((struct list_head **) (_qe))) = bfa_q_next(_q); \
bfa_q_prev(bfa_q_next(*((struct list_head **) _qe))) = \
(struct list_head *) (_q); \
bfa_q_next(_q) = bfa_q_next(*((struct list_head **) _qe)); \
bfa_q_qe_init(*((struct list_head **) _qe)); \
} else { \
*((struct list_head **)(_qe)) = NULL; \
} \
}
bna: ENET and Tx Rx Redesign Enablement Change details: This patch contains additional structure and function definition changes that are required to enable the new msgq/enet/txrx redesign introduced by the previous 4 patches. - structure and function definition changes to header files as a result of Ethport, Enet, IOCEth, Tx, Rx redesign. - ethtool changes to use new enet function and definitions - Set number of Tx and Rx queues bassed on underlying hardware. Define separate macros for maximum and supported numbers of Tx and Rx queues based on underlying hardware. Take VLAN header into account for MTU calculation. Default to INTx mode when pci_enable_msix() fails. Set a bit in Rx poll routine, check and wait for that bit to be cleared in the cleanup routine before proceeding. - The TX and Rx coalesce settings are programmed in steps of 5 us. The value that are not divisible by 5 are rounded to the next lower number. This was causing the value os 1 to 4 to be rounded to 0, which is an invalid setting. When creating Rx and Tx object, we are currently assigning the default values of Rx and Tx coalescing_timeo. If these values are changed in the driver to a different value, the change is lost during such operations as MTU change. In order to avoid that, pass the configured value of coalescing_timeo before Rx and Tx object creation. Fix bnad_tx_coalescing_timeo_set() so it applies to all the Tx objects. - Reorg uninitialization path in case of pci_probe failure. - Hardware clock setup changes to pass asic generation, port modes and asic mode as part firmware boot parameters to firmware. - FW mailbox interface changes to defined asic specific mailbox interfaces. h/w mailbox interfaces take 8-bit FIDs and 2-bit port id for owner. Cleaned up mailbox definitions and usage for new and old HW. Eliminated usage of ASIC ID. MSI-X vector assignment and programming done by firmware. Fixed host offsets for CPE/RME queue registers. - Implement polling mechanism for FW ready to have poll mechanism replaces the current interrupt based FW READY method. The timer based poll routine in IOC will query the ioc_fwstate register to see if there is a state change in FW, and sends the READY event. Removed infrastructure needed to support mbox READY event from fw as well as IOC code. - Move FW init to HW init. Handle the case where PCI mapping goes away when IOCPF state machine is waiting for semaphore. - Add IOC mbox call back to client indicating that the command is sent. Signed-off-by: Rasesh Mody <rmody@brocade.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2011-08-09 00:21:39 +08:00
/*
* bfa_q_deq_tail - dequeue an element from tail of the queue
*/
#define bfa_q_deq_tail(_q, _qe) { \
if (!list_empty(_q)) { \
*((struct list_head **) (_qe)) = bfa_q_prev(_q); \
bfa_q_next(bfa_q_prev(*((struct list_head **) _qe))) = \
(struct list_head *) (_q); \
bfa_q_prev(_q) = bfa_q_prev(*(struct list_head **) _qe);\
bfa_q_qe_init(*((struct list_head **) _qe)); \
} else { \
*((struct list_head **) (_qe)) = (struct list_head *) NULL; \
} \
}
/*
* bfa_add_tail_head - enqueue an element at the head of queue
*/
#define bfa_q_enq_head(_q, _qe) { \
if (!(bfa_q_next(_qe) == NULL) && (bfa_q_prev(_qe) == NULL)) \
pr_err("Assertion failure: %s:%d: %d", \
__FILE__, __LINE__, \
(bfa_q_next(_qe) == NULL) && (bfa_q_prev(_qe) == NULL));\
bfa_q_next(_qe) = bfa_q_next(_q); \
bfa_q_prev(_qe) = (struct list_head *) (_q); \
bfa_q_prev(bfa_q_next(_q)) = (struct list_head *) (_qe); \
bfa_q_next(_q) = (struct list_head *) (_qe); \
}
#endif /* __CNA_H__ */