2011-12-21 15:04:13 +08:00
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Tegra SoC PWFM controller
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Required properties:
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2015-01-31 06:11:04 +08:00
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- compatible: For Tegra20, must contain "nvidia,tegra20-pwm". For Tegra30,
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must contain "nvidia,tegra30-pwm". Otherwise, must contain
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"nvidia,<chip>-pwm", plus one of the above, where <chip> is tegra114,
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tegra124, tegra132, or tegra210.
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2011-12-21 15:04:13 +08:00
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- reg: physical base address and length of the controller's registers
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2013-07-18 06:54:23 +08:00
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- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
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the cells format.
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2013-11-07 05:00:25 +08:00
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- clocks: Must contain one entry, for the module clock.
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See ../clocks/clock-bindings.txt for details.
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2013-11-08 01:11:27 +08:00
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- resets: Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names: Must include the following entries:
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- pwm
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2011-12-21 15:04:13 +08:00
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Example:
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pwm: pwm@7000a000 {
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compatible = "nvidia,tegra20-pwm";
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reg = <0x7000a000 0x100>;
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#pwm-cells = <2>;
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2013-11-07 05:00:25 +08:00
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clocks = <&tegra_car 17>;
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2013-11-08 01:11:27 +08:00
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resets = <&tegra_car 17>;
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reset-names = "pwm";
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2011-12-21 15:04:13 +08:00
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};
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